aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite/ld-arm
AgeCommit message (Collapse)AuthorFilesLines
2024-02-15Re: elf_backend_finish_dynamic_symbol returning falseAlan Modra1-0/+1
Making a bfd_final_link failure noisy requires testsuite changes.
2024-01-04Update year range in copyright notice of binutils filesAlan Modra2-2/+2
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-10-05Fix: ld testsuite: Thumb PLT and GOT tests should be skipped on musl armhf ↵A. Wilcox2-2/+2
targets PR 30923 * testsuite/ld-arm/thumb-plt-got.d: Skip test for configurations using the MUSL library. * testsuite/ld-arm/thumb-plt.d: Likewise.
2023-09-04arm: Make 'conflicting CPU architectures' error message more user-friendlyChristophe Lyon2-2/+2
Error messages such as "conflicting CPU architectures 10/16" are not very to understand, so this patch replaces the numbers with the description they actually mean: "conflicting CPU architectures ARM v7E-M vs Pre v4" 2023-09-01 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * elf32-arm.c (tag_cpu_arch_combine): Add name_table parameter and use it. (elf32_arm_merge_eabi_attributes): Update call to tag_cpu_arch_combine. ld/ * testsuite/ld-arm/attr-merge-9.out: Update expected error message. * testsuite/ld-arm/attr-merge-arch-2.d: Likewise.
2023-01-20arm32: Fix rodata-merge-mapMichael Matz2-4/+4
the test expects a second, but useless, $d mapping symbol for the partially merged section, and specifically disallows one for the completely merged section. The new merging algorithm makes it so that also the partially merged sections are conceptually SEC_EXCLUDED, except the first merge section (e.g. as if the very first object file already contains all strings). So that second mapping symbol is now missing. It never was needed anyway. So, adjust the test.
2023-01-12ld/testsuite: Adjust for ELF_MAXPAGESIZE 0x1000Hans-Peter Nilsson7-29/+32
Many tests reflect a setting of ELF_MAXPAGESIZE to 64 KiB. With ELF_MAXPAGESIZE changed to 4 KiB, layout is sometimes different and symbols end up in other places. Avoid churn and regexpification of old test patterns by passing the max-page-size setting active at the time. ld/testsuite: * testsuite/ld-arm/arm-elf.exp, testsuite/ld-arm/non-contiguous-arm2.d, testsuite/ld-arm/non-contiguous-arm3.d, testsuite/ld-arm/non-contiguous-arm5.d, testsuite/ld-arm/non-contiguous-arm6.d, testsuite/ld-arm/thumb-plt-got.d, testsuite/ld-arm/thumb-plt.d: Pass -z max-page-size=0x10000 explicitly to test that rely on that value in output-matching patterns.
2023-01-09Fix PR18841 ifunc relocation orderingChristophe Lyon3-39/+39
In order to get the ifunc relocs properly sorted the correct class needs to be returned. The code mimics what has been done for AArch64. Fixes: FAIL: Run pr18841 with libpr18841b.so FAIL: Run pr18841 with libpr18841c.so FAIL: Run pr18841 with libpr18841bn.so (-z now) FAIL: Run pr18841 with libpr18841cn.so (-z now) bfd/ PR ld/18841 * elf32-arm.c (elf32_arm_reloc_type_class): Return reloc_class_ifunc for ifunc symbols. ld/testsuite/ * ld-arm/ifunc-12.rd: Update relocations order. * ld-arm/ifunc-3.rd: Likewise. * ld-arm/ifunc-4.rd: Likewise.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra2-2/+2
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-12-21enable-non-contiguous-regions warningsAlan Modra4-4/+8
The warning about discarded sections in elf_link_input_bfd doesn't belong there since the code is dealing with symbols. Multiple symbols in a discarded section will result in multiple identical warnings about the section. Move the warning to a new function in ldlang.c. The patch also tidies the warning quoting of section and file names, consistently using `%pA' and `%pB'. I'm no stickler for one style of section and file name quoting, but they ought to be consistent within a warning, eg. see the first one fixed in ldlang.c, and when a warning is emitted for multiple targets they all ought to use exactly the same format string to reduce translation work. elf64-ppc.c loses the build_one_stub errors since we won't get there before hitting the fatal errors in size_one_stub. bfd/ * elflink.c (elf_link_input_bfd): Don't warn here about discarded sections. * elf32-arm.c (arm_build_one_stub): Use consistent style in --enable-non-contiguous-regions error. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * xcofflink.c (xcoff_build_one_stub): Likewise. * elf64-ppc.c (ppc_size_one_stub): Likewise. (ppc_build_one_stub): Delete dead code. ld/ * ldlang.c (lang_add_section): Use consistent style in --enable-non-contiguous-regions warnings. (size_input_section): Likewise. (warn_non_contiguous_discards): New function. (lang_process): Call it. * testsuite/ld-arm/non-contiguous-arm.d: Update. * testsuite/ld-arm/non-contiguous-arm4.d: Update. * testsuite/ld-arm/non-contiguous-arm7.d: Add --enable-non-contiguous-regions-warnings. * testsuite/ld-arm/non-contiguous-arm7.err: New. * testsuite/ld-powerpc/non-contiguous-powerpc.d: Update. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: Update.
2022-12-20bfd: Discard symbol regardless of warning flagTorbjörn SVENSSON4-0/+53
The discard of symbols should be performed whether the warning for the discard is enabled or not. Without this patch, ld would segfault in bfd_section_removed_from_list, called in the if-statement right after this block, as the argument isec->output_section can be NULL. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Co-Authored-By: Yvan ROUX <yvan.roux@foss.st.com>
2022-11-02arm: PR 29739 Fix typo where ';' should not have been replaced with '@'Christophe Lyon3-3/+3
';' does not always indicate the start of a comment, and commit 8cb6e17571f3fb66ccd4fa19f881602542cd06fc incorrectly replaced 3 instances of ';' with '@' in expected diagnostics, leading to tests failures. This patch restores the original ';' as needed in these testcases. Fixes bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29739
2022-11-01opcodes/arm: use '@' consistently for the comment characterAndrew Burgess115-1209/+1209
Looking at the ARM disassembler output, every comment seems to start with a ';' character, so I assumed this was the correct character to start an assembler comment. I then spotted a couple of places where there was no ';', but instead, just a '@' character. I thought that this was a case of a missing ';', and proposed a patch to add the missing ';' characters. Turns out I was wrong, '@' is actually the ARM assembler comment character, while ';' is the statement separator. Thus this: nop ;@ comment is two statements, the first is the 'nop' instruction, while the second contains no instructions, just the '@ comment' comment text. This: nop @ comment is a single 'nop' instruction followed by a comment. And finally, this: nop ; comment is two statements, the first contains the 'nop' instruction, while the second contains the instruction 'comment', which obviously isn't actually an instruction at all. Why this matters is that, in the next commit, I would like to add libopcodes syntax styling support for ARM. The question then is how should the disassembler style the three cases above? As '@' is the actual comment start character then clearly the '@' and anything after it can be styled as a comment. But what about ';' in the second example? Style as text? Style as a comment? And the third example is even harder, what about the 'comment' text? Style as an instruction mnemonic? Style as text? Style as a comment? I think the only sensible answer is to move the disassembler to use '@' consistently as its comment character, and remove all the uses of ';'. Then, in the next commit, it's obvious what to do. There's obviously a *lot* of tests that get updated by this commit, the only actual code changes are in opcodes/arm-dis.c.
2022-10-27Re: ld/testsuite: adjust ld-arm to run shared tests only when supportedAlan Modra1-2/+2
commit 67527cffcd enabled previously disabled tests unresolved-1-dyn, thumb-plt and thumb-plt-got for nacl. The first fails due to trying to link against mixed-lib.so which isn't compiled for nacl. The last two fail with objdump: tmpdir/dump(.rel.plt): relocation 0 has invalid symbol index 14885104 and readelf: Error: bad symbol index: 00e320f0 in reloc Relocation section '.rel.plt' at offset 0x128 contains 1 entry: Offset Info Type Sym. Value Symbol's Name e320f000 e320f000 R_ARM_NONE * testsuite/ld-arm/arm-elf.exp: Disable unresolved-1-dyn, thumb-plt and thumb-plt-got for nacl.
2022-10-24ld/testsuite: adjust ld-arm to run shared tests only when supportedClément Chigot1-159/+166
If a custom arm-elf target is disabling the shared support, a lot of failures are reported by the testsuite. Moreover, some tests try to access libraries which have been explicitly skipped earlier (eg mixed-lib.so). ld/ChangeLog: * testsuite/ld-arm/arm-elf.exp: Separate tests needing shared lib support.
2022-08-13readelf: print 0x0 as 0, and remove trailing spacesAlan Modra1-9/+9
This changes readelf output a little, removing the 0x prefix on hex output when the value is 0, except in cases where a fixed field width is shown. %#010x is not a good replacement for 0x%08x.
2022-06-25arm: Define elf_backend_extern_protected_data to 0 [PR 18705]Fangrui Song1-1/+1
Similar to commit 4fb55bf6a9606eb7b626c30a9f4e71d6c2d4fbb2 for aarch64. Commit b68a20d6675f1360ea4db50a9835c073675b9889 changed ld to produce R_ARM_GLOB_DAT but that defeated the purpose of protected visibility as an optimization. Restore the previous behavior (which matches ld.lld) by defining elf_backend_extern_protected_data to 0.
2022-05-31Trailing spaces in objdump -r headerAlan Modra20-20/+20
git commit 202be274a4 went a little wild in removing trailing spaces in gas/testsuite/gas/i386/{secidx.d,secrel.d}, causing x86_64-w64-mingw32 +FAIL: i386 secrel reloc x86_64-w64-mingw32 +FAIL: i386 secidx reloc I could have just replaced the trailing space, but let's fix the objdump output instead. Touches lots of testsuite files.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra2-2/+2
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-09-21Change the linker's heuristic for computing the entry point for binaries so ↵Nick Clifton1-1/+1
that shared libraries default to an entry point of 0. * ldlang.c (lang_end): When computing the entry point, only try the start address of the entry section when creating an executable. * ld.texi (Entry point): Update description of heuristic used to choose the entry point. testsuite/ld-alpha/tlspic.rd: Update expected entry point address. testsuite/ld-arm/tls-gdesc-got.d: Likewise. testsuite/ld-i386/tlsnopic.rd: Likewise. testsuite/ld-ia64/tlspic.rd: Likewise. testsuite/ld-sparc/gotop32.rd: Likewise. testsuite/ld-sparc/gotop64.rd: Likewise. testsuite/ld-sparc/tlssunnopic32.rd: Likewise. testsuite/ld-sparc/tlssunnopic64.rd: Likewise. testsuite/ld-sparc/tlssunpic32.rd: Likewise. testsuite/ld-sparc/tlssunpic64.rd: Likewise. testsuite/ld-tic6x/shlib-1.rd: Likewise. testsuite/ld-tic6x/shlib-1b.rd: Likewise. testsuite/ld-tic6x/shlib-1r.rd: Likewise. testsuite/ld-tic6x/shlib-1rb.rd: Likewise. testsuite/ld-tic6x/shlib-noindex.rd: Likewise. testsuite/ld-x86-64/pr14207.d: Likewise. testsuite/ld-x86-64/tlsdesc.rd: Likewise. testsuite/ld-x86-64/tlspic.rd: Likewise. testsuite/ld-x86-64/tlspic2.rd: Likewise.
2021-08-11Deprecate a.out support for NetBSD targets.John Ericson1-2/+2
As discussed previously, a.out support is now quite deprecated, and in some cases removed, in both Binutils itself and NetBSD, so this legacy default makes little sense. `netbsdelf*` and `netbsdaout*` still work allowing the user to be explicit about there choice. Additionally, the configure script warns about the change as Nick Clifton requested. One possible concern was the status of NetBSD on NS32K, where only a.out was supported. But per [1] NetBSD has removed support, and if it were to come back, it would be with ELF. The binutils implementation is therefore marked obsolete, per the instructions in the last message. With that patch and this one applied, I have confirmed the following: --target=i686-unknown-netbsd --target=i686-unknown-netbsdelf builds completely --target=i686-unknown-netbsdaout properly fails because target is deprecated. --target=vax-unknown-netbsdaout builds completely except for gas, where the target is deprecated. [1]: https://mail-index.netbsd.org/tech-toolchain/2021/07/19/msg004025.html --- bfd/config.bfd | 43 +++++++++++++-------- bfd/configure.ac | 5 +-- binutils/testsuite/binutils-all/nm.exp | 2 +- binutils/testsuite/lib/binutils-common.exp | 7 +--- config/picflag.m4 | 4 +- gas/configure.tgt | 9 +++-- gas/testsuite/gas/arm/blx-bl-convert.d | 2 +- gas/testsuite/gas/arm/blx-local-thumb.d | 2 +- gas/testsuite/gas/sh/basic.exp | 2 +- gdb/configure.host | 34 +++++++---------- gdb/configure.tgt | 2 +- gdb/testsuite/gdb.asm/asm-source.exp | 6 +-- intl/configure | 2 +- ld/configure.tgt | 44 +++++++++++----------- ld/testsuite/ld-arm/arm-elf.exp | 4 +- ld/testsuite/ld-elf/elf.exp | 2 +- ld/testsuite/ld-elf/shared.exp | 4 +- libiberty/configure | 4 +-
2021-05-12arm: fix fallout from recent thumb2 detection patchRichard Earnshaw1-1/+1
The recent change to correct the detection of thumb2 object files resulted in a ld test for veneering starting to fail. The problem was the test itself, which was incorrectly expecting thumb1 type far-call veneers instead of the thumb2 flavour. We already have a dump file of the expected form, so the fix is to change the expected output accordingly. ld/ * testsuite/ld-arm/arm-elf.exp (farcall test for v8-m.mainline): Correct expected output.
2021-04-21Adjust readelf's output so that section symbols without a name as shown with ↵Nick Clifton2-4/+4
their section name. binutils* readelf.c (print_dynamic_symbol): Print the section name for section symbols without a name of their own. * testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d: Adjust expected output to allow for named section symbols. * testsuite/binutils-all/mips/global-local-symtab-sort-o32t.d: Likewise. * testsuite/binutils-all/readelf.s-64: Likewise. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. * testsuite/binutils-all/readelf.ss-tmips: Likewise. * testsuite/binutils-all/readelf.ss-unused: Likewise. ld * testsuite/ld-aarch64/variant_pcs-now.d: Adjust expected output to allow for named section symbols. * testsuite/ld-aarch64/variant_pcs-r.d: Likewise. * testsuite/ld-aarch64/variant_pcs-shared.d: Likewise. * testsuite/ld-alpha/tlsbin.rd: Likewise. * testsuite/ld-alpha/tlsbinr.rd: Likewise. * testsuite/ld-alpha/tlspic.rd: Likewise. * testsuite/ld-arm/rodata-merge-map.sym: Likewise. * testsuite/ld-arm/script-type.sym: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pr16044.d: Likewise. * testsuite/ld-elf/sec64k.exp: Likewise. * testsuite/ld-ia64/tlsbin.rd: Likewise. * testsuite/ld-ia64/tlspic.rd: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64t.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32t.d: Likewise. * testsuite/ld-mmix/bspec1.d: Likewise. * testsuite/ld-mmix/bspec2.d: Likewise. * testsuite/ld-mmix/local1.d: Likewise. * testsuite/ld-mmix/local3.d: Likewise. * testsuite/ld-mmix/local5.d: Likewise. * testsuite/ld-mmix/local7.d: Likewise. * testsuite/ld-mmix/undef-3.d: Likewise. * testsuite/ld-powerpc/tlsso.r: Likewise. * testsuite/ld-powerpc/tlsso32.r: Likewise. * testsuite/ld-powerpc/tlstocso.r: Likewise. * testsuite/ld-s390/tlsbin.rd: Likewise. * testsuite/ld-s390/tlsbin_64.rd: Likewise. * testsuite/ld-s390/tlspic.rd: Likewise. * testsuite/ld-s390/tlspic_64.rd: Likewise. * testsuite/ld-sparc/gotop32.rd: Likewise. * testsuite/ld-sparc/gotop64.rd: Likewise. * testsuite/ld-sparc/tlssunbin32.rd: Likewise. * testsuite/ld-sparc/tlssunbin64.rd: Likewise. * testsuite/ld-sparc/tlssunnopic32.rd: Likewise. * testsuite/ld-sparc/tlssunnopic64.rd: Likewise. * testsuite/ld-sparc/tlssunpic32.rd: Likewise. * testsuite/ld-sparc/tlssunpic64.rd: Likewise. * testsuite/ld-tic6x/common.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. gas * testsuite/gas/aarch64/dwarf.d: Adjust expected output to allow for named section symbols. * testsuite/gas/arm/thumbver.d: Likewise. * testsuite/gas/bfin/loop_temps.d: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/elf/section2.e-arm: Likewise. * testsuite/gas/elf/section2.e-csky: Likewise. * testsuite/gas/elf/section2.e-m32r: Likewise. * testsuite/gas/elf/section2.e-mips: Likewise. * testsuite/gas/elf/section2.e-msp430: Likewise. * testsuite/gas/elf/section2.e-riscv: Likewise. * testsuite/gas/elf/section2.e-rl78: Likewise. * testsuite/gas/elf/section2.e-rx: Likewise. * testsuite/gas/elf/section2.e-score: Likewise. * testsuite/gas/elf/section2.e-tic6x: Likewise. * testsuite/gas/elf/section2.e-unused: Likewise. * testsuite/gas/elf/section2.e-v850: Likewise. * testsuite/gas/elf/section2.e-xtensa: Likewise. * testsuite/gas/ia64/alias-ilp32.d: Likewise. * testsuite/gas/ia64/alias.d: Likewise. * testsuite/gas/ia64/global.d: Likewise. * testsuite/gas/microblaze/relax_size.elf: Likewise. * testsuite/gas/microblaze/relax_size2.elf: Likewise. * testsuite/gas/mips/global-local-symtab-sort-n64t.d: Likewise. * testsuite/gas/mips/global-local-symtab-sort-o32t.d: Likewise. * testsuite/gas/mmix/bspec-1.d: Likewise. * testsuite/gas/mmix/byte-1.d: Likewise. * testsuite/gas/mmix/comment-1.d: Likewise. * testsuite/gas/mmix/loc-1.d: Likewise. * testsuite/gas/mmix/loc-2.d: Likewise. * testsuite/gas/mmix/loc-3.d: Likewise. * testsuite/gas/mmix/loc-4.d: Likewise. * testsuite/gas/mmix/loc-5.d: Likewise. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
2021-02-09Remove arm-symbianelfAlan Modra3-25/+0
* configure.ac: Delete arm*-*-symbianelf* entry. * configure: Regenerate. bfd/ * config.bfd (arm*-*-symbianelf*): Move from obsolete to removed. * configure.ac: Delete symbian entries. * elf-bfd.h (enum elf_target_os): Delete is_symbian. * elf32-arm.c: Remove symbian support. Formatting. * targets.c: Delete symbian entries. * configure: Regenerate. binutils/ * testsuite/lib/binutils-common.exp (supports_gnu_osabi): Remove symbianelf. gas/ * Makefile.am (TARG_ENV_HFILES): Remove config/te-symbian.h. * config/tc-arm.c (elf32_arm_target_format): Remove TE_SYMBIAN support. * config/te-symbian.h: Delete. * configure.tgt: Remove arm-*-symbianelf*. * testsuite/gas/arm/arch4t-eabi.d: Don't mention symbianelf in target selection. * testsuite/gas/arm/arch4t.d: Likewise. * testsuite/gas/arm/got_prel.d: Likewise. * testsuite/gas/arm/mapdir.d: Likewise. * testsuite/gas/arm/mapmisc.d: Likewise. * testsuite/gas/arm/mapsecs.d: Likewise. * testsuite/gas/arm/mapshort-eabi.d: Likewise. * testsuite/gas/arm/thumb-eabi.d: Likewise. * testsuite/gas/arm/thumb.d: Likewise. * testsuite/gas/arm/thumbrel.d: Likewise. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Remove earmsymbian.c. Don't include symbian dep file. * configure.tgt: Remove arm*-*-symbianelf* entry. * emulparams/armsymbian.sh: Delete. * ld.texi: Don't mention symbian. * scripttempl/armbpabi.sc: Delete. * testsuite/ld-arm/symbian-seg1.d: Delete. * testsuite/ld-arm/symbian-seg1.s: Delete. * testsuite/ld-arm/arm-elf.exp: Don't run symbian-seg1. * Makefile.in: Regenerate. * po/BLD-POTFILES.in: Regenerate.
2021-01-04PR26822, How to prevent a STT_FILE with absolute path in the linked imageAlan Modra4-4/+4
bfd/ PR 26822 * elflink.c (elf_link_input_bfd): Use the file base name in linker generated STT_FILE symbols. ld/ PR 26822 * testsuite/ld-arm/non-contiguous-arm2.d: Adjust STT_FILE symbol match. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm5.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbin2.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-i386/tlspic2.rd: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64t.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32t.d: Likewise. * testsuite/ld-plugin/pr17973.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbin2.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-x86-64/tlspic2.rd: Likewise. * testsuite/ld-xtensa/tlsbin.rd: Likewise. * testsuite/ld-xtensa/tlspic.rd: Likewise.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra2-2/+2
2020-08-14AArch64: Relax thumb-plt testcases regexpr.Tamar Christina2-4/+4
The regexpr in these two files are a bit strict in that they don't account for the slight changes in tags in certain arm targets which cause our address offsets to change. This changes the tests to allow slight movement in locations while still strictly checking the rest. ld/ChangeLog: 2020-08-03 Tamar Christina <tamar.christina@arm.com> * testsuite/ld-arm/thumb-plt-got.d: Relax regexpr. * testsuite/ld-arm/thumb-plt.d: Likewise.
2020-07-03Re: Change readelf's display of symbol namesAlan Modra2-14/+14
Fixes some fallout from git commit 0942c7ab94e5. PR 26028 gas/ * testsuite/gas/ia64/unwind-ilp32.d: Add -T to readelf options. gold/ * testsuite/Makefile.am (file_in_many_sections.stdout): Add -W to readelf options. * testsuite/Makefile.in: Regenerate. ld/ * testsuite/ld-arm/arm-elf.exp (vxworks1): Pass --wide to readelf when dumping relocs. * testsuite/ld-i386/i386.exp (vxworks1): Likewise. * testsuite/ld-sh/sh-vxworks.exp (vxworks1): Likewise. * testsuite/ld-sparc/sparc.exp (vxworks1): Likewise. * testsuite/ld-arm/vxworks1.rd: Adjust to suit. * testsuite/ld-i386/vxworks1.rd: Adjust. * testsuite/ld-sh/vxworks1.rd: Adjust. * testsuite/ld-sparc/vxworks1.rd: Adjust.
2020-07-02Change readelf's display of symbol names (when not in --wide mode) so that ↵Nick Clifton1-3/+3
if they are going to be truncated then "[...]" is displayed at the end. Add a comment line option to disable this enhancement and restore the old behaviour. PR 26028 binutils* readelf.c (print_symbol): Handle truncation of symbol names. (options): Add -T/--silent-truncation option. (parse_args): Handle the option. (print_dynamic_symbol): Correct calculation of width available to display symbol name. * doc/binutils.texi: Document the -T option to readelf. * NEWS: Mention the new feature. gas * testsuite/gas/ia64/group-2.d: Add -T option to readelf command line. * testsuite/gas/ia64/unwind.d: Likewise. * testsuite/gas/mmix/bspec-1.d: Likewise. * testsuite/gas/mmix/bspec-2.d: Likewise. * testsuite/gas/mmix/comment-1.d: Likewise. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise. ld * testsuite/ld-powerpc/powerpc.exp: Add -T option to readelf command line when running some tests. * testsuite/ld-arm/arm-elf.exp: Likewise. * testsuite/ld-mips-elf/mips-elf.exp: Likewise. * testsuite/ld-mmix/local1.d: Likewise. * testsuite/ld-mmix/local3.d: Likewise. * testsuite/ld-mmix/local5.d: Likewise. * testsuite/ld-mmix/local7.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise.
2020-04-14readelf: Consolidate --syms --use-dynamic with --dyn-symsH.J. Lu10-137/+147
When reconstructing dynamic symbol table from the PT_DYNAMIC segment, compute dynamic symbol table size from hash table. For DT_HASH, the number of dynamic symbol table entries equals the number of chains. For DT_GNU_HASH/DT_MIPS_XHASH, only defined symbols with non-STB_LOCAL indings are in hash table. Since DT_GNU_HASH/DT_MIPS_XHASH place all symbols with STB_LOCAL binding before symbols with other bindings and all undefined symbols defined ones in dynamic symbol table, the highest symbol index in DT_GNU_HASH/DT_MIPS_XHASH is the highest dynamic symbol table index. Rewrite print_dynamic_symbol to dump dynamic symbol table for --dyn-syms and --syms --use-dynamic. binutils/ PR binutils/25707 * readelf.c (nbuckets): New. (nchains): Likewise. (buckets): Likewise. (chains): Likewise. (ngnubuckets): Likewise. (gnubuckets): Likewise. (gnuchains): Likewise. (mipsxlat): Likewise. (ngnuchains): Likewise. (gnusymidx): Likewise. (VALID_SYMBOL_NAME): Likewise. (VALID_DYNAMIC_NAME): Use it. (get_dynamic_data): Moved before process_dynamic_section. (get_num_dynamic_syms): New function. (process_dynamic_section): Use DT_SYMTAB, DT_SYMENT, DT_HASH, DT_GNU_HASH and DT_MIPS_XHASH to reconstruct dynamic symbol table. Use DT_STRTAB and DT_STRSZ to reconstruct dynamic string table. (get_symbol_index_type): Don't print "bad section index" when there is no section header. (print_dynamic_symbol): Rewrite. (process_symbol_table): Call print_dynamic_symbol to dump dynamic symbol table. ld/ PR binutils/25707 * testsuite/ld-arm/armthumb-lib.sym: Updated. * testsuite/ld-arm/farcall-mixed-app.sym: Likewise. * testsuite/ld-arm/farcall-mixed-app2.sym: Likewise. * testsuite/ld-arm/fdpic-main-m.sym: Likewise. * testsuite/ld-arm/fdpic-main.sym: Likewise. * testsuite/ld-arm/fdpic-shared-m.sym: Likewise. * testsuite/ld-arm/fdpic-shared.sym: Likewise. * testsuite/ld-arm/mixed-app.sym: Likewise. * testsuite/ld-arm/mixed-lib.sym: Likewise. * testsuite/ld-arm/preempt-app.sym: Likewise. * testsuite/ld-elf/hash.d: Likewise. * testsuite/ld-elf/pr13195.d: Likewise. * testsuite/ld-elfvsb/hidden2.d: Likewise. * testsuite/ld-mips-elf/hash2.d: Likewise.
2020-04-01Arm: Skip Thumb2 PLT tests on NaCL.Tamar Christina1-2/+4
NaCL does not support dynamic linking and so these tests should be skipped under it. ld/ChangeLog: PR ld/16017 * testsuite/ld-arm/arm-elf.exp (thumb-plt, thumb-plt-got): Skip for NaCL.
2020-04-01Arm: Fix LSB of GOT for Thumb2 only PLT.Tamar Christina2-0/+15
When you have a Thumb only PLT then the address in the GOT for PLT0 needs to have the Thumb bit set since the instruction used in PLTn to get there is `ldr.w pc` which is an inter-working instruction: the PLT sequence in question is 00000120 <foo@plt>: 120: f240 0c98 movw ip, #152 ; 0x98 124: f2c0 0c01 movt ip, #1 128: 44fc add ip, pc 12a: f8dc f000 ldr.w pc, [ip] 12e: e7fc b.n 12a <foo@plt+0xa> Disassembly of section .text: 00000130 <bar>: 130: b580 push {r7, lr} 132: af00 add r7, sp, #0 134: f7ff fff4 bl 120 <foo@plt> and previously the linker would generate Hex dump of section '.got': ... 0x000101b8 40010100 00000000 00000000 10010000 @............... Which would make it jump and transition out of thumb mode and crash since you only have thumb mode on such cores. Now it correctly generates Hex dump of section '.got': ... 0x000101b8 40010100 00000000 00000000 11010000 @............... Thanks to Amol for testing patch and to rgujju for reporting it. bfd/ChangeLog: PR ld/16017 * elf32-arm.c (elf32_arm_populate_plt_entry): Set LSB of the PLT0 address in the GOT if in thumb only mode. ld/ChangeLog: PR ld/16017 * testsuite/ld-arm/arm-elf.exp (thumb-plt-got): New. * testsuite/ld-arm/thumb-plt-got.d: New test.
2020-04-01Arm: Fix thumb2 PLT branch offsets.Tamar Christina3-0/+54
When I previously changed these offsets I had incorrectly used an offset of -2 for this Thumb2 PLT. Unfortunately because we had no tests for this PLT I had missed that the result was incorrect. This patch fixes the offset to PC .-4 so that it correctly addresses the previous instruction and adds a test for this PLT stub. bfd/ChangeLog: * elf32-arm.c (elf32_thumb2_plt_entry): Fix PC-rel offset. ld/ChangeLog: * testsuite/ld-arm/arm-elf.exp (thumb-plt): New. * testsuite/ld-arm/thumb-plt.d: New test. * testsuite/ld-arm/thumb-plt.s: New test.
2020-03-18Non-contiguous memory regions support: Fix testcases after previous commitChristophe Lyon1-1/+1
2020-03-18 Christophe Lyon <christophe.lyon@linaro.org> * testsuite/ld-arm/non-contiguous-arm4.d: Fix expected output. * testsuite/ld-powerpc/non-contiguous-powerpc.d: Likewise. Change-Id: I8870800177e1ff79cdd05af13613ec53ef95681f
2020-03-13Add support for non-contiguous memory regionsChristophe Lyon14-0/+565
2020-01-06 Christophe Lyon <christophe.lyon@linaro.org> bfd/ * bfd-in2.h: Regenerate. * section.c (asection): Add already_assigned field. (BFD_FAKE_SECTION): Add default initializer for it. * ecoff.c (bfd_debug_section): Initialize already_assigned field. * elf32-arm.c (arm_build_one_stub): Add support for non_contiguous_regions. * elf32-csky.c (csky_build_one_stub): Likewise. * elf32-hppa.c (hppa_build_one_stub): Likewise. * elf32-m68hc11.c (m68hc11_elf_build_one_stub): Likewise. * elf32-m68hc12.c (m68hc12_elf_build_one_stub): Likewise. * elf32-metag.c (metag_build_one_stub): Likewise. * elf32-nios2.c (nios2_build_one_stub): Likewise. * elf64-ppc.c (ppc_build_one_stub): Likewise. (ppc_size_one_stub): Likewise. * elfnn-aarch64.c (aarch64_build_one_stub): Likewise. * elflink.c (elf_link_input_bfd): Likewise. include/ * bfdlink.h (bfd_link_info): Add non_contiguous_regions and non_contiguous_regions_warnings fields. ld/ * ldlang.c (lang_add_section): Add support for non_contiguous_regions. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (process_insert_statements): Likewise. * ldlex.h (option_values): Add OPTION_NON_CONTIGUOUS_REGIONS and OPTION_NON_CONTIGUOUS_REGIONS_WARNINGS. * lexsup.c (ld_options): Add entries for --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. (parse_args): Handle it. * NEWS: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings. * ld.texi: Add --enable-non-contiguous-regions and --enable-non-contiguous-regions-warnings documentation. * emultempl/armelf.em (elf32_arm_add_stub_section): Add SEC_LINKER_CREATED flag. * emultempl/xtensaelf.em (ld_build_required_section_dependence): Emit an error when --enable-non-contiguous-regions is used. * testsuite/ld-elf/non-contiguous.d: New. * testsuite/ld-elf/non-contiguous.ld: New. * testsuite/ld-elf/non-contiguous.s: New. * testsuite/ld-arm/arm-elf.exp: Run the new tests. * testsuite/ld-arm/arm-elf/non-contiguous-arm.s: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm2.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm3.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm4.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm5.ld: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.d: New. * testsuite/ld-arm/arm-elf/non-contiguous-arm6.ld: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests. * testsuite/ld-powerpc/non-contiguous-powerpc.d: New. * testsuite/ld-powerpc/non-contiguous-powerpc.ld: New. * testsuite/ld-powerpc/non-contiguous-powerpc.sd: New. * testsuite/ld-powerpc/non-contiguous-powerpc64.d: New.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra2-2/+2
2019-11-26Introduce new .text.sorted.* sections.Martin Liska3-0/+3
gold/ChangeLog: 2019-11-26 Martin Liska <mliska@suse.cz> * layout.cc (Layout::special_ordering_of_input_section): Add ".text.sorted". * output.cc: Special case ".text.sorted". * testsuite/section_sorting_name.cc: Cover also .text.sorted subsections. * testsuite/section_sorting_name.sh: Likewise. ld/ChangeLog: 2019-11-26 Martin Liska <mliska@suse.cz> * scripttempl/arclinux.sc: Add .text.sorted.* which is sorted by default. * scripttempl/elf.sc: Likewise. * scripttempl/elf64bpf.sc: Likewise. * scripttempl/nds32elf.sc: Likewise. * testsuite/ld-arm/arm-no-rel-plt.ld: Expect .text.sorted.* in the default linker script. * testsuite/ld-arm/fdpic-main.ld: Likewise. * testsuite/ld-arm/fdpic-shared.ld: Likewise.
2019-11-07aarch64 and arm testsuite fixes for targets lacking shared libsAlan Modra12-16/+80
* testsuite/ld-aarch64/aarch64-elf.exp: Run tests requiring pie or shared library support only when check_shared_lib_support. * testsuite/ld-aarch64/bti-pac-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-pac-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-1.d: Likewise. * testsuite/ld-aarch64/bti-plt-2.d: Likewise. * testsuite/ld-aarch64/bti-plt-3.d: Likewise. * testsuite/ld-aarch64/bti-plt-4.d: Likewise. * testsuite/ld-aarch64/bti-plt-6.d: Likewise. * testsuite/ld-aarch64/bti-plt-7.d: Likewise. * testsuite/ld-aarch64/bti-warn.d: Likewise. * testsuite/ld-aarch64/dt_textrel.d: Likewise. * testsuite/ld-aarch64/emit-relocs-258-dyn-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-259-dyn-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-264-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-266-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-268-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-269-bad.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-515.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516-be.d: Likewise. * testsuite/ld-aarch64/emit-relocs-516.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/gc-plt-relocs.d: Likewise. * testsuite/ld-aarch64/gc-relocs-257-dyn.d: Likewise. * testsuite/ld-aarch64/ifunc-1-local.d: Likewise. * testsuite/ld-aarch64/ifunc-1.d: Likewise. * testsuite/ld-aarch64/ifunc-12.d: Likewise. * testsuite/ld-aarch64/ifunc-13.d: Likewise. * testsuite/ld-aarch64/ifunc-14a.d: Likewise. * testsuite/ld-aarch64/ifunc-14b.d: Likewise. * testsuite/ld-aarch64/ifunc-14c.d: Likewise. * testsuite/ld-aarch64/ifunc-14d.d: Likewise. * testsuite/ld-aarch64/ifunc-14e.d: Likewise. * testsuite/ld-aarch64/ifunc-14f.d: Likewise. * testsuite/ld-aarch64/ifunc-15.d: Likewise. * testsuite/ld-aarch64/ifunc-16.d: Likewise. * testsuite/ld-aarch64/ifunc-18a.d: Likewise. * testsuite/ld-aarch64/ifunc-18b.d: Likewise. * testsuite/ld-aarch64/ifunc-19a.d: Likewise. * testsuite/ld-aarch64/ifunc-19b.d: Likewise. * testsuite/ld-aarch64/ifunc-2-local.d: Likewise. * testsuite/ld-aarch64/ifunc-2.d: Likewise. * testsuite/ld-aarch64/ifunc-20.d: Likewise. * testsuite/ld-aarch64/ifunc-21.d: Likewise. * testsuite/ld-aarch64/ifunc-3a.d: Likewise. * testsuite/ld-aarch64/ifunc-3b.d: Likewise. * testsuite/ld-aarch64/ifunc-5b-local.d: Likewise. * testsuite/ld-aarch64/ifunc-5b.d: Likewise. * testsuite/ld-aarch64/ifunc-6b.d: Likewise. * testsuite/ld-aarch64/ifunc-7b.d: Likewise. * testsuite/ld-aarch64/ifunc-7c.d: Likewise. * testsuite/ld-aarch64/pac-plt-1.d: Likewise. * testsuite/ld-aarch64/pac-plt-2.d: Likewise. * testsuite/ld-aarch64/pcrel_pic_defined.d: Likewise. * testsuite/ld-aarch64/pcrel_pic_undefined.d: Likewise. * testsuite/ld-aarch64/pie-bind-locally.d: Likewise. * testsuite/ld-aarch64/plt_mapping_symbol.d: Likewise. * testsuite/ld-aarch64/pr20402.d: Likewise. * testsuite/ld-aarch64/pr22764.d: Likewise. * testsuite/ld-aarch64/property-bti-pac1.d: Likewise. * testsuite/ld-aarch64/protected-data.d: Likewise. * testsuite/ld-aarch64/rela-abs-relative-be.d: Likewise. * testsuite/ld-aarch64/rela-abs-relative-opt.d: Likewise. * testsuite/ld-aarch64/rela-abs-relative.d: Likewise. * testsuite/ld-aarch64/relasz.d: Likewise. * testsuite/ld-aarch64/relocs-1027-symbolic-func.d: Likewise. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: Likewise. * testsuite/ld-aarch64/tls-desc-ie.d: Likewise. * testsuite/ld-aarch64/tls-large-desc-be.d: Likewise. * testsuite/ld-aarch64/tls-large-desc.d: Likewise. * testsuite/ld-aarch64/tls-large-ie-be.d: Likewise. * testsuite/ld-aarch64/tls-large-ie.d: Likewise. * testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: Likewise. * testsuite/ld-aarch64/tls-small-ld.d: Likewise. * testsuite/ld-aarch64/tls-tiny-desc.d: Likewise. * testsuite/ld-aarch64/tls-tiny-gd.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ie.d: Likewise. * testsuite/ld-aarch64/tls-tiny-ld.d: Likewise. * testsuite/ld-aarch64/tlsle-symbol-offset.d: Likewise. * testsuite/ld-aarch64/tlsle.d: Likewise. * testsuite/ld-aarch64/variant_pcs-now.d: Likewise. * testsuite/ld-aarch64/variant_pcs-shared.d: Likewise. * testsuite/ld-arm/arm-elf.exp: Likewise. Remove --hash-style=sysv from static tests. Consolidate armelftests_common_* vars into one. * testsuite/ld-arm/gc-hidden-1.d: Require check_shared_lib_support. * testsuite/ld-arm/movw-shared-1.d: Likewise. * testsuite/ld-arm/movw-shared-2.d: Likewise. * testsuite/ld-arm/movw-shared-3.d: Likewise. * testsuite/ld-arm/movw-shared-4.d: Likewise. * testsuite/ld-arm/pie-bind-locally.d: Likewise. * testsuite/ld-arm/protected-data.d: Likewise. * testsuite/ld-arm/rel32-reject-pie.d: Likewise. * testsuite/ld-arm/rel32-reject.d: Likewise. * testsuite/ld-arm/thumb2-bl-undefweak.d: Likewise. * testsuite/ld-arm/thumb2-bl-undefweak1.d: Likewise.
2019-10-07ld-arm/tls-gdesc-neg testAlan Modra1-1/+1
Fixes a failure on armeb-linuxeabi. * testsuite/ld-arm/tls-gdesc-neg.d: Relax target match.
2019-10-04[PR ld/25062] arm: sign extend the addend of R_ARM_TLS_GOTDESCSzabolcs Nagy3-0/+73
On 64-bit host the 32-bit addend was loaded without sign extension into an unsigned long. bfd/ChangeLog: PR ld/25062 * elf32-arm.c (elf32_arm_final_link_relocate): Sign extend data. ld/ChangeLog: PR ld/25062 * testsuite/ld-arm/arm-elf.exp: Update. * testsuite/ld-arm/tls-gdesc-neg.d: New test. * testsuite/ld-arm/tls-gdesc-neg.s: New test.
2019-09-11Rename elf32.em to elf.emAlan Modra5-5/+5
* emultempl/elf32.em: Remove "misnamed" comment. Rename to.. * emultempl/elf.em: ..this. * configure.ac (elf_list_options): Adjust TEMPLATE_NAME grep. * emulparams/aarch64cloudabi.sh (TEMPLATE_NAME): Set to elf. * emulparams/aarch64elf.sh: Likewise. * emulparams/aarch64elf32.sh: Likewise. * emulparams/aarch64fbsd.sh: Likewise. * emulparams/aarch64linux.sh: Likewise. * emulparams/aarch64linux32.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/armelf.sh: Likewise. * emulparams/armelf_fuchsia.sh: Likewise. * emulparams/armelf_linux.sh: Likewise. * emulparams/armelf_phoenix.sh: Likewise. * emulparams/armnto.sh: Likewise. * emulparams/avr1.sh: Likewise. * emulparams/avr2.sh: Likewise. * emulparams/avr25.sh: Likewise. * emulparams/avr3.sh: Likewise. * emulparams/avr31.sh: Likewise. * emulparams/avr35.sh: Likewise. * emulparams/avr4.sh: Likewise. * emulparams/avr5.sh: Likewise. * emulparams/avr51.sh: Likewise. * emulparams/avr6.sh: Likewise. * emulparams/avrtiny.sh: Likewise. * emulparams/avrxmega1.sh: Likewise. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emulparams/criself.sh: Likewise. * emulparams/crislinux.sh: Likewise. * emulparams/cskyelf.sh: Likewise. * emulparams/d10velf.sh: Likewise. * emulparams/elf32_sparc.sh: Likewise. * emulparams/elf32_spu.sh: Likewise. * emulparams/elf32_tic6x_le.sh: Likewise. * emulparams/elf32_x86_64.sh: Likewise. * emulparams/elf32am33lin.sh: Likewise. * emulparams/elf32bfin.sh: Likewise. * emulparams/elf32bfinfd.sh: Likewise. * emulparams/elf32bmip.sh: Likewise. * emulparams/elf32bmipn32-defs.sh: Likewise. * emulparams/elf32cr16.sh: Likewise. * emulparams/elf32cr16c.sh: Likewise. * emulparams/elf32crx.sh: Likewise. * emulparams/elf32epiphany.sh: Likewise. * emulparams/elf32epiphany_4x4.sh: Likewise. * emulparams/elf32frvfd.sh: Likewise. * emulparams/elf32ip2k.sh: Likewise. * emulparams/elf32lm32.sh: Likewise. * emulparams/elf32lm32fd.sh: Likewise. * emulparams/elf32lriscv-defs.sh: Likewise. * emulparams/elf32m32c.sh: Likewise. * emulparams/elf32mb_linux.sh: Likewise. * emulparams/elf32mbel_linux.sh: Likewise. * emulparams/elf32mcore.sh: Likewise. * emulparams/elf32mep.sh: Likewise. * emulparams/elf32metag.sh: Likewise. * emulparams/elf32microblaze.sh: Likewise. * emulparams/elf32mipswindiss.sh: Likewise. * emulparams/elf32or1k.sh: Likewise. * emulparams/elf32ppccommon.sh: Likewise. * emulparams/elf32rl78.sh: Likewise. * emulparams/elf32rx.sh: Likewise. * emulparams/elf32tilegx.sh: Likewise. * emulparams/elf32tilepro.sh: Likewise. * emulparams/elf32vax.sh: Likewise. * emulparams/elf32visium.sh: Likewise. * emulparams/elf32xc16x.sh: Likewise. * emulparams/elf32xc16xl.sh: Likewise. * emulparams/elf32xc16xs.sh: Likewise. * emulparams/elf32xstormy16.sh: Likewise. * emulparams/elf32xtensa.sh: Likewise. * emulparams/elf64_aix.sh: Likewise. * emulparams/elf64_ia64.sh: Likewise. * emulparams/elf64_s390.sh: Likewise. * emulparams/elf64_sparc.sh: Likewise. * emulparams/elf64alpha.sh: Likewise. * emulparams/elf64bpf.sh: Likewise. * emulparams/elf64hppa.sh: Likewise. * emulparams/elf64mmix.sh: Likewise. * emulparams/elf64rdos.sh: Likewise. * emulparams/elf64tilegx.sh: Likewise. * emulparams/elf_i386.sh: Likewise. * emulparams/elf_i386_be.sh: Likewise. * emulparams/elf_i386_ldso.sh: Likewise. * emulparams/elf_i386_vxworks.sh: Likewise. * emulparams/elf_iamcu.sh: Likewise. * emulparams/elf_k1om.sh: Likewise. * emulparams/elf_l1om.sh: Likewise. * emulparams/elf_s390.sh: Likewise. * emulparams/elf_x86_64.sh: Likewise. * emulparams/h8300elf.sh: Likewise. * emulparams/h8300elf_linux.sh: Likewise. * emulparams/hppa64linux.sh: Likewise. * emulparams/hppaelf.sh: Likewise. * emulparams/hppalinux.sh: Likewise. * emulparams/i386lynx.sh: Likewise. * emulparams/i386moss.sh: Likewise. * emulparams/i386nto.sh: Likewise. * emulparams/m32relf.sh: Likewise. * emulparams/m32relf_linux.sh: Likewise. * emulparams/m68hc11elf.sh: Likewise. * emulparams/m68hc11elfb.sh: Likewise. * emulparams/m68hc12elf.sh: Likewise. * emulparams/m68hc12elfb.sh: Likewise. * emulparams/m68kelf.sh: Likewise. * emulparams/mn10300.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nios2elf.sh: Likewise. * emulparams/nios2linux.sh: Likewise. * emulparams/pruelf.sh: Likewise. * emulparams/score3_elf.sh: Likewise. * emulparams/shelf.sh: Likewise. * emulparams/shelf_nto.sh: Likewise. * emulparams/shelf_vxworks.sh: Likewise. * emulparams/shlelf_linux.sh: Likewise. * emulparams/shlelf_nto.sh: Likewise. * emulparams/v850.sh: Likewise. * emulparams/v850_rh850.sh: Likewise. * ldelf.c: Update comment. * ldelf.h: Likewise. * emultempl/aarch64elf.em: Likewise. * emultempl/alphaelf.em: Likewise. * emultempl/arclinux.em: Likewise. * emultempl/armelf.em: Likewise. * emultempl/avrelf.em: Likewise. * emultempl/bfin.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/crxelf.em: Likewise. * emultempl/cskyelf.em: Likewise. * emultempl/elf-generic.em: Likewise. * emultempl/elf-x86.em: Likewise. * emultempl/epiphanyelf_4x4.em: Likewise. * emultempl/hppaelf.em: Likewise. * emultempl/ia64elf.em: Likewise. * emultempl/m68hc1xelf.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/metagelf.em: Likewise. * emultempl/mmix-elfnmmo.em: Likewise. * emultempl/mmixelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/needrelax.em: Likewise. * emultempl/nios2elf.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/pruelf.em: Likewise. * emultempl/rxelf.em: Likewise. * emultempl/scoreelf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/tic6xdsbt.em: Likewise. * emultempl/v850elf.em: Likewise. * emultempl/vms.em: Likewise. * emultempl/vxworks.em: Likewise. * emultempl/xtensaelf.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/armbpabi.sc: Likewise. * scripttempl/elf.sc: Likewise. * scripttempl/elf64bpf.sc: Likewise. * scripttempl/elf64hppa.sc: Likewise. * scripttempl/elf_chaos.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise. * scripttempl/elfd10v.sc: Likewise. * scripttempl/elfm68hc11.sc: Likewise. * scripttempl/elfm68hc12.sc: Likewise. * scripttempl/elfm9s12z.sc: Likewise. * scripttempl/elfxgate.sc: Likewise. * scripttempl/elfxtensa.sc: Likewise. * scripttempl/epiphany_4x4.sc: Likewise. * scripttempl/iq2000.sc: Likewise. * scripttempl/mep.sc: Likewise. * scripttempl/nds32elf.sc: Likewise. * scripttempl/v850.sc: Likewise. * scripttempl/v850_rh850.sc: Likewise. * scripttempl/xstormy16.sc: Likewise. * testsuite/ld-arm/arm-dyn.ld: Likewise. * testsuite/ld-arm/arm-lib.ld: Likewise. * testsuite/ld-arm/arm-no-rel-plt.ld: Likewise. * testsuite/ld-arm/fdpic-main.ld: Likewise. * testsuite/ld-arm/fdpic-shared.ld: Likewise. * testsuite/ld-elf/elf.exp: Likewise. * testsuite/ld-elf/orphan-region.d: Likewise. * testsuite/ld-elf/orphan.d: Likewise. * testsuite/ld-elf/pr349.d: Likewise. * testsuite/ld-elf/warn2.d: Likewise. * testsuite/ld-elfvsb/elf-offset.ld: Likewise. * testsuite/ld-mips-elf/mips-dyn.ld: Likewise. * testsuite/ld-mips-elf/mips-lib.ld: Likewise. * testsuite/ld-scripts/dynamic-sections.t: Likewise. * testsuite/ld-shared/elf-offset.ld: Likewise. * configure: Regenerate.
2019-08-20Arm: Fix performance issue with thumb-2 tailcallsTamar Christina23-77/+77
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc). The NOP is never executed but may result in a performance penalty on some cores. For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2 and adds a note to this in the source code for future reference. bfd/ChangeLog: * elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub, elf32_arm_stub_long_branch_v4t_thumb_thumb, elf32_arm_stub_long_branch_v4t_thumb_arm, elf32_arm_stub_short_branch_v4t_thumb_arm, elf32_arm_stub_long_branch_v4t_thumb_arm_pic, elf32_arm_stub_long_branch_v4t_thumb_thumb_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to previous instruction. ld/ChangeLog: * testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase. * testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-app2.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * testsuite/ld-arm/fix-arm1176-on.d: Likewise. * testsuite/ld-arm/ifunc-10.dd: Likewise. * testsuite/ld-arm/ifunc-2.dd: Likewise. * testsuite/ld-arm/ifunc-4.dd: Likewise. * testsuite/ld-arm/ifunc-6.dd: Likewise. * testsuite/ld-arm/ifunc-8.dd: Likewise. * testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise. * testsuite/ld-arm/mixed-app.d: Likewise. * testsuite/ld-arm/thumb2-b-interwork.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise. * testsuite/ld-arm/tls-thumb1.d: Likewise.
2019-07-22Fixes the linker testcase "Secure gateway veneers:cmse functions debug ↵Srinath Parvathaneni1-9/+9
information missing" which was failing due to output regular expression mismatch on arm-none-linux-gnueabihf targets. * ld/testsuite/ld-arm/cmse_main_sec_debug.d: Modify regexps to allow for output from a arm-none-linux-gnueabihf target.
2019-07-02Ensure that debug information is retained for ARMv8-M security functions.Srinath Parvathaneni4-0/+198
Consider a file containing only Armv8-M secure entry functions. This file is compiled and linked with "-march=armv8-m.main -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mcmse -static --specs=rdimon.specs -Wl,--section-start,.gnu.sgstubs=0x190000 -ffunction-sections -fdata-sections -Wl,--gc-sections -g" options to generate an executable. The executable generated does not contain any debug information of these secure entry functions even though it contains secure entry functions in the .text section. This patch fixes this problem.
2019-07-01Correct the calculation of offsets for ARM exidx relocs when performing a ↵Nick Clifton1-0/+2
partial link. PR 23839 bfd * elf32-arm.c (elf32_arm_update_relocs): Do not include the section VMA in the offset used to update exidx relocs. ld * testsuite/ld-arm/unwind-4.d: Adjust for corrected calculation of exidx relocs.
2019-05-21[binutils][Arm] Fix Branch Future relocation handling and testismsAndre Vieira4-0/+47
bfd/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> PR/target 24460 * elf32-arm.c (get_value_helper): Remove. (elf32_arm_final_link_relocate): Fix branch future relocations. gas/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming conventions. * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise. * testsuite/gas/arm/armv8_1-m-loloop.d: Likewise. * testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bf-rela.d: New test. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test. ld/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/arm-elf.exp: Add tests * testsuite/ld-arm/bfs-0.s: New test. * testsuite/ld-arm/bfs-1.s: New test. * testsuite/ld-arm/branch-futures.d: New test.
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira3-0/+46
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum. ChangeLog entries are as follows: 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. (do_t_v8_1_branch): New switch case for bfcsel. (toU): Define. (insns): New instruction for bfcsel. (md_pcrel_from_section): New switch case for BFD_RELOC_THUMB_PCREL_BFCSEL. (md_appdy_fix): Likewise (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfcsel.s: New. * testsuite/ld-arm/bfcsel.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfcsel. (print_insn_thumb32): Edit the switch case for %Z.
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira3-0/+36
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFL instruction. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entrie for bfl. (do_t_v8_1_branch): New switch case for bfl. (insns): New instruction for bfl. * testsuite/gas/arm/armv8_1-m-bfl.d: New. * testsuite/gas/arm/armv8_1-m-bfl.s: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.s: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.d: New. * testsuite/gas/arm/armv8_1-m-bfl-bad.l: New. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: New. * testsuite/gas/arm/armv8_1-m-bfl-rel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfl.s: New. * testsuite/ld-arm/bfl.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfl.
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira3-0/+37
This patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BF instruction. ChangeLog entries are as follows: *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entries for bf. (do_t_branch_future): New. (insns): New instruction for bf. * testsuite/gas/arm/armv8_1-m-bf.d: New. * testsuite/gas/arm/armv8_1-m-bf.s: New. * testsuite/gas/arm/armv8_1-m-bf-bad.s: New. * testsuite/gas/arm/armv8_1-m-bf-bad.l: New. * testsuite/gas/arm/armv8_1-m-bf-bad.d: New. * testsuite/gas/arm/armv8_1-m-bf-rel.d: New. * testsuite/gas/arm/armv8_1-m-bf-rel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bf.s: New. * testsuite/ld-arm/bf.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instructions for bf.
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira3-0/+16
The patch is straightforward, it does the following: - support the new Tag_CPU_arch build attribute value, ie.: + declare the new value + update all the asserts forcing logic to be reviewed for new architectures + create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and add mapping from Tag_CPU_arch to it + teach readelf about new Tag_CPU_arch value - declare armv8.1-m.main as a supported architecture value - define Armv8.1-M Mainline in terms of feature bits available - tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature bits available - update architecture-specific logic in gas and bfd guarded by the asserts mentioned above. - tests for all the above ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * archures.c (bfd_mach_arm_8_1M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline. * elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline and update assert. (using_thumb2): Likewise. (using_thumb2_bl): Update assert. (arch_has_arm_nop): Likewise. (bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline. (tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging. *** binutils/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline Tag_CPU_arch build attribute value. Reindent. (get_aeabi_cpu_arch_from_fset): Update assert. (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. *** include/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. (MAX_TAG_CPU_ARCH): Set value to above macro. * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. (ARM_AEXT_V8_1M_MAIN): Likewise. (ARM_AEXT2_V8_1M_MAIN): Likewise. (ARM_ARCH_V8_1M_MAIN): Likewise. *** ld/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * testsuite/ld-arm/attr-merge-13.attr: New test. * testsuite/ld-arm/attr-merge-13a.s: New test. * testsuite/ld-arm/attr-merge-13b.s: New test. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
2019-03-25Arm: Fix Arm disassembler mapping symbol search.Tamar Christina2-3/+4
Similar to the AArch64 patches the Arm disassembler has the same issues with out of order sections but also a few short comings. For one thing there are multiple code blocks to determine mapping symbols, and they all work slightly different, and neither fully correct. The first thing this patch does is centralise the mapping symbols search into one function mapping_symbol_for_insn. This function is then updated to perform a search in a similar way as AArch64. Their used to be a value has_mapping_symbols which was used to determine the default disassembly for objects that have no mapping symbols. The problem with the approach was that it was determining this value in the same loop that needed it, which is why this field could take on the states -1, 0, 1 where -1 means "don't know". However this means that until you actually find a mapping symbol or reach the end of the disassembly glob, you don't know if you did the right action or not, and if you didn't you can't correct it anymore. This is why the two jump-reloc-veneers-* testcases end up disassembling some insn as data when they shouldn't. Out of order here refers to an object file where sections are not listed in a monotonic increasing VMA order. The ELF ABI for Arm [1] specifies the following for mapping symbols: 1) A text section must always have a corresponding mapping symbol at it's start. 2) Data sections do not require any mapping symbols. 3) The range of a mapping symbol extends from the address it starts on up to the next mapping symbol (exclusive) or section end (inclusive). However there is no defined order between a symbol and it's corresponding mapping symbol in the symbol table. This means that while in general we look up for a corresponding mapping symbol, we have to make at least one check of the symbol below the address being disassembled. When disassembling different PCs within the same section, the search for mapping symbol can be cached somewhat. We know that the mapping symbol corresponding to the current PC is either the previous one used, or one at the same address as the current PC. However this optimization and mapping symbol search must stop as soon as we reach the end or start of the section. Furthermore if we're only disassembling a part of a section, the search is a allowed to search further than the current chunk, but is not allowed to search past it (The mapping symbol if there, must be at the same address, so in practice we usually stop at PC+4). lastly, since only data sections don't require a mapping symbol the default mapping type should be DATA and not INSN as previously defined, however if the binary has had all its symbols stripped than this isn't very useful. To fix this we determine the default based on the section flags. This will allow the disassembler to be more useful on stripped binaries. If there is no section than we assume you to be disassembling INSN. [1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7 binutils/ChangeLog: * testsuite/binutils-all/arm/in-order-all.d: New test. * testsuite/binutils-all/arm/in-order.d: New test. * testsuite/binutils-all/arm/objdump.exp: Support .d tests. * testsuite/binutils-all/arm/out-of-order-all.d: New test. * testsuite/binutils-all/arm/out-of-order.T: New test. * testsuite/binutils-all/arm/out-of-order.d: New test. * testsuite/binutils-all/arm/out-of-order.s: New test. ld/ChangeLog: * testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly. * testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly. opcodes/ChangeLog: * arm-dis.c (struct arm_private_data): Remove has_mapping_symbols. (mapping_symbol_for_insn): Implement new algorithm. (print_insn): Remove duplicate code.
generated by cgit v1.1 at 2024-09-27 09:02:17 +0000