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Handle R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC.
Convert
add name@gottpoff(%rip), %reg
mov name@gottpoff(%rip), %reg
to
add $name@tpoff, %reg
mov $name@tpoff, %reg
and
lea name@tlsdesc(%rip), %reg
to
mov $name@tpoff, %reg
mov name@gottpoff(%rip), %reg
if the instruction is encoded with the REX2 prefix when possible.
elfcpp/
* x86_64.h (R_X86_64_CODE_4_GOTTPOFF): New.
(R_X86_64_CODE_4_GOTPC32_TLSDESC): Likewise.
gold/
* x86_64.cc (Target_x86_64::optimize_tls_reloc): Handle
R_X86_64_CODE_4_GOTPC32_TLSDESC and R_X86_64_CODE_4_GOTTPOFF.
(Target_x86_64::Scan::get_reference_flags): Likewise.
(Target_x86_64::Scan::local): Likewise.
(Target_x86_64::Scan::global): Likewise.
(Target_x86_64::Relocate::relocate): Likewise.
(Target_x86_64::Relocate::relocate_tls): Likewise.
(Target_x86_64::Relocate::tls_desc_gd_to_ie): Handle
R_X86_64_CODE_4_GOTPC32_TLSDESC.
(Target_x86_64::Relocate::tls_desc_gd_to_le): Likewise.
(Target_x86_64::Relocate::tls_ie_to_le): Handle.
R_X86_64_CODE_4_GOTTPOFF.
* testsuite/Makefile.am: Add x86_64_ie_to_le test.
* testsuite/Makefile.in: Regenerated.
* testsuite/x86_64_gd_to_le.s: Add R_X86_64_CODE_4_GOTPC32_TLSDESC
test.
* testsuite/x86_64_gd_to_le.sh: Check GDesc to LE conversion.
* testsuite/x86_64_ie_to_le.s: New file.
* testsuite/x86_64_ie_to_le.sh: Likewise.
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Handle R_X86_64_CODE_4_GOTPCRELX and convert
mov name@GOTPCREL(%rip), %r31
to
lea name@GOTPCREL(%rip), %r31
if the instruction is encoded with the REX2 prefix when possible.
elfcpp/
* x86_64.h (R_X86_64_CODE_4_GOTPCRELX): New.
gold/
* x86_64.cc (Target_x86_64::can_convert_mov_to_lea): Handle
R_X86_64_CODE_4_GOTPCRELX.
(Target_x86_64::Scan::get_reference_flags): Likewise.
(Target_x86_64::Scan::local): Likewise.
(Target_x86_64::Scan::possible_function_pointer_reloc): Likewise.
(Target_x86_64::Scan::global): Likewise.
(Target_x86_64::Relocate::relocate): Likewise.
* testsuite/x86_64_mov_to_lea1.s: Add a test for
R_X86_64_CODE_4_GOTPCRELX.
* testsuite/x86_64_mov_to_lea2.s: Likewise.
* testsuite/x86_64_mov_to_lea3.s: Likewise.
* testsuite/x86_64_mov_to_lea4.s: Likewise.
* testsuite/x86_64_mov_to_lea5.s: Likewise.
* testsuite/x86_64_mov_to_lea.sh: Updated.
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This reloc is meant for the 16-bit LWGP instruction, 0x6400/0xfc00
match/mask encoding in `micromips_opcodes'. It is correctly specified
to operate on a half-word by the howtos in elf32-mips.c, elfn32-mips.c
and elf64-mips.c, but is incorrectly subject to shuffle/unshuffle in
code like _bfd_mips_elf32_gprel16_reloc.
Current behaviour when applying the reloc to .byte 0x11,0x22,0x33,0x44
is to apply the reloc to byte 0x22 when big-endian, and to byte 0x33
when little-endian. Big-endian behaviour is unchanged after this
patch and little-endian correctly applies the reloc to byte 0x11.
The patch also corrects REL addend extraction from section contents,
and overflow checking. gold had all of the bfd problems with this
reloc and additionally did not apply the rightshift by two.
bfd/
* elfxx-mips.c (micromips_reloc_shuffle_p): Return false for
R_MICROMIPS_GPREL7_S2.
(mips_elf_calculate_relocation): Correct sign extension and
overflow calculation for R_MICROMIPS_GPREL7_S2.
(_bfd_mips_elf_relocate_section): Update small-data overflow
message.
gold/
* mips.cc (Mips_relocate_functions::should_shuffle_micromips_reloc):
Return false for R_MICROMIPS_GPREL7_S2.
(Mips_relocate_functions::mips_reloc_unshuffle): Update comment.
(Mips_relocate_functions::relgprel): Remove R_MICROMIPS_GPREL7_S2
handling.
(Mips_relocate_functions::relgprel7): New function.
(Target_mips::Relocate::relocate): Adjust to suit.
ld/
* testsuite/ld-mips-elf/reloc-4.d: Adjust expected error.
* testsuite/ld-mips-elf/reloc-5.d: Likewise.
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Fix relocation offsets values for the relaxed input sections the same
way it was fixed for the sections in PR21430.
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* intl: Remove directory. Replaced with out-of-tree GNU gettext.
* .gitignore: Add '/gettext*'.
* configure.ac (host_libs): Replace intl with gettext. (hbaseargs, bbaseargs, baseargs): Split baseargs into {h,b}baseargs. (skip_barg): New flag. Skips appending current flag to bbaseargs. <library exemptions>: Exempt --with-libintl-{type,prefix} from target and build machine argument passing.
* configure: Regenerate.
* Makefile.def (host_modules): Replace intl module with gettext module. (configure-ld): Depend on configure-gettext.
* Makefile.in: Regenerate.
* src-release.sh: Remove references to the intl/ directory.
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The std::basic_string template type is only specified for
instantiations using character types. Newer (LLVM) libc++
implementations no longer allow non-character integer types
to be used.
gold/
* output.cc: Include <uchar.h>.
(Output_section::add_merge_input_section): Use char16_t and
char32_t for 2- and 4-byte entry size, respectively.
* stringpool.cc: Include <uchar.h>.
(Stringpool_template): Explicitly instantiate for char16_t,
char32_t instead of uint16_t, uint32_t.
* merge.cc (Output_merge_string): Likewise.
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This reverts commit cf8565fb2ea42579c50722cbaeafdf71c3d58c66. It was
applied unapproved.
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This reverts commit 39834263784567c306fbccb8230ddd1badca53fe. It was
applied unapproved.
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This reverts commit adb3ae2eba78b4b84d7b94342f6774b250190a98. It was
applied unapproved.
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This reverts commit d6cdc0af2b880bb48dd16055f4cb3509c7a2da70. It was
applied unapproved.
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This reverts commit 5c4cdba100b66e2924a25dad9b12d8e5b84d527f. It was
applied unapproved.
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This reverts commit 025e84f93566c8ced594ef48ddee1dec7e5b4cdd. It was
applied unapproved.
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Following the arrangement in GCC select a 64-bit ABI by default, either
n32 or n64, rather than o32 for `mipsisa64*-*-linux*' targets, just as
with the corresponding `mips64*-*-linux*' targets.
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Use targ_size=64 and targ_extra_size=32
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So we can enable 64bit ELF support for MIPS32 toolchain.
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Only mips*el triples are supported by binutils. The mips*le
or mips*el* may cause some problem with other components of
binutils, since they will consider them as big endian.
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EM_MIPS_RS3_LE has been deprecated quite long ago, and in fact
most of current LE ELF files are using EM_MIPS.
This problem didn't make some trouble for us, is due to that
gold is a linker, and all of the inputs to it has right EM values.
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This option will be used by architectures which is big endian
by default, while little-endian support is also needed.
Mips(eb) ports are the examples.
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Caused by commit 5a97377e5513, specifically this code added to
Target_powerpc::do_relax
+ if (parameters->options().output_is_position_independent())
+ this->rela_dyn_size_
+ = this->rela_dyn_section(layout)->current_data_size();
The problem here is that if .rela.dyn isn't already created then the
call to rela_dyn_section creates it, and as this comment in
Target_powerpc::do_finalize_sections says:
// Annoyingly, we need to make these sections now whether or
// not we need them. If we delay until do_relax then we
// need to mess with the relaxation machinery checkpointing.
We can't be creating sections in do_relax.
PR 30794
* powerpc.cc (Target_powerpc::do_relax): Only set rela_dyn_size_
for size == 64, and assert that rela_dyn_ already exists.
Tidy code setting plt_thread_safe, which also only needs to be
set when size == 64 for ELFv1.
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This reverts commit 675b9d612cc59446e84e2c6d89b45500cb603a8d.
See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
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This reverts commit 32f1c80375ebe8ad25d9805ee5889f0006c51e59. It had
two unrelated changes lumped together, one of which changed the meaning
of the `mipsisa64*-*-linux*' target triplets, which was not properly
evaluated.
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get_symbol_name currently returns "" for the usual STT_SECTION symbols
generated by gas. That's not very helpful, return the section name.
Demangle local symbols too, fixing an inconsistency in
issue_discarded_error where global symbols are demangled.
* object.cc (Sized_relobj_file::get_symbol_name): Return a
std::string. Return section name for STT_SECTION symbols with
zero st_name. Sanity check st_name, and don't run off the end
of an improperly terminated .strtab. Demangle sym names.
* object.h (Sized_relobj_file::get_symbol_name): Update decl.
* target-reloc.h (issue_discarded_error): Adjust.
* powerpc.cc (Target_powerpc::Relocate::relocate): Report reloc
type and symbol for relocation overflows.
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It is possible to build huge binaries on powerpc64, where 32-bit
addresses in debug info are insufficient to descibe locations in the
binary. Help out the user, and only warn about debug overflows.
* powerpc.cc (Target_powerpc::Relocate::relocate): Warn on
relocation overflows in debug info.
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Many of the reloc error messages have already been converted from
using %C to using %H in ld.bfd, to print section+offset as well as
file/line/function. This catches a few remaining, and changes gold to
do the same.
PR 10957
bfd/
* elf32-sh.c (sh_elf_relocate_section): Use %H in error messages.
gold/
* object.cc (Relocate_info::location): Always report section+offset.
* testsuite/debug_msg.sh: Adjust to suit.
* testsuite/x32_overflow_pc32.sh: Likewise.
* testsuite/x86_64_overflow_pc32.sh: Likewise.
ld/
* emultempl/pe.em (read_addend): Use %H in error message.
* emultempl/pep.em (read_addend): Likewise.
* ldcref.c (check_reloc_refs): Likewise.
* ldmain.c (warning_find_reloc, undefined_symbol): Likewise.
* pe-dll.c (pe_create_import_fixup): Likewise.
* testsuite/ld-cris/undef2.d: Adjust expected output to suit.
* testsuite/ld-cris/undef3.d: Likewise.
* testsuite/ld-elf/shared.exp: Likewise.
* testsuite/ld-i386/compressed1.d: Likewise.
* testsuite/ld-ia64/line.exp: Likewise.
* testsuite/ld-plugin/lto.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* testsuite/ld-x86-64/compressed1.d: Likewise.
* testsuite/ld-x86-64/line.exp: Likewise.
* testsuite/ld-x86-64/pr27587.err: Likewise.
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PowerPC64 gold and ld.bfd implement an indirect branch trampoline,
used when the destination of a branch exceeds a bounce through another
"b" instruction. When generating PIEs or shared libraries, the
addresses need dynamic relocations. This was implemented in gold
using a dedicated relocation section, but this means the relative
relocations for these addresses are not sorted properly with other
dynamic relative relocations: gold doesn't support merging relocation
sections, then sorting. Instead we need to use a single .rela.dyn
section.
This is done by increasing the size of rela_dyn_ during do_relax to
account for needed dynamic relocations, delaying adding the actual
relocations until the end of relaxation once the layout has
stabilised.
* powerpc.cc (Target_powerpc): Add rela_dyn_size_;
(update_current_size): New function.
(Target_powerpc::do_relax): Capture the size of rela_dyn_ at
the start of relaxation. Artifically increase its size during
relaxation to account for needed indirect branches, and add
those relocations at the end.
(Output_data_brlt_powerpc::rel_, reset_brlt_sizes),
(finalize_brlt_sizes, add_reloc, set_current_size): Delete.
(Target_powerpc::make_brlt_section): Don't make reloc section.
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PowerPC gold adds relative dynamic relocs in do_relax. These aren't
accounted for in the value set in add_target_dynamic_tags, which is
called before do_relax. Provide a way of setting DT_RELCOUNT and
DT_RELACOUNT at the point where .dynamic is written.
* layout.cc (Layout::add_target_dynamic_tags): Add custom_relcount
parameter. Emit DT_RELCOUNT/RELACOUNT as a custom target handled
dynamic tag if set.
* layout.h(Layout::add_target_dynamic_tags): Update prototype.
* aarch64.cc (Target_aarch64::do_finalize_sections): Adjust
add_target_dynamic_tags call.
* arm.cc (Target_arm::do_finalize_sections): Likewise.
* i386.cc (Target_i386::do_finalize_sections): Likewise.
* mips.cc (Target_mips::do_finalize_sections): Likewise.
* s390.cc (Target_s390::do_finalize_sections): Likewise.
* sparc.cc (Target_sparc::do_finalize_sections): Likewise.
* tilegx.cc (Target_tilegx::do_finalize_sections): Likewise.
* x86_64.cc (Target_x86_64::do_finalize_sections): Likewise.
* powerpc.cc (Target_powerpc::do_finalize_sections): Likewise.
(Target_powerpc::do_dynamic_tag_custom_value): New function.
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DT_RELACOUNT was calculated incorrectly, and relative relocs not
sorted as they should be to the start of .rela.dyn, due to adding one
particular class of dynamic reloc using the wrong "add" method.
* powerpc.cc (Target_powerpc::Scan::global): Add relative
dyn relocs for ADDR64 and similar using add_global_relative.
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In commit 0961e631575b, the fix for PR30217, make_lplt_section and
make_brlt_section were changed to use rela_dyn_ rather than their own
separate dynamic reloc sections. This fails miserably whenever brlt_
is needed for long branches, due to needing to iterate sizing and thus
reset brlt_ sizes.
PR 30536
PR 30217
* powerpc.cc (Target_powerpc::make_brlt_section): Don't use
rela_dyn_.
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For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
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section.
PR 30187
* options.h (class General_options): Add enable-linker-version.
* layout.cc (Layout::create_gold_note): If linker-version is enabled put the version string into the .comment section.
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glibc's ld.so ignores local dynamic symbols. It's been that way
forever. We therefore can't use them on dynamic relocations. Fixing
that problem uncovered another problem in sorting of dynamic relocs,
caused no doubt by copying make_iplt_section (where we don't want
reloc sorting by the generic gold function, we want iplt relocs last)
to make_lplt_section (where we do want sorting).
PR 30217
* powerpc.cc (branch_needs_plt_entry): New function.
(Target_powerpc::plt_off): Use it here..
(Target_powerpc::Scan::global): ..and here to correct PLT16 reloc
handling for forced-local global symbols.
(Output_data_plt_powerpc::add_entry): Rename "stash"
parameter "is_local". Emit relative relocs for globals that
are forced local, and don't set_needs_dynsym_entry.
(Target_powerpc::make_lplt_section): Don't create a separate
reloc section, use rela_dyn.
(Target_powerpc::make_brlt_section): Likewise.
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We already use C99's __func__ in places, use it more generally. This
patch doesn't change uses in the testsuite. I've also left one in
gold.h that is protected by GCC_VERSION < 4003. If any of the
remaining uses bothers anyone I invite patches.
bfd/
* bfd-in.h: Replace __FUNCTION__ with __func__.
* elf32-bfin.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfxx-sparc.c: Likewise.
* bfd-in2.h: Regenerate.
gas/
* config/tc-cris.c: Replace __FUNCTION__ with __func__.
* config/tc-m68hc11.c: Likewise.
* config/tc-msp430.c: Likewise.
gold/
* dwp.h: Replace __FUNCTION__ with __func__.
* gold.h: Likewise, except for use inside GCC_VERSION < 4003.
ld/
* emultempl/pe.em: Replace __FUNCTION__ with __func__.
* emultempl/pep.em: Likewise.
* pe-dll.c: Likewise.
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The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
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Don't attempt to run gold tests with -z bndplt
* testsuite/Makefile.am (exception_x86_64_bnd_test, bnd_plt_1.sh),
(bnd_ifunc_1.sh, bnd_ifunc_2.sh): Delete rules.
* testsuite/Makefile.in: Regenerate.
* testsuite/bnd_ifunc_1.s: Delete.
* testsuite/bnd_ifunc_1.sh: Delete.
* testsuite/bnd_ifunc_2.s: Delete.
* testsuite/bnd_ifunc_2.sh: Delete.
* testsuite/bnd_plt_1.s: Delete.
* testsuite/bnd_plt_1.sh: Delete.
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bfd/ChangeLog:
* elf-linker-x86.h (struct elf_linker_x86_params): Remove
bndplt.
* elf64-x86-64.c (elf_x86_64_scan_relocs): Ignore
R_X86_64_PLT32_BND.
(elf_x86_64_relocate_section): Similarly here.
(elf_x86_64_link_setup_gnu_properties): Ignore bndplt.
* elfxx-x86.c: Likewise.
* elfxx-x86.h: Likewise.
gold/ChangeLog:
* NEWS: Document -z bndplt.
* options.h (class General_options): Remove bndplt option.
* x86_64.cc (class Output_data_plt_x86_64_bnd): Remove.
(Target_x86_64::do_make_data_plt): Do not use
Output_data_plt_x86_64_bnd.
(Target_x86_64::Scan::get_reference_flags): Likewise.
(Target_x86_64::Scan::check_non_pic): Likewise.
(Target_x86_64::Scan::local): Likewise.
(Target_x86_64::Scan::global): Likewise.
ld/ChangeLog:
* NEWS: Document -z bndplt.
* emulparams/elf_x86_64.sh: Remove bndplt option.
* ld.texi: Likewise.
* testsuite/ld-x86-64/x86-64.exp:
* testsuite/ld-x86-64/bnd-branch-1-now.d: Removed.
* testsuite/ld-x86-64/bnd-branch-1.d: Removed.
* testsuite/ld-x86-64/bnd-branch-1.s: Removed.
* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Removed.
* testsuite/ld-x86-64/bnd-ifunc-1.d: Removed.
* testsuite/ld-x86-64/bnd-ifunc-1.s: Removed.
* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Removed.
* testsuite/ld-x86-64/bnd-ifunc-2.d: Removed.
* testsuite/ld-x86-64/bnd-ifunc-2.s: Removed.
* testsuite/ld-x86-64/bnd-plt-1-now.d: Removed.
* testsuite/ld-x86-64/bnd-plt-1.d: Removed.
* testsuite/ld-x86-64/mpx.exp: Removed.
* testsuite/ld-x86-64/mpx1.out: Removed.
* testsuite/ld-x86-64/mpx1a.c: Removed.
* testsuite/ld-x86-64/mpx1a.rd: Removed.
* testsuite/ld-x86-64/mpx1b.c: Removed.
* testsuite/ld-x86-64/mpx1c.c: Removed.
* testsuite/ld-x86-64/mpx1c.rd: Removed.
* testsuite/ld-x86-64/mpx2.out: Removed.
* testsuite/ld-x86-64/mpx2a.c: Removed.
* testsuite/ld-x86-64/mpx2a.rd: Removed.
* testsuite/ld-x86-64/mpx2b.c: Removed.
* testsuite/ld-x86-64/mpx2c.c: Removed.
* testsuite/ld-x86-64/mpx2c.rd: Removed.
* testsuite/ld-x86-64/mpx3.dd: Removed.
* testsuite/ld-x86-64/mpx3a.s: Removed.
* testsuite/ld-x86-64/mpx3b.s: Removed.
* testsuite/ld-x86-64/mpx3n.dd: Removed.
* testsuite/ld-x86-64/mpx4.dd: Removed.
* testsuite/ld-x86-64/mpx4a.s: Removed.
* testsuite/ld-x86-64/mpx4b.s: Removed.
* testsuite/ld-x86-64/mpx4n.dd: Removed.
* testsuite/ld-x86-64/pr20800a.S: Removed.
* testsuite/ld-x86-64/pr20800b.S: Removed.
* testsuite/ld-x86-64/pr21038a-now.d: Removed.
* testsuite/ld-x86-64/pr21038a.d: Removed.
* testsuite/ld-x86-64/pr21038a.s: Removed.
* testsuite/ld-x86-64/pr21038b-now.d: Removed.
* testsuite/ld-x86-64/pr21038b.d: Removed.
* testsuite/ld-x86-64/pr21038b.s: Removed.
* testsuite/ld-x86-64/pr21038c-now.d: Removed.
* testsuite/ld-x86-64/pr21038c.d: Removed.
* testsuite/ld-x86-64/pr21038c.s: Removed.
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Since MPX support has been removed from x86-64 psABI, remove BND from
64-bit IBT PLT by using 32-bit IBT PLT.
PR gold/29851
* x86_64.cc (Output_data_plt_x86_64_ibt<32>::first_plt_entry):
Renamed to ...
(Output_data_plt_x86_64_ibt<size>::first_plt_entry): This.
(Output_data_plt_x86_64_ibt<64>::first_plt_entry): Removed.
(Output_data_plt_x86_64_ibt<size>::do_fill_first_plt_entry):
Drop the size == 32 check.
(Output_data_plt_x86_64_ibt<32>::plt_entry): Renamed to ...
(Output_data_plt_x86_64_ibt<size>::plt_entry): This.
(Output_data_plt_x86_64_ibt<64>::plt_entry): Removed.
(Output_data_plt_x86_64_ibt<32>::aplt_entry): Renamed to ...
(Output_data_plt_x86_64_ibt<size>::aplt_entry): This.
(Output_data_plt_x86_64_ibt<64>::aplt_entry): Removed.
(Output_data_plt_x86_64_ibt<size>::do_fill_plt_entry): Drop the
size == 32 check.
(Output_data_plt_x86_64_ibt<size>::fill_aplt_entry): Likewise.
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