| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-10-04 | gas: put emul decls in emul.h | Jan Beulich | 3 | -5/+5 |
| 2024-10-04 | gas: drop unused fields from struct emulation | Jan Beulich | 9 | -76/+0 |
| 2024-10-01 | segv in read_a_source_file | Alan Modra | 1 | -0/+1 |
| 2024-09-28 | gas buffer overflow with --listing-rhs-width | Alan Modra | 1 | -5/+18 |
| 2024-09-27 | x86: fix Solaris gas testsuite run | Jan Beulich | 1 | -1/+9 |
| 2024-09-27 | RISC-V: odd data padding vs mapping symbols | Jan Beulich | 3 | -5/+30 |
| 2024-09-27 | RISC-V: correct alignment directive handling for text sections | Jan Beulich | 6 | -17/+217 |
| 2024-09-27 | x86: optimize {,V}INSERTPS with certain immediates | Jan Beulich | 10 | -0/+202 |
| 2024-09-27 | x86: optimize {,V}EXTRACT{F,I}{128,32x{4,8},64x{2,4}} with immediate 0 | Jan Beulich | 9 | -0/+296 |
| 2024-09-27 | x86: optimize {,V}EXTRACTPS with immediate 0 | Jan Beulich | 10 | -0/+114 |
| 2024-09-27 | x86: correct {,V}PEXTR{D,Q} optimization | Jan Beulich | 1 | -0/+1 |
| 2024-09-26 | x86/testsuite: Refine AVX10.2 rounding testcases | Haochen Jiang | 2 | -2/+3 |
| 2024-09-26 | x86 TLS relocation checks | Alan Modra | 1 | -7/+8 |
| 2024-09-25 | RISC-V: Add Smrnmi extension csrs. | Jiawei | 10 | -2/+85 |
| 2024-09-24 | x86: Enable TLS relocation check only for ELF | H.J. Lu | 1 | -11/+11 |
| 2024-09-23 | Fix compile time error introduced by d774bf9b3623239a1cfa729afcf048a15da657d3... | Nick Clifton | 1 | -2/+8 |
| 2024-09-23 | x86: Turn PLT32 to PC32 only for PC-relative relocations | H.J. Lu | 5 | -1/+21 |
| 2024-09-21 | x86: Add tls check in gas | Cui, Lili | 23 | -32/+866 |
| 2024-09-20 | x86-64: Never make R_X86_64_GOT64 section relative | H.J. Lu | 3 | -0/+17 |
| 2024-09-18 | x86/APX: Don't promote AVX/AVX2 instructions out of APX spec | H.J. Lu | 7 | -44/+18 |
| 2024-09-15 | MIPS/GAS: Discard redundant instruction from DDIV/DREM macros | Maciej W. Rozycki | 12 | -29/+5 |
| 2024-09-15 | MIPS/GAS/testsuite: Print instructions in hex in division tests | Maciej W. Rozycki | 21 | -241/+249 |
| 2024-09-12 | s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraints | Jens Remus | 2 | -12/+12 |
| 2024-09-12 | s390: Simplify (dis)assembly of insn operands with const bits | Jens Remus | 1 | -7/+0 |
| 2024-09-11 | gas: avoid (scrubber) diagnostics for stuff past .end | Jan Beulich | 6 | -1/+108 |
| 2024-09-11 | gas: restrict scrubber mri_{state,last_ch} vars | Jan Beulich | 1 | -5/+7 |
| 2024-09-11 | arm: don't engage symver scrubber hack in CCS mode | Jan Beulich | 3 | -1/+20 |
| 2024-09-11 | x86: error handling in set_cpu_arch() | Jan Beulich | 1 | -30/+34 |
| 2024-09-09 | s390: Document syntax to omit base register operand | Jens Remus | 1 | -2/+3 |
| 2024-09-09 | LoongArch: Fixed precedence of expression operators in instructions | Lulu Cai | 3 | -12/+23 |
| 2024-09-07 | Add macros to get opcode of instructions approriately | Xin Wang | 2 | -122/+122 |
| 2024-09-06 | x86/APX: use D for 2-operand CFCMOVcc | Jan Beulich | 1 | -1/+7 |
| 2024-09-06 | x86/APX: optimize certain reg-only CFCMOVcc forms | Jan Beulich | 3 | -0/+55 |
| 2024-09-03 | RISC-V: Add support for XCVsimd extension in CV32E40P | Mary Bennett | 9 | -2/+4222 |
| 2024-09-02 | Support ymm rounding control for Intel AVX10.2 | Haochen Jiang | 12 | -57/+2652 |
| 2024-08-30 | x86: replace conditional operators used to calculate booleans | Jan Beulich | 1 | -10/+11 |
| 2024-08-30 | x86: limit RegRex64 use | Jan Beulich | 1 | -9/+7 |
| 2024-08-30 | gas: properly check for ELF in LISTING_NODEBUG handling | Jan Beulich | 1 | -36/+35 |
| 2024-08-30 | gas: generated code/data listing output vs .endr and alike | Jan Beulich | 3 | -0/+14 |
| 2024-08-30 | LoongArch: LoongArch64 allows relocations to use 64-bit addends | Lulu Cai | 3 | -0/+23 |
| 2024-08-28 | x86: Report invalid TLS operator | H.J. Lu | 3 | -5/+5 |
| 2024-08-27 | x86: Report invalid TLS relocation name | H.J. Lu | 3 | -94/+101 |
| 2024-08-27 | x86: Allow R_386_TLS_LE_32 with KMOVD | H.J. Lu | 3 | -4/+2 |
| 2024-08-27 | RISC-V: PR32036, Support Zcmp cm.mva01s and cm.mvsa01 instructions. | Jiawei | 4 | -1/+64 |
| 2024-08-23 | x86: simplify SAE checking | Jan Beulich | 1 | -12/+10 |
| 2024-08-23 | gas: update lex_type[] also for .mri directives | Jan Beulich | 1 | -0/+2 |
| 2024-08-23 | RISC-V: process rs_align_code also when relaxing | Jan Beulich | 2 | -35/+29 |
| 2024-08-19 | gas: ginsn: x86: pacify Wmaybe-uininitialized compiler warning | Indu Bhagat | 1 | -0/+2 |
| 2024-08-16 | gas: don't open-code LEX_*NAME | Jan Beulich | 6 | -7/+8 |
| 2024-08-15 | Revert "Arm: correct macro use in gas testsuite" | H.J. Lu | 2 | -2/+2 |
