Age | Commit message (Collapse) | Author | Files | Lines |
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2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/tc-arm.c: Changed ldra and strl-form mnemonics
to lda and stl-form for armv8.
gas/testsuite/
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
* gas/arm/inst.d: Updated.
opcodes/
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* arm-dis.c: Changed ldra and strl-form mnemonics
to lda and stl-form.
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2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
gas/testsuite/
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/crypto.d (#as): Update for v8->v8-A change.
* gas/aarch64/int-insns.d (#as): Likewise.
* gas/aarch64/legacy_reg_names.s (.arch): Likewise.
* gas/aarch64/neon-not.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist-post.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist.s (.arch): Likewise.
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* micromips-opc.c (micromips_opcodes): Correct the encoding of
the "swxc1" instruction.
gas/testsuite/
* gas/mips/micromips.d: Correct the disassembly of SWXC1.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@24k-triple-stores-1.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
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2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
* doc/c-i386.texi: Add -march={btver1, btver2} options.
gas/testsuite/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Run btver1 and btver2 test cases.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
opcodes/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
* i386-opc.h: Update CpuPRFCHW comment.
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
PR gas/14423
* gas/i386/arch-10-bdver2.d: New file.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/i386.exp: Run new test
opcodes/
2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
PR gas/14423
* i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
* i386-init.h: Regenerated.
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* gas/mmix/group-1.d, gas/mmix/group-1.s: New test.
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* config/tc-mmix.h (tc_frob_file_before_fix): Renumber sections
after call to mmix_frob_file.
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(mmix_greg_internal): Handle expressions not determinable at first
pass.
(s_loc): Ditto. Record expressions where the section isn't
determinable at the first pass, and assume they don't refer to
other sections.
(mmix_md_end): Verify that recorded LOC expressions weren't
to other sections, else emit error messages.
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2012-08-09 Maciej W. Rozycki <macro@codesourcery.com>
* elfxx-mips.c (LA25_LUI_MICROMIPS_1, LA25_LUI_MICROMIPS_2):
Remove macros, folding them into...
(LA25_LUI_MICROMIPS): ... this new macro.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise into...
(LA25_J_MICROMIPS): ... this new macro.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise
into...
(LA25_ADDIU_MICROMIPS): ... this new macro.
(bfd_put_micromips_32, bfd_get_micromips_32): New functions.
(mips_elf_create_la25_stub): Use them.
(check_br32_dslot, check_br32, check_relocated_bzc): Likewise.
(_bfd_mips_elf_relax_section): Likewise.
gas/
* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
(is_opcode_valid): Remove coprocessor instruction exclusions.
Replace OPCODE_IS_MEMBER with opcode_is_member.
(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
opcode_is_member.
(macro): Remove coprocessor instruction exclusions.
gas/
* gas/mips/mips.exp: Set has_newabi for all Linux targets.
* gas/mips/cfi-n64-1.d: Adjust for targets that do not infer the
ISA from the ABI.
* gas/mips/elf-rel-got-n32.d: Likewise.
* gas/mips/elf-rel-got-n64.d: Likewise.
* gas/mips/elf-rel-xgot-n32.d: Likewise.
* gas/mips/elf-rel-xgot-n64.d: Likewise.
* gas/mips/elf-rel18.d: Likewise.
* gas/mips/elf-rel28-n32.d: Likewise.
* gas/mips/elf-rel28-n64.d: Likewise.
* gas/mips/jal-newabi.d: Likewise.
* gas/mips/ldstla-n64-shared.d: Likewise.
* gas/mips/ldstla-n64-sym32.d: Likewise.
* gas/mips/ldstla-n64.d: Likewise.
* gas/mips/macro-warn-1-n32.d: Likewise.
* gas/mips/macro-warn-2-n32.d: Likewise.
* gas/mips/n32-consec.d: Likewise.
include/
2012-08-13 Richard Sandiford <rdsandiford@googlemail.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (mips_opcode): Add the exclusions field.
(OPCODE_IS_MEMBER): Remove macro.
(cpu_is_member): New inline function.
(opcode_is_member): Likewise.
ld/
* emulparams/elf32bmip.sh: Make _gp hidden.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emulparams/elf32mipswindiss.sh: Likewise.
* scripttempl/mips.sc: Likewise.
ld/
2012-08-28 Maciej W. Rozycki <macro@codesourcery.com>
* ld-elf/export-class.sd: New test.
* ld-elf/export-class.vd: New test.
* ld-elf/export-class-def.s: New test source.
* ld-elf/export-class-dep.s: New test source.
* ld-elf/export-class-lib.s: New test source.
* ld-elf/export-class-ref.s: New test source.
* ld-elf/export-class-lib.ver: New test version script.
* ld-elf/export-class.exp: New test script.
* ld-arm/arm-export-class.rd: New test.
* ld-arm/arm-export-class.xd: New test.
* ld-arm/export-class.exp: New test script.
* ld-i386/i386-export-class.rd: New test.
* ld-i386/i386-export-class.xd: New test.
* ld-i386/export-class.exp: New test script.
* ld-mips-elf/mips-32-export-class.rd: New test.
* ld-mips-elf/mips-32-export-class.xd: New test.
* ld-mips-elf/mips-64-export-class.rd: New test.
* ld-mips-elf/mips-64-export-class.xd: New test.
* ld-mips-elf/export-class.exp: New test script.
* ld-powerpc/powerpc-32-export-class.rd: New test.
* ld-powerpc/powerpc-32-export-class.xd: New test.
* ld-powerpc/powerpc-64-export-class.rd: New test.
* ld-powerpc/powerpc-64-export-class.xd: New test.
* ld-powerpc/export-class.exp: New test script.
* ld-x86-64/x86-64-64-export-class.rd: New test.
* ld-x86-64/x86-64-x32-export-class.rd: New test.
* ld-x86-64/export-class.exp: New test script.
opcodes/
2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
macros, use local variables for info struct member accesses,
update the type of the variable used to hold the instruction
word.
(print_insn_mips, print_mips16_insn_arg): Likewise.
(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
local variables for info struct member accesses.
(print_insn_micromips): Add GET_OP_S local macro.
(_print_insn_mips): Update the type of the variable used to hold
the instruction word.
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* config/tc-mips.c (ISA_SUPPORTS_DSP_ASE): Also set if microMIPS
mode.
(ISA_SUPPORTS_DSPR2_ASE): Likewise.
(macro_build) <'2'>: Handle microMIPS.
2012-07-31 Maciej W. Rozycki <macro@codesourcery.com>
Chao-Ying Fu <fu@mips.com>
Catherine Moore <clm@codesourcery.com>
gas/
* gas/mips/micromips@mips32-dsp.d: New test.
* gas/mips/micromips@mips32-dspr2.d: New test.
* gas/mips/mips32-dsp.s: Update padding.
* gas/mips/mips32-dspr2.s: Likewise.
* gas/mips/mips.exp: Use run_dump_test_arches to run MIPS32 DSP
tests.
2012-07-31 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
include/
2012-07-31 Chao-Ying Fu <fu@mips.com>
Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
opcodes/
2012-08-01 Alan Modra <amodra@gmail.com>
* h8300-dis.c: Fix printf arg warnings.
* i960-dis.c: Likewise.
* mips-dis.c: Likewise.
* pdp11-dis.c: Likewise.
* sh-dis.c: Likewise.
* v850-dis.c: Likewise.
* configure.in: Formatting.
* configure: Regenerate.
* rl78-decode.c: Regenerate.
* po/POTFILES.in: Regenerate.
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2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
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2_23-branch'.
Cherrypick from master 2012-09-04 13:52:06 UTC H.J. Lu <hjl.tools@gmail.com> 'Add Intel Itanium Series 9500 support':
gas/testsuite/gas/ia64/psn.d
gas/testsuite/gas/ia64/psn.s
gas/testsuite/gas/mmix/group-1.d
gas/testsuite/gas/mmix/group-1.s
ld/testsuite/ld-arm/arm-export-class.rd
ld/testsuite/ld-arm/arm-export-class.xd
ld/testsuite/ld-arm/export-class.exp
ld/testsuite/ld-elf/export-class-def.s
ld/testsuite/ld-elf/export-class-dep.s
ld/testsuite/ld-elf/export-class-lib.s
ld/testsuite/ld-elf/export-class-lib.ver
ld/testsuite/ld-elf/export-class-ref.s
ld/testsuite/ld-elf/export-class.exp
ld/testsuite/ld-elf/export-class.sd
ld/testsuite/ld-elf/export-class.vd
ld/testsuite/ld-i386/export-class.exp
ld/testsuite/ld-i386/i386-export-class.rd
ld/testsuite/ld-i386/i386-export-class.xd
ld/testsuite/ld-mips-elf/export-class.exp
ld/testsuite/ld-mips-elf/mips-32-export-class.rd
ld/testsuite/ld-mips-elf/mips-32-export-class.xd
ld/testsuite/ld-mips-elf/mips-64-export-class.rd
ld/testsuite/ld-mips-elf/mips-64-export-class.xd
ld/testsuite/ld-powerpc/export-class.exp
ld/testsuite/ld-powerpc/powerpc-32-export-class.rd
ld/testsuite/ld-powerpc/powerpc-32-export-class.xd
ld/testsuite/ld-powerpc/powerpc-64-export-class.rd
ld/testsuite/ld-powerpc/powerpc-64-export-class.xd
ld/testsuite/ld-x86-64/export-class.exp
ld/testsuite/ld-x86-64/x86-64-64-export-class.rd
ld/testsuite/ld-x86-64/x86-64-x32-export-class.rd
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Backport from mainline
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
2012-08-16 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
RBX for the third operand.
<"lswi">: Use RAX for second and NBI for the third operand.
2012-08-20 Edmar Wienskoski <edmar@freescale.com>
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
vabsduh, vabsduw, mviwsplt.
2012-08-28 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
(powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
vupklsh>: Use VXVA_MASK.
<vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
<mfvscr>: Use VXVAVB_MASK.
<mtvscr>: Use VXVDVA_MASK.
<vspltb>: Use VXUIMM4_MASK.
<vsplth>: Use VXUIMM3_MASK.
<vspltw>: Use VXUIMM2_MASK.
gas/testsuite/
Backport from mainline
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/common.d ("nop", "xnop"): Add tests.
* gas/ppc/common.s: Likewise.
* gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests.
* gas/ppc/power7.s: Likewise.
2012-08-15 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/power4.s <lq, stq>: Add more tests.
* gas/ppc/power4.d: Likewise.
2012-08-20 Edmar Wienskoski <edmar@freescale.com>
* gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw,
mviwsplt.
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bfd/:
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
gas/:
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
(do_sha1h): New function.
(do_sha1su1): Likewise.
(do_sha256su0): Likewise.
(insns): Add 2 operand SHA instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
(do_crypto_3op_1): New function.
(do_sha1c): Likewise.
(do_sha1p): Likewise.
(do_sha1m): Likewise.
(do_sha1su0): Likewise.
(do_sha256h): Likewise.
(do_sha256h2): Likewise.
(do_sha256su1): Likewise.
(insns): Add SHA 3 operand instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (neon_type_mask): Add P64 type.
(type_chk_of_el_type): Handle P64 type.
(el_type_of_type_chk): Likewise.
(do_neon_vmull): Handle VMULL.P64.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
(neon_type_mask): Add N_UNT.
(neon_check_type): Don't always decay typed to untyped sizes.
(do_crypto_2op_1): New function.
(do_aese): Likewise.
(do_aesd): Likewise.
(do_aesmc.8): Likewise.
(do_aesimc.8): Likewise.
(insns): Add AES instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (el_type_type_check): Add handling for 16-bit
floating point types.
(do_neon_cvttb_2): New function.
(do_neon_cvttb_1): Likewise.
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
(do_neon_cvtt): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
(neon_cvt_mode): Add neon_cvt_mode_r.
(do_vrint_1): New function.
(do_vrint_x): Likewise.
(do_vrint_z): Likewise.
(do_vrint_r): Likewise.
(do_vrint_a): Likewise.
(do_vrint_n): Likewise.
(do_vrint_p): Likewise.
(do_vrint_m): Likewise.
(insns): Add VRINT instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
(neon_cvt_mode): New enumeration.
(do_vfp_nsyn_cvt_fpv8): New function.
(do_neon_cvt_1): Add support for new conversions.
(do_neon_cvtr): Use neon_cvt_mode enumerator.
(do_neon_cvt): Likewise.
(do_neon_cvta): New function.
(do_neon_cvtn): Likewise.
(do_neon_cvtp): Likewise.
(do_neon_cvtm): Likewise.
(insns): Add new VCVT instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm>
* config/tc-arm.c (CVT_FLAVOUR_VAR): New define.
(CVT_VAR): New helper define.
(neon_cvt_flavour): New enumeration, function renamed...
(get_neon_cvt_flavour): ...to this.
(do_vfp_nsyn_cvt): Update to use new neon_cvt_flavour.
(do_vfp_nsyn_cvtz): Likewise.
(do_neon_cvt_1): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
(do_maxnm): New function.
(insns): Add vmaxnm, vminnm entries.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
(NEON_ENC_FPV8_): New define.
(do_vfp_nsyn_fpv8): New function.
(do_vsel): Likewise.
(insns): Add VSEL instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_rm_rn): New function.
(do_strlex): Likewise.
(do_t_strlex): Likewise.
(insns): Add support for LDRA/STRL instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_t_bkpt_hlt1): New function.
(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (insns): Add DCPS instruction.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (T16_32_TAB): Add _sevl.
(insns): Add SEVL.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (asm_barrier_opt): Add arch field.
(mark_feature_used): New function.
(parse_barrier): Check specified option is valid for the
specified architecture.
(UL_BARRIER): New macro.
(barrier_opt_names): Update for new barrier options.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_setend): Warn on deprecated SETEND.
(do_t_setend): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (do_t_it): Fully initialise now_it.
(new_automatic_it_block): Likewise.
(handle_it_block): Record whether current instruction is
conditionally executed.
* config/tc-arm.c (depr_insn_mask): New structure.
(depr_it_insns): New variable.
(it_fsm_post_encode): Warn on deprecated uses.
* config/tc-arm.h (current_it): Add new fields.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (deprecated_coproc_regs_s): New structure.
(deprecated_coproc_regs): New variable.
(deprecated_coproc_reg_count): Likewise.
(do_co_reg): Error on obsolete & warn on deprecated registers.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (check_obsolete): New function.
(do_rd_rm_rn): Check swp{b} for obsoletion.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
gas/testsuite/:
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+crypto.s: Update testcase.
* gas/arm/armv8-a+crypto.d: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+crypto.d: Update testcase.
* gas/arm/armv8-a+crypto.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+crypto.d: Update testcase.
* gas/arm/armv8-a+crypto.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+crypto.d: New testcase.
* gas/arm/armv8-a+crypto.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+fp.d: Update testcase.
* gas/arm/armv8-a+fp.s: Likewise.
* gas/arm/half-prec-vfpv3.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+fpv5.d: Update testcase.
* gas/arm/armv8-a+fpv5.s: Likewise.
* gas/arm/armv8-a+simdv3.d: Likewise.
* gas/arm/armv8-a+simdv3.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+fp.d: Update testcase.
* gas/arm/armv8-a+fp.s: Likewise.
* gas/arm/armv8-a+simd.d: Likewise.
* gas/arm/armv8-a+simd.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/testsuite/gas/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/armv8-a+simd.d: New testcase.
* gas/testsuite/gas/armv8-a+simd.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a+fp.d: New testcase.
* gas/arm/armv8-a+fp.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.l: Update testcase.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.l: Update for HLT.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a.d: Update.
* gas/arm/armv8-a.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a.s: New testcase.
* gas/arm/armv8-a.d: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-barrier.s: New testcase.
* gas/arm/armv8-a-barrier-arm.d: Likewise.
* gas/arm/armv8-a-barrier-thumb.d: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.l: Update
* gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-it-bad.d: New testcase.
* gas/arm/armv8-a-it-bad.l: Likewise.
* gas/arm/armv8-a-it-bad.s: Likewise.
* gas/arm/ldr-t-bad.s: Update testcase.
* gas/arm/ldr-t.d: Likewise.
* gas/arm/ldr-t.s: Likewise.
* gas/arm/neon-cond-bad-inc.s: Likewise.
* gas/arm/sp-pc-validations-bad-t: Likewise.
* gas/arm/vfp-fma-inc.s: Likewise.
* gas/arm/vfp-neon-syntax-inc.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.l: Update testcase.
* gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/armv8-a-bad.d: New testcase.
* gas/arm/armv8-a-bad.l: Likewise.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/depr-swp.l: Update for change in expected output.
* gas/arm/depr-swp.s: Add additional test.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/arm/attr-march-armv8-a.d: Likewise.
include/:
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
ld/testsuite/:
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* ld-arm/arm-elf.exp: Add new testcases.
* ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld-arm/attr-merge-vfp-4.d: Likewise.
* ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld-arm/attr-merge-vfp-5.d: Likewise.
* ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld-arm/attr-merge-vfp-7.d: New testcase.
* ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld-arm/attr-merge-vfp-armv8.s: Likewise.
opcodes/
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (neon_opcodes): Handle VMULL.P64.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (neon_opcodes): Add support for AES instructions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (coprocessor_opcodes): Add support for HP/DP
conversions.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (coprocessor_opcodes): Add VRINT.
(neon_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (coprocessor_opcodes): Add support for new VCVT
variants.
(neon_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
(neon_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (coprocessor_opcodes): Add VSEL.
(print_insn_coprocessor): Add new %<>c bitfield format
specifier.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
(thumb32_opcodes): Likewise.
(print_arm_insn): Add support for %<>T formatter.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (arm_opcodes): Add SEVL.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (data_barrier_option): New function.
(print_insn_arm): Use data_barrier_option.
(print_insn_thumb32): Use data_barrier_option.
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com
* arm-dis.c (COND_UNCOND): New constant.
(print_insn_coprocessor): Add support for %u format specifier.
(print_insn_neon): Likewise.
|
|
2_23-branch'.
Cherrypick from master 2012-08-24 08:14:40 UTC Matthew Gretton-Dann <matthew.gretton-dann@arm.com> ' * gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.':
gas/testsuite/gas/arm/armv8-a+crypto.d
gas/testsuite/gas/arm/armv8-a+crypto.s
gas/testsuite/gas/arm/armv8-a+fp.d
gas/testsuite/gas/arm/armv8-a+fp.s
gas/testsuite/gas/arm/armv8-a+simd.d
gas/testsuite/gas/arm/armv8-a+simd.s
gas/testsuite/gas/arm/armv8-a-bad.d
gas/testsuite/gas/arm/armv8-a-bad.l
gas/testsuite/gas/arm/armv8-a-bad.s
gas/testsuite/gas/arm/armv8-a-barrier-arm.d
gas/testsuite/gas/arm/armv8-a-barrier-thumb.d
gas/testsuite/gas/arm/armv8-a-barrier.s
gas/testsuite/gas/arm/armv8-a-it-bad.d
gas/testsuite/gas/arm/armv8-a-it-bad.l
gas/testsuite/gas/arm/armv8-a-it-bad.s
gas/testsuite/gas/arm/armv8-a.d
gas/testsuite/gas/arm/armv8-a.s
gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d
gas/testsuite/gas/arm/attr-march-armv8-a+fp.d
gas/testsuite/gas/arm/attr-march-armv8-a+simd.d
gas/testsuite/gas/arm/attr-march-armv8-a.d
gas/testsuite/gas/i386/arch-10-btver1.d
gas/testsuite/gas/i386/arch-10-btver2.d
gas/testsuite/gas/i386/nops-1-btver1.d
gas/testsuite/gas/i386/nops-1-btver2.d
gas/testsuite/gas/i386/x86-64-arch-2-btver1.d
gas/testsuite/gas/i386/x86-64-arch-2-btver2.d
gas/testsuite/gas/i386/x86-64-nops-1-btver1.d
gas/testsuite/gas/i386/x86-64-nops-1-btver2.d
ld/testsuite/ld-arm/attr-merge-vfp-7.d
ld/testsuite/ld-arm/attr-merge-vfp-7r.d
ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s
ld/testsuite/ld-arm/attr-merge-vfp-armv8.s
|
|
|
|
2_23-branch'.
Cherrypick from master 2012-08-14 11:59:05 UTC Nick Clifton <nickc@redhat.com> 'Updated Ukranian translations.':
bfd/cpu-aarch64.c
bfd/elf64-aarch64.c
gas/config/tc-aarch64.c
gas/config/tc-aarch64.h
gas/doc/c-aarch64.texi
gas/testsuite/gas/aarch64/aarch64.exp
gas/testsuite/gas/aarch64/addsub.d
gas/testsuite/gas/aarch64/addsub.s
gas/testsuite/gas/aarch64/advsimd-across.d
gas/testsuite/gas/aarch64/advsimd-across.s
gas/testsuite/gas/aarch64/advsimd-misc.d
gas/testsuite/gas/aarch64/advsimd-misc.s
gas/testsuite/gas/aarch64/advsisd-copy.d
gas/testsuite/gas/aarch64/advsisd-copy.s
gas/testsuite/gas/aarch64/advsisd-misc.d
gas/testsuite/gas/aarch64/advsisd-misc.s
gas/testsuite/gas/aarch64/alias.d
gas/testsuite/gas/aarch64/alias.s
gas/testsuite/gas/aarch64/bitfield-alias.d
gas/testsuite/gas/aarch64/bitfield-alias.s
gas/testsuite/gas/aarch64/bitfield-bfm.d
gas/testsuite/gas/aarch64/bitfield-bfm.s
gas/testsuite/gas/aarch64/bitfield-dump
gas/testsuite/gas/aarch64/bitfield-no-aliases.d
gas/testsuite/gas/aarch64/crypto.d
gas/testsuite/gas/aarch64/crypto.s
gas/testsuite/gas/aarch64/diagnostic.d
gas/testsuite/gas/aarch64/diagnostic.l
gas/testsuite/gas/aarch64/diagnostic.s
gas/testsuite/gas/aarch64/floatdp2.d
gas/testsuite/gas/aarch64/floatdp2.s
gas/testsuite/gas/aarch64/fp_cvt_int.d
gas/testsuite/gas/aarch64/fp_cvt_int.s
gas/testsuite/gas/aarch64/illegal-2.d
gas/testsuite/gas/aarch64/illegal-2.l
gas/testsuite/gas/aarch64/illegal-2.s
gas/testsuite/gas/aarch64/illegal.d
gas/testsuite/gas/aarch64/illegal.l
gas/testsuite/gas/aarch64/illegal.s
gas/testsuite/gas/aarch64/inst-directive.d
gas/testsuite/gas/aarch64/inst-directive.s
gas/testsuite/gas/aarch64/int-insns.d
gas/testsuite/gas/aarch64/int-insns.s
gas/testsuite/gas/aarch64/ldst-exclusive.d
gas/testsuite/gas/aarch64/ldst-exclusive.s
gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.d
gas/testsuite/gas/aarch64/ldst-reg-imm-post-ind.s
gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d
gas/testsuite/gas/aarch64/ldst-reg-imm-pre-ind.s
gas/testsuite/gas/aarch64/ldst-reg-pair.d
gas/testsuite/gas/aarch64/ldst-reg-pair.s
gas/testsuite/gas/aarch64/ldst-reg-reg-offset.d
gas/testsuite/gas/aarch64/ldst-reg-reg-offset.s
gas/testsuite/gas/aarch64/ldst-reg-uns-imm.d
gas/testsuite/gas/aarch64/ldst-reg-uns-imm.s
gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.d
gas/testsuite/gas/aarch64/ldst-reg-unscaled-imm.s
gas/testsuite/gas/aarch64/legacy_reg_names.d
gas/testsuite/gas/aarch64/legacy_reg_names.l
gas/testsuite/gas/aarch64/legacy_reg_names.s
gas/testsuite/gas/aarch64/mapmisc.d
gas/testsuite/gas/aarch64/mapmisc.dat
gas/testsuite/gas/aarch64/mapmisc.s
gas/testsuite/gas/aarch64/mapping.d
gas/testsuite/gas/aarch64/mapping.s
gas/testsuite/gas/aarch64/mapping2.d
gas/testsuite/gas/aarch64/mapping2.s
gas/testsuite/gas/aarch64/mapping3.d
gas/testsuite/gas/aarch64/mapping3.s
gas/testsuite/gas/aarch64/mapping4.d
gas/testsuite/gas/aarch64/mapping4.s
gas/testsuite/gas/aarch64/mov-no-aliases.d
gas/testsuite/gas/aarch64/mov.d
gas/testsuite/gas/aarch64/mov.s
gas/testsuite/gas/aarch64/movi.d
gas/testsuite/gas/aarch64/movi.s
gas/testsuite/gas/aarch64/msr.d
gas/testsuite/gas/aarch64/msr.s
gas/testsuite/gas/aarch64/neon-fp-cvt-int.d
gas/testsuite/gas/aarch64/neon-fp-cvt-int.s
gas/testsuite/gas/aarch64/neon-frint.d
gas/testsuite/gas/aarch64/neon-frint.s
gas/testsuite/gas/aarch64/neon-ins.d
gas/testsuite/gas/aarch64/neon-ins.s
gas/testsuite/gas/aarch64/neon-not.d
gas/testsuite/gas/aarch64/neon-not.s
gas/testsuite/gas/aarch64/neon-vfp-reglist-post.d
gas/testsuite/gas/aarch64/neon-vfp-reglist-post.s
gas/testsuite/gas/aarch64/neon-vfp-reglist.d
gas/testsuite/gas/aarch64/neon-vfp-reglist.s
gas/testsuite/gas/aarch64/no-aliases.d
gas/testsuite/gas/aarch64/optional.d
gas/testsuite/gas/aarch64/optional.s
gas/testsuite/gas/aarch64/programmer-friendly.d
gas/testsuite/gas/aarch64/programmer-friendly.s
gas/testsuite/gas/aarch64/reloc-data.d
gas/testsuite/gas/aarch64/reloc-data.s
gas/testsuite/gas/aarch64/reloc-insn.d
gas/testsuite/gas/aarch64/reloc-insn.s
gas/testsuite/gas/aarch64/shifted.d
gas/testsuite/gas/aarch64/shifted.s
gas/testsuite/gas/aarch64/symbol.d
gas/testsuite/gas/aarch64/symbol.s
gas/testsuite/gas/aarch64/sysreg-1.d
gas/testsuite/gas/aarch64/sysreg-1.s
gas/testsuite/gas/aarch64/sysreg.d
gas/testsuite/gas/aarch64/sysreg.s
gas/testsuite/gas/aarch64/system.d
gas/testsuite/gas/aarch64/system.s
gas/testsuite/gas/aarch64/tlbi_op.d
gas/testsuite/gas/aarch64/tlbi_op.s
gas/testsuite/gas/aarch64/tls.d
gas/testsuite/gas/aarch64/tls.s
gas/testsuite/gas/aarch64/verbose-error.d
gas/testsuite/gas/aarch64/verbose-error.l
gas/testsuite/gas/aarch64/verbose-error.s
gas/testsuite/gas/i386/arch-10-bdver2.d
gas/testsuite/gas/i386/x86-64-arch-2-bdver2.d
gas/testsuite/gas/mips/branch-swap-2.l
gas/testsuite/gas/mips/branch-swap-2.s
gas/testsuite/gas/mmix/err-fb-2.s
include/elf/aarch64.h
include/opcode/aarch64.h
ld/emulparams/aarch64elf.sh
ld/emulparams/aarch64elfb.sh
ld/emulparams/aarch64linux.sh
ld/emulparams/aarch64linuxb.sh
ld/emultempl/aarch64elf.em
ld/po/uk.po
ld/testsuite/ld-aarch64/aarch64-elf.exp
ld/testsuite/ld-aarch64/aarch64.ld
ld/testsuite/ld-aarch64/eh-frame-bar.s
ld/testsuite/ld-aarch64/eh-frame-foo.s
ld/testsuite/ld-aarch64/eh-frame.d
ld/testsuite/ld-aarch64/emit-relocs-257-be.d
ld/testsuite/ld-aarch64/emit-relocs-257.d
ld/testsuite/ld-aarch64/emit-relocs-257.s
ld/testsuite/ld-aarch64/emit-relocs-260-be.d
ld/testsuite/ld-aarch64/emit-relocs-260.d
ld/testsuite/ld-aarch64/emit-relocs-260.s
ld/testsuite/ld-aarch64/emit-relocs-262.d
ld/testsuite/ld-aarch64/emit-relocs-262.s
ld/testsuite/ld-aarch64/emit-relocs-263.d
ld/testsuite/ld-aarch64/emit-relocs-263.s
ld/testsuite/ld-aarch64/emit-relocs-264.d
ld/testsuite/ld-aarch64/emit-relocs-264.s
ld/testsuite/ld-aarch64/emit-relocs-265.d
ld/testsuite/ld-aarch64/emit-relocs-265.s
ld/testsuite/ld-aarch64/emit-relocs-266.d
ld/testsuite/ld-aarch64/emit-relocs-266.s
ld/testsuite/ld-aarch64/emit-relocs-267.d
ld/testsuite/ld-aarch64/emit-relocs-267.s
ld/testsuite/ld-aarch64/emit-relocs-268.d
ld/testsuite/ld-aarch64/emit-relocs-268.s
ld/testsuite/ld-aarch64/emit-relocs-269.d
ld/testsuite/ld-aarch64/emit-relocs-269.s
ld/testsuite/ld-aarch64/emit-relocs-270-bad.d
ld/testsuite/ld-aarch64/emit-relocs-270.d
ld/testsuite/ld-aarch64/emit-relocs-270.s
ld/testsuite/ld-aarch64/emit-relocs-271.d
ld/testsuite/ld-aarch64/emit-relocs-271.s
ld/testsuite/ld-aarch64/emit-relocs-272.d
ld/testsuite/ld-aarch64/emit-relocs-272.s
ld/testsuite/ld-aarch64/emit-relocs-273.d
ld/testsuite/ld-aarch64/emit-relocs-273.s
ld/testsuite/ld-aarch64/emit-relocs-274.d
ld/testsuite/ld-aarch64/emit-relocs-274.s
ld/testsuite/ld-aarch64/emit-relocs-275.d
ld/testsuite/ld-aarch64/emit-relocs-275.s
ld/testsuite/ld-aarch64/emit-relocs-276.d
ld/testsuite/ld-aarch64/emit-relocs-276.s
ld/testsuite/ld-aarch64/emit-relocs-277.d
ld/testsuite/ld-aarch64/emit-relocs-277.s
ld/testsuite/ld-aarch64/emit-relocs-278.d
ld/testsuite/ld-aarch64/emit-relocs-278.s
ld/testsuite/ld-aarch64/emit-relocs-279-bad.d
ld/testsuite/ld-aarch64/emit-relocs-279.d
ld/testsuite/ld-aarch64/emit-relocs-279.s
ld/testsuite/ld-aarch64/emit-relocs-280.d
ld/testsuite/ld-aarch64/emit-relocs-280.s
ld/testsuite/ld-aarch64/emit-relocs-282.d
ld/testsuite/ld-aarch64/emit-relocs-282.s
ld/testsuite/ld-aarch64/emit-relocs-283.d
ld/testsuite/ld-aarch64/emit-relocs-283.s
ld/testsuite/ld-aarch64/emit-relocs-284.d
ld/testsuite/ld-aarch64/emit-relocs-284.s
ld/testsuite/ld-aarch64/emit-relocs-285.d
ld/testsuite/ld-aarch64/emit-relocs-285.s
ld/testsuite/ld-aarch64/emit-relocs-286-bad.d
ld/testsuite/ld-aarch64/emit-relocs-286.d
ld/testsuite/ld-aarch64/emit-relocs-286.s
ld/testsuite/ld-aarch64/emit-relocs-287.d
ld/testsuite/ld-aarch64/emit-relocs-287.s
ld/testsuite/ld-aarch64/emit-relocs-299.d
ld/testsuite/ld-aarch64/emit-relocs-299.s
ld/testsuite/ld-aarch64/emit-relocs-311.d
ld/testsuite/ld-aarch64/emit-relocs-311.s
ld/testsuite/ld-aarch64/emit-relocs-312.d
ld/testsuite/ld-aarch64/emit-relocs-312.s
ld/testsuite/ld-aarch64/emit-relocs1.s
ld/testsuite/ld-aarch64/farcall-b-none-function.d
ld/testsuite/ld-aarch64/farcall-b-none-function.s
ld/testsuite/ld-aarch64/farcall-b.d
ld/testsuite/ld-aarch64/farcall-b.s
ld/testsuite/ld-aarch64/farcall-back.d
ld/testsuite/ld-aarch64/farcall-back.s
ld/testsuite/ld-aarch64/farcall-bl-none-function.d
ld/testsuite/ld-aarch64/farcall-bl-none-function.s
ld/testsuite/ld-aarch64/farcall-bl.d
ld/testsuite/ld-aarch64/farcall-bl.s
ld/testsuite/ld-aarch64/farcall-section.d
ld/testsuite/ld-aarch64/farcall-section.s
ld/testsuite/ld-aarch64/limit-b.d
ld/testsuite/ld-aarch64/limit-b.s
ld/testsuite/ld-aarch64/limit-bl.d
ld/testsuite/ld-aarch64/limit-bl.s
ld/testsuite/ld-aarch64/relocs.ld
ld/testsuite/ld-aarch64/tls-desc-ie.d
ld/testsuite/ld-aarch64/tls-desc-ie.s
ld/testsuite/ld-aarch64/tls-relax-all.d
ld/testsuite/ld-aarch64/tls-relax-all.s
ld/testsuite/ld-aarch64/tls-relax-gd-ie.d
ld/testsuite/ld-aarch64/tls-relax-gd-ie.s
ld/testsuite/ld-aarch64/tls-relax-gd-le.d
ld/testsuite/ld-aarch64/tls-relax-gd-le.s
ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d
ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.s
ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.d
ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.d
ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.s
ld/testsuite/ld-aarch64/tls-relax-gdesc-le.d
ld/testsuite/ld-aarch64/tls-relax-gdesc-le.s
ld/testsuite/ld-aarch64/tls-relax-ie-le-2.d
ld/testsuite/ld-aarch64/tls-relax-ie-le-2.s
ld/testsuite/ld-aarch64/tls-relax-ie-le-3.d
ld/testsuite/ld-aarch64/tls-relax-ie-le-3.s
ld/testsuite/ld-aarch64/tls-relax-ie-le.d
ld/testsuite/ld-aarch64/tls-relax-ie-le.s
ld/testsuite/ld-aarch64/weak-undefined.d
ld/testsuite/ld-aarch64/weak-undefined.s
ld/testsuite/ld-mips-elf/elf-rel-got-n32-embed.d
ld/testsuite/ld-mips-elf/elf-rel-got-n64-embed.d
ld/testsuite/ld-mips-elf/elf-rel-xgot-n32-embed.d
ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-embed.d
ld/testsuite/ld-mips-elf/export-class-call16-def.s
ld/testsuite/ld-mips-elf/export-class-call16-n32.dd
ld/testsuite/ld-mips-elf/export-class-call16-n32.gd
ld/testsuite/ld-mips-elf/export-class-call16-n32.s
ld/testsuite/ld-mips-elf/export-class-call16-n64.dd
ld/testsuite/ld-mips-elf/export-class-call16-n64.gd
ld/testsuite/ld-mips-elf/export-class-call16-n64.s
ld/testsuite/ld-mips-elf/export-class-call16-o32-irix.dd
ld/testsuite/ld-mips-elf/export-class-call16-o32.dd
ld/testsuite/ld-mips-elf/export-class-call16-o32.gd
ld/testsuite/ld-mips-elf/export-class-call16-o32.s
ld/testsuite/ld-mips-elf/export-class-call16.ld
ld/testsuite/ld-mips-elf/gp-hidden-64.rd
ld/testsuite/ld-mips-elf/gp-hidden-lib-64.rd
ld/testsuite/ld-mips-elf/gp-hidden-lib.rd
ld/testsuite/ld-mips-elf/gp-hidden-lib.s
ld/testsuite/ld-mips-elf/gp-hidden-ver-64.rd
ld/testsuite/ld-mips-elf/gp-hidden-ver.rd
ld/testsuite/ld-mips-elf/gp-hidden-ver.s
ld/testsuite/ld-mips-elf/gp-hidden-ver.ver
ld/testsuite/ld-mips-elf/gp-hidden.rd
ld/testsuite/ld-mips-elf/gp-hidden.s
ld/testsuite/ld-mips-elf/gp-hidden.sd
opcodes/aarch64-asm-2.c
opcodes/aarch64-asm.c
opcodes/aarch64-asm.h
opcodes/aarch64-dis-2.c
opcodes/aarch64-dis.c
opcodes/aarch64-dis.h
opcodes/aarch64-gen.c
opcodes/aarch64-opc-2.c
opcodes/aarch64-opc.c
opcodes/aarch64-opc.h
opcodes/aarch64-tbl.h
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* xgate.exp: Added hi/lo test.
* hilo.d: New test file
* hilo.s: Net test source file.
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New function to parse pseudo ops that are unreleated to
existing pseudo ops.
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New function to parse pseudo ops that are unreleated to
existing pseudo ops.
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2_23-branch'.
Cherrypick from master 2012-08-05 22:45:20 UTC Maciej W. Rozycki <macro@linux-mips.org> ' bfd/':
gas/testsuite/gas/mips/micromips@mips32-dsp.d
gas/testsuite/gas/mips/micromips@mips32-dspr2.d
gas/testsuite/gas/xgate/hilo.d
gas/testsuite/gas/xgate/hilo.s
ld/testsuite/ld-vax-elf/plt-local-hidden-pic.s
ld/testsuite/ld-vax-elf/plt-local-lib.dd
ld/testsuite/ld-vax-elf/plt-local-lib.ld
ld/testsuite/ld-vax-elf/plt-local-lib.s
ld/testsuite/ld-vax-elf/plt-local-rehidden-pic.s
ld/testsuite/ld-vax-elf/plt-local.dd
ld/testsuite/ld-vax-elf/plt-local.ld
ld/testsuite/ld-vax-elf/plt-local.s
ld/testsuite/ld-vax-elf/vax-elf.exp
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* gas/i386/inval-equ-2.l: Updated.
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constant with hex for building on cygwin.
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2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
gas/
2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
ld/
2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
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gas/
* listing.c (struct list_message): New.
(struct list_info_struct): Delete "message". Add "messages"
and "last_message".
(listing_message): Adjust.
(listing_newline): Adjust.
(print_lines): Adjust.
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operand, by silently making it the base register despite not being
specified first.
Consequently, we also permit an xmm/ymm index to be specified first
(possibly alone), nevertheless putting it in as index register.
2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register): Handle
xmm/ymm index register being specified first as well as esp/rsp
base register being specified last in a memory operand.
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2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register):
Replace literal 4 by corresponding ESP_REG_NUM.
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Jie Zhang <jzhang918@gmail.com>
gas/
* config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR
if offset is negative.
gas/testsuite/
* gas/arm/adr.d: New test.
* gas/arm/adr.s: New test.
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gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
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* tc-xgate.c: Revised assembler so that operands
are collected before the addressing mode is
determined.
include/opcode/
* xgate.h: Changed the format string for mode
XGATE_OP_DYA_MON.
opcodes/
* xgate-dis.c: Removed an IF statement that will
always be false due to overlapping operand masks.
* xgate-opc.c: Corrected 'com' opcode entry and
fixed spacing.
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* gas/i386/rep-suffix.s: Add 'rep nop' case.
* gas/i386/x86-64-rep-suffix.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to nop.
* i386-tbl.h: Regenerate.
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* gas/i386/i386.exp: Don't run rep-bsf nor rep-ret.
* gas/i386/rep-bsf.d: Removed.
* gas/i386/rep-bsf.s: Likewise.
* gas/i386/rep-ret.d: Likewise.
* gas/i386/rep-ret.s: Likewise.
* gas/i386/rep-suffix.d: Updated.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/ilp32/x86-64-rep-suffix.d: Likewise.
* gas/i386/rep-suffix.s: Add tests for bsf, bsr and ret.
* i386/x86-64-rep-suffix.s: Likewise.
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fx_subsy symbol if MD_APPLY_SYM_VALUE allows it and the symbol is
properly defined.
* config/tc-msp430.h (MD_APPLY_SYM_VALUE): Define.
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PR gas/14315
* gas/elf/common1.d: New file.
* gas/elf/common1.l: Likewise.
* gas/elf/common1.s: Likewise.
* gas/elf/common2.d: Likewise.
* gas/elf/common2.l: Likewise.
* gas/elf/common2.s: Likewise.
* gas/elf/elf.exp: Run common1 and common2.
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* config/obj-elf.c (obj_elf_weak): Don't set local.
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* frags.c (frag_offset_fixed_p): Change type of "offset" to offsetT.
* expr.c (expr, resolve_expression): Likewise for frag_off var.
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* config/tc-arm.c (parse_operands): Initialise val.
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* tc-xgate.h: Defined tc_frob_symbol.
* tc-xgate.c (xgate_frob_symbol): Wrote new function to mark
symbols as being XGATE by setting st_target_internal value.
bfd/
* elf32-xgate.c (elf32_xgate_add_symbol_hook): Added a temp patch
that forces st_target_internal to equal 1, since tc_frob_symbol
seems to need adjusting.
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* config/tc-arm.c (encode_arm_addr_mode_common): Generate an error
message if literal pool addressing is used.
* gas/arm/ldr-t-bad.s: Add test of bogus use of literal pool
addressing.
* gas/arm/ldr-t-bad.l: Update expected assembler error message
output.
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linker relaxation.
(dwarf2_gen_line_info): Generate real, local, labels for line
numbers.
(dwarf2dbg_convert_frag): Do not finalize the computation of the
frag's symbol value when linker relaxation is enabled.
(ADDR_DELTA_LIMIT): Define.
(size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT.
(emit_fixed_inc_line_addr): Likewise.
* write.c (fixup_segment): If the subtraction of two symbols
cannot be resolved but is valid, then prevent bogus range warnings
by pre-biasing add_number.
* config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0.
* gas/lns/lns.exp: Use alternate lns-common test for targets
enabling linker relaxation.
* gas/lns/lns-big-delta.d: Allow for output from architectures
with 32-bit addresses.
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* gas/i386/rep-ret.d: Update.
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* NEWS: Mention 'rep ret' too.
gas/testsuite/
* gas/i386/rep-ret.d: New file.
* gas/i386/rep-ret.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to ret.
* i386-tbl.h: Regenerate.
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* config/tc-i386.c (parse_insn): Don't complain about REP prefix
when the template has opcode_modifier.repprefixok set.
* NEWS: Mention the change.
gas/testsuite/
* gas/i386/rep-bsf.d: New file.
* gas/i386/rep-bsf.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.h (RepPrefixOk): New enum constant.
(i386_opcode_modifier): New bitfield 'repprefixok'.
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
instructions that have IsString.
* i386-tbl.h: Regenerate.
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