| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-11-18 | x86: VP2INTERSECT{D,Q} have mask register destination group | Jan Beulich | 15 | -244/+287 |
| 2024-11-18 | x86: generalize "implicit quad group" handling | Jan Beulich | 5 | -18/+39 |
| 2024-11-18 | s390: Add arch15 Concurrent-Functions Facility insns | Jens Remus | 2 | -0/+8 |
| 2024-11-13 | gas: add .cv_ucomp and .cv_scomp pseudo-directives | Mark Harmstone | 3 | -0/+124 |
| 2024-11-08 | aarch64: testsuite: remove hard-coded instruction addresses | Matthieu Longo | 1 | -26/+26 |
| 2024-11-08 | arm, objdump: print obsolote warning when 26-bit set in instructions | Andre Vieira | 5 | -76/+36 |
| 2024-11-08 | arm, objdump: Make objdump use bfd's machine detection to drive disassembly | Andre Vieira | 4 | -17/+19 |
| 2024-11-07 | arm: Skip two failing tests for wince & pe targets | Andre Simoes Dias Vieira | 2 | -0/+2 |
| 2024-11-06 | PowerPC: Merge rfc2655 and rfc2656 test cases into one future test case | Peter Bergner | 5 | -32/+18 |
| 2024-10-30 | x86/APX: support JMPABS also in assembler | Jan Beulich | 3 | -3/+26 |
| 2024-10-30 | x86/APX: squash REX prefix when REX2 is being emitted | Jan Beulich | 2 | -0/+10 |
| 2024-10-28 | RISC-V: Fix typo in gas/testsuite/gas/riscv/mapping.s | Jim Lin | 3 | -6/+6 |
| 2024-10-22 | LoongArch: Force relocation for every reference to the global offset table | Lulu Cai | 2 | -0/+48 |
| 2024-10-18 | x86: Support x86 ZHAOXIN GMI instructions | MayShao-oc | 3 | -0/+21 |
| 2024-10-16 | Support Intel AVX10.2 convert instructions | Liwei Xu | 14 | -0/+1292 |
| 2024-10-15 | x86/testsuite: Rename AVX10.2 media testcases | Haochen Jiang | 14 | -12/+12 |
| 2024-10-14 | ia64/ELF: fix HPUX testsuite fallout | Jan Beulich | 3 | -13/+13 |
| 2024-10-14 | LoongArch: Fixed R_LARCH_[32/64]_PCREL generation bug | Lulu Cai | 2 | -0/+18 |
| 2024-10-11 | bfd/ELF: restrict file alignment for object files | Jan Beulich | 5 | -18/+18 |
| 2024-10-11 | Support Intel AVX10.2 media instructions | Haochen Jiang | 18 | -0/+1604 |
| 2024-10-10 | s390: Add arch15 instructions | Andreas Krebbel | 3 | -0/+199 |
| 2024-10-08 | RISC-V: Fix implicit dependency of Zabha and Zacas | Xiao Zeng | 1 | -2/+2 |
| 2024-09-27 | x86: fix Solaris gas testsuite run | Jan Beulich | 1 | -1/+9 |
| 2024-09-27 | RISC-V: odd data padding vs mapping symbols | Jan Beulich | 2 | -0/+25 |
| 2024-09-27 | RISC-V: correct alignment directive handling for text sections | Jan Beulich | 4 | -0/+163 |
| 2024-09-27 | x86: optimize {,V}INSERTPS with certain immediates | Jan Beulich | 9 | -0/+106 |
| 2024-09-27 | x86: optimize {,V}EXTRACT{F,I}{128,32x{4,8},64x{2,4}} with immediate 0 | Jan Beulich | 8 | -0/+222 |
| 2024-09-27 | x86: optimize {,V}EXTRACTPS with immediate 0 | Jan Beulich | 9 | -0/+78 |
| 2024-09-26 | x86/testsuite: Refine AVX10.2 rounding testcases | Haochen Jiang | 2 | -2/+3 |
| 2024-09-25 | RISC-V: Add Smrnmi extension csrs. | Jiawei | 8 | -0/+79 |
| 2024-09-23 | x86: Turn PLT32 to PC32 only for PC-relative relocations | H.J. Lu | 4 | -0/+11 |
| 2024-09-21 | x86: Add tls check in gas | Cui, Lili | 18 | -8/+395 |
| 2024-09-20 | x86-64: Never make R_X86_64_GOT64 section relative | H.J. Lu | 2 | -0/+16 |
| 2024-09-18 | x86/APX: Don't promote AVX/AVX2 instructions out of APX spec | H.J. Lu | 7 | -44/+18 |
| 2024-09-15 | MIPS/GAS: Discard redundant instruction from DDIV/DREM macros | Maciej W. Rozycki | 11 | -25/+4 |
| 2024-09-15 | MIPS/GAS/testsuite: Print instructions in hex in division tests | Maciej W. Rozycki | 21 | -241/+249 |
| 2024-09-12 | s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraints | Jens Remus | 2 | -12/+12 |
| 2024-09-11 | gas: avoid (scrubber) diagnostics for stuff past .end | Jan Beulich | 5 | -0/+52 |
| 2024-09-11 | arm: don't engage symver scrubber hack in CCS mode | Jan Beulich | 2 | -0/+17 |
| 2024-09-09 | LoongArch: Fixed precedence of expression operators in instructions | Lulu Cai | 2 | -0/+11 |
| 2024-09-07 | Add macros to get opcode of instructions approriately | Xin Wang | 1 | -104/+104 |
| 2024-09-06 | x86/APX: optimize certain reg-only CFCMOVcc forms | Jan Beulich | 2 | -0/+20 |
| 2024-09-03 | RISC-V: Add support for XCVsimd extension in CV32E40P | Mary Bennett | 6 | -0/+4175 |
| 2024-09-02 | Support ymm rounding control for Intel AVX10.2 | Haochen Jiang | 10 | -0/+2583 |
| 2024-08-30 | gas: generated code/data listing output vs .endr and alike | Jan Beulich | 2 | -0/+9 |
| 2024-08-30 | LoongArch: LoongArch64 allows relocations to use 64-bit addends | Lulu Cai | 2 | -0/+20 |
| 2024-08-28 | x86: Report invalid TLS operator | H.J. Lu | 2 | -3/+3 |
| 2024-08-27 | x86: Report invalid TLS relocation name | H.J. Lu | 2 | -3/+3 |
| 2024-08-27 | x86: Allow R_386_TLS_LE_32 with KMOVD | H.J. Lu | 2 | -2/+0 |
| 2024-08-27 | RISC-V: PR32036, Support Zcmp cm.mva01s and cm.mvsa01 instructions. | Jiawei | 2 | -0/+47 |
