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2011-05-032011-05-03 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+41
bfd/ * elf32-tic6x.c (elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel, (elf32_tic6x_gc_sweep_hook, elf32_tic6x_relocate_section, elf32_tic6x_check_relocs): Add R_C6000_EHTYPE. gas/ * config/tc-tic6x.c (s_ehtype): New function. (md_pseudo_table): Add "ehtype". (tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE. * doc/c-tic6x.texi: Document .ehtype directive. ld/testsuite/ * ld-tic6x/ehtype-reloc-1-rel.d: New test. * ld-tic6x/ehtype-reloc-1.d: New test. * ld-tic6x/ehtype-reloc-1.s: New test.
2011-04-202011-04-20 Catherine Moore <clm@codesourcery.com>Catherine Moore1-69/+272
David Ung <davidu@mips.com> * config/mips.c (mips_cl_insn): Add new field complete_p. (create_insn): Initialize complete_p to zero. (BASE_REG_EQ): New. (fix_24k_align_to): New. (fix_24k_store_info): Declare. (fix_24k_sort): New. (fix_24k_record_store_info): New. (nops_for_24k): New. (nops_for_insn): Call nops_for_24k. (append_insn): Move O_constant expression handling.
2011-04-19 * config/tc-arm.c (v7m_psrs): Revert previous delta.Nick Clifton1-2/+2
* gas/arm/mrs-msr-thumb-v7e-m.s: Restore name of basepri_max register. * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. * gas/arm/arch7.d: Likewise. * gas/arm/arch7.s: Likewise. * arm-dis.c: Revert previous reversion.
2011-04-19 * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask.Nick Clifton1-3/+6
* gas/arm/mrs-msr-thumb-v7e-m.s: Likewise. * gas/arm/arch7.d: Update expected disassembly. * gas/arm/attr-march-armv7.d: Remove Microcontroller tag. * gas/arm/blx-bad.d: Only run for ELF based targets. * gas/arm/mrs-msr-thumb-v6t2.d: Likewise. * gas/arm/vldm-arm.d: Likewise. * gas/arm/mrs-msr-thumb-v7-m.d: Likewise. Remove qualifiers from PSR and IAPSR regsiter names. * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. * gas/arm/thumb2_bcond.d: Update expected disassembly to allow for relaxing of branch insns. * gas/arm/thumb32.d: Fix whitespace problems in disassembly. * config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to detect M-profile targets. (do_t_swi): Exclude v7 and higher variants from arm_ext_os test. (v7m_psrs): Fix typo: basepri_max should be basepri_mask. * arm-dis.c (psr_name): Revert previous delta. * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
2011-04-142011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel1-50/+148
* config/tc-s390.c (s390_machine): New prototype. (md_pseudo_table): New pseudo-op .machine. (s390_opcode_hash): Initialize to NULL. (s390_parse_cpu): New function. (md_parse_option): Use s390_parse_cpu. (s390_setup_opcodes): New function. (md_begin): Use s390_setup_opcodes. (s390_machine): New hook handling the new .machine pseudo. * doc/c-s390.texi: Document the new pseudo op .machine. 2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/zarch-machine.s: New testcase. * gas/s390/zarch-machine.d: New testcase output. * gas/s390/s390.exp: Execute the new testcase.
2011-04-12Start error message with lower case.H.J. Lu1-19/+19
2011-04-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_mach): Start error message with lower case. (md_begin): Likewise. (md_parse_option): Likewise. (i386_target_format): Likewise. (check_byte_reg): Likewise. (check_long_reg): Likewise. (check_qword_reg): Likewise. (check_word_reg): Likewise.
2011-04-12 PR gas/12532Nick Clifton1-0/+6
* config/tc-arm.c (relax_branch): Do not relax branches to preemptable global symbols.
2011-04-11 gas/Julian Brown1-59/+167
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support for *APSR bitmasks. (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR. Remove OP_RVC_PSR. (parse_operands): Likewise. (do_mrs): Tweak error message for constraint. (do_t_mrs): Update constraints for changes to APSR support. (do_t_msr): Likewise. Don't set PSR_f flag here. (psrs): Remove "g", "nzcvq", "nzcvqg". (insns): Tweak entries for msr and mrs instructions. opcodes/ * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. (print_insn_thumb32): Add APSR bitmask support. gas/testsuite/ * gas/arm/mrs-msr-thumb-v7-m.s: New. * gas/arm/mrs-msr-thumb-v7-m.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.l: New. * gas/arm/mrs-msr-thumb-v7-m-bad.s: New. * gas/arm/mrs-msr-thumb-v7e-m.d: New. * gas/arm/mrs-msr-thumb-v7e-m.s: New. * gas/arm/mrs-msr-arm-v7-a-bad.d: New. * gas/arm/mrs-msr-arm-v7-a-bad.l: New. * gas/arm/mrs-msr-arm-v7-a-bad.s: New. * gas/arm/mrs-msr-arm-v7-a.d: New. * gas/arm/mrs-msr-arm-v7-a.s: New. * gas/arm/mrs-msr-arm-v6.d: New. * gas/arm/mrs-msr-arm-v6.s: New. * gas/arm/mrs-msr-thumb-v6t2.d: New. * gas/arm/mrs-msr-thumb-v6t2.s: New. * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX, bitmasks for IAPSR etc. * gas/arm/arch7.s: Specify bitmask for APSR writes. * gas/arm/archv6m.s: Likewise. * msr-imm-bad.l: Tweak expected disassembly in error message. * msr-reg-bad.l: Likewise. * msr-imm.d: Tweak expected disassembly. * msr-reg.d: Likewise. * msr-reg-thumb.d: Likewise. * msr-imm.s: Specify bitmask on APSR writes. * msr-reg.s: Add comment about deprecated usage.
2011-04-112011-04-11 Kai Tietz <ktietz@redhat.com>Kai Tietz1-1/+1
* config/tc-i386.c (x86_cons): Initialize adjust with zero.
2011-04-11 * config/tc-i386.c (x86_cons): Define even for non-ELF targets.Nick Clifton2-2/+2
* config/tc-i386.h (x86_cons): Always prototype.
2011-04-11 * config/tc-cr16.c (getprocregp_image): Fix type of 'r' parameterNick Clifton1-2/+2
in order to avoid a compile time warning. (getprocreg_image): Likewise.
2011-04-11 * config/tc-cr16.c (getprocreg_image): Correct range check.Alan Modra1-3/+4
(getprocregp_image): Likewise.
2011-04-012011-04-01 Tristan Gingold <gingold@adacore.com>Tristan Gingold1-1/+1
* config/tc-ia64.c (md_apply_fix): Add a cast to avoid a warning.
2011-03-31include/elf/Bernd Schmidt1-2/+175
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE, R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs. (SHN_TIC6X_SCOMMON): Define. bfd/ * elf32-tic6x.h (struct elf32_tic6x_params): New. (elf32_tic6x_setup): Declare. * elf32-tic6x.c: Include <limits.h>. (ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define. (struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry): New structures. (elf32_tic6x_link_hash_table, is_tic6x_elf): New macros. (tic6x_elf_scom_section, tic6x_elf_scom_symbol, tic6x_elf_scom_symbol_ptr): New static variables. (elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel, elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE, R_C6000_PCR_H16 and R_C6000_PCR_L16. (elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create, elf32_tic6x_link_hash_table_free, elf32_tic6x_setup, elf32_tic6x_using_dsbt, elf32_tic6x_install_rela, elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc, elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook, elf32_tic6x_adjust_dynamic_symbol): New static functions. (elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches to weak symbols as required by the ABI. Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file as needed when generating DSBT output. (elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook, elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section, elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections, elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers, elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val, elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym): New static functions. (ELF_MAXPAGESIZE): Define to 0x1000. (bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_link_hash_table_create, bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount, elf_backend_want_got_plt, elf_backend_want_dynbss, elf_backend_plt_readonly, elf_backend_got_header_size, elf_backend_gc_sweep_hook, elf_backend_modify_program_headers, elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol, elf_backend_check_relocs, elf_backend_add_symbol_hook, elf_backend_symbol_processing, elf_backend_link_output_symbol_hook, elf_backend_section_from_bfd_section, elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections, elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections, elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define. * bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE, BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add. * bfd/bfd-in2.h: Regenerate. * bfd/libbfd.h: Regenerate. * config.bfd: Accept tic6x-*-* instead of tic6x-*-elf. gas/ * config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New static variables. (md_begin): Initialize them. (s_tic6x_scomm): New static function. (md_pseudo_table): Add "scomm". (tc_gen_reloc): Really undo all adjustments made by bfd_install_relocation. * doc/c-tic6x.texi: Document the .scomm directive. gas/testsuite/ * gas/tic6x/scomm-directive-1.s: New test. * gas/tic6x/scomm-directive-1.d: New test. * gas/tic6x/scomm-directive-2.s: New test. * gas/tic6x/scomm-directive-2.d: New test. * gas/tic6x/scomm-directive-3.s: New test. * gas/tic6x/scomm-directive-3.d: New test. * gas/tic6x/scomm-directive-4.s: New test. * gas/tic6x/scomm-directive-4.d: New test. * gas/tic6x/scomm-directive-5.s: New test. * gas/tic6x/scomm-directive-5.d: New test. * gas/tic6x/scomm-directive-6.s: New test. * gas/tic6x/scomm-directive-6.d: New test. * gas/tic6x/scomm-directive-7.s: New test. * gas/tic6x/scomm-directive-7.d: New test. * gas/tic6x/scomm-directive-8.s: New test. * gas/tic6x/scomm-directive-8.d: New test. ld/ * emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE, GENERATE_SHLIB_SCRIPT): New defines. (TEXT_START_ADDR): Define differently depending on target. (.got): Redefine to include "*(.dsbt)". (SDATA_START_SYMBOLS): Remove, replace with (OTHER_GOT_SYMBOLS): New. (OTHER_BSS_SECTIONS): Define only for ELF targets. * emultempl/tic6xdsbt.em: New file. * gen-doc.texi: Set C6X. * ld.texinfo: Likewise. (Options specific to C6X uClinux targets): New section. binutils/ * readelf.c (get_symbol_index_type): Handle SCOM for TIC6X. (dump_relocations): Likewise. binutils/testsuite/ * lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*. ld/testsuite/ * ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*. * ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining pagesize to 1. * ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable linking tests. * ld-tic6x/dsbt.ld: New linker script. * ld-tic6x/dsbt-be.ld: New linker script. * ld-tic6x/dsbt-overflow.ld: New linker script. * ld-tic6x/dsbt-inrange.ld: New linker script. * ld-tic6x/shlib-1.s: New test. * ld-tic6x/shlib-2.s: New test. * ld-tic6x/shlib-app-1r.s: New test. * ld-tic6x/shlib-app-1.s: New test. * ld-tic6x/shlib-1.sd: New test. * ld-tic6x/shlib-1.dd: New test. * ld-tic6x/shlib-app-1.rd: New test. * ld-tic6x/shlib-app-1rb.rd: New test. * ld-tic6x/shlib-app-1.sd: New test. * ld-tic6x/static-app-1rb.od: New test. * ld-tic6x/shlib-app-1.dd: New test. * ld-tic6x/shlib-app-1rb.sd: New test. * ld-tic6x/static-app-1b.od: New test. * ld-tic6x/static-app-1r.od: New test. * ld-tic6x/shlib-1rb.rd: New test. * ld-tic6x/shlib-app-1rb.dd: New test. * ld-tic6x/shlib-1rb.sd: New test. * ld-tic6x/shlib-1rb.dd: New test. * ld-tic6x/shlib-app-1b.od: New test. * ld-tic6x/tic6x.exp: New test. * ld-tic6x/static-app-1rb.rd: New test. * ld-tic6x/shlib-app-1r.od: New test. * ld-tic6x/static-app-1.od: New test. * ld-tic6x/static-app-1b.rd: New test. * ld-tic6x/static-app-1r.rd: New test. * ld-tic6x/static-app-1rb.sd: New test. * ld-tic6x/static-app-1b.sd: New test. * ld-tic6x/static-app-1rb.dd: New test. * ld-tic6x/static-app-1r.sd: New test. * ld-tic6x/static-app-1b.dd: New test. * ld-tic6x/shlib-1b.rd: New test. * ld-tic6x/static-app-1r.dd: New test. * ld-tic6x/shlib-app-1b.rd: New test. * ld-tic6x/shlib-1r.rd: New test. * ld-tic6x/shlib-app-1r.rd: New test. * ld-tic6x/shlib-1b.sd: New test. * ld-tic6x/static-app-1.rd: New test. * ld-tic6x/shlib-app-1b.sd: New test. * ld-tic6x/shlib-1r.sd: New test. * ld-tic6x/shlib-1b.dd: New test. * ld-tic6x/shlib-app-1r.sd: New test. * ld-tic6x/shlib-app-1b.dd: New test. * ld-tic6x/shlib-1r.dd: New test. * ld-tic6x/static-app-1.sd: New test. * ld-tic6x/shlib-app-1r.dd: New test. * ld-tic6x/static-app-1.dd: New test. * ld-tic6x/shlib-noindex.rd: New test. * ld-tic6x/shlib-noindex.dd: New test. * ld-tic6x/shlib-noindex.sd: New test. * ld-tic6x/got-reloc-local-1.s: New test. * ld-tic6x/got-reloc-local-2.s: New test. * ld-tic6x/got-reloc-local-r.d: New test. * ld-tic6x/got-reloc-global.s: New test. * ld-tic6x/got-reloc-global-addend-1.d: New test. * ld-tic6x/got-reloc-global-addend-1.s: New test. * ld-tic6x/got-reloc-global-addend-2.d: New test. * ld-tic6x/got-reloc-inrange.d: New test. * ld-tic6x/got-reloc-overflow.d: New test. * ld-tic6x/got-reloc-global-addend-2.s: New test. * ld-tic6x/dsbt-index-error.d: New test. * ld-tic6x/dsbt-index.d: New test. * ld-tic6x/dsbt-index.s: New test. * ld-tic6x/shlib-app-1.od: New test. * ld-tic6x/shlib-app-1rb.od: New test. * ld-tic6x/shlib-1.rd: New test. * ld-tic6x/weak.d: New test. * ld-tic6x/weak-be.d: New test. * ld-tic6x/weak.s: New test. * ld-tic6x/weak-data.d: New test. * ld-tic6x/common.d: New test. * ld-tic6x/common.ld: New test. * ld-tic6x/common.s: New test.
2011-03-312011-03-31 Tristan Gingold <gingold@adacore.com>Tristan Gingold1-0/+5
* dwarf2dbg.c (DWARF2_VERSION): Define. (out_debug_line): Use it. (out_debug_aranges): Ditto. (out_debug_info): Ditto. * config/tc-ia64.h (DWARF2_VERSION): Override it.
2011-03-30 * obj-elf.c (obj_elf_section): Free malloced name.Nick Clifton1-0/+3
2011-03-302011-03-30 Tristan Gingold <gingold@adacore.com>Tristan Gingold1-22/+33
* config/tc-ppc.c (ppc_frob_symbol): Convert stsym symbols value to offset only if within is set. (ppc_stabx): Reformat. For stsym stabs, add a check and set within only for symbols.
2011-03-29PR 12610Richard Henderson3-1/+32
* config/tc-alpha.c (s_alpha_align): Don't auto-align a previous label; zap alpha_insn_label.
2011-03-29Properly handle multiple operands for x32 quad.H.J. Lu1-8/+8
gas/ 2011-03-29 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (handle_quad): Properly handle multiple operands. gas/testsuite/ 2011-03-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/quad.d: Add tests for multiple operands. * gas/i386/ilp32/quad.s: Likewise.
2011-03-29gas: blackfin: gas: blackfin: reject invalid BYTEUNPACK insnsMike Frysinger1-0/+2
The destination registers must be different with BYTEUNPACK insns, otherwise the hardware throws up an exception. So reject them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29gas: blackfin: gas: blackfin: reject invalid BYTEOP16M insnsMike Frysinger1-0/+2
The destination registers must be different with BYTEOP16M insns, otherwise the hardware throws up an exception. So reject them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29gas: blackfin: gas: blackfin: reject invalid BYTEOP16P insnsMike Frysinger1-0/+2
The destination registers must be different with BYTEOP16P insns, otherwise the hardware throws up an exception. So reject them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29gas: blackfin: reject invalid 16bit acc add insnsMike Frysinger1-0/+3
The 16bit acc add insn cannot assign the two results to the same dreg, so make sure gas rejects attempts to use this insn variant. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-28Support .quad for x32.H.J. Lu1-0/+48
gas/ 2011-03-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (handle_quad): New. (md_pseudo_table): Add "quad". gas/testsuite/ 2011-03-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/inval.s: Remove .quad. * gas/i386/ilp32/inval.l: Updated. * gas/i386/ilp32/quad.d: New. * gas/i386/ilp32/quad.s: Likewise.
2011-03-28Add support for DragonFlyBSD target.Nick Clifton2-0/+31
2011-03-242011-03-24 Eric B. Weddington <eric.weddington@atmel.com>Eric B. Weddington1-0/+6
* config/tc-avr.c (mcu_types): Add new devices: atmega325pa, atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb, at90pwm161. * doc/c-avr.texi: Document new device names.
2011-03-24gas: blackfin: reject invalid register destinations for vector add/subMike Frysinger1-1/+6
The destination registers with vector add/sub insns must be different, so make sure gas rejects attempt to write these. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24gas: blackfin: catch invalid dest dregs in dsp mult insnsMike Frysinger1-4/+8
While we were catching a few mismatches in vectorized dsp mult insns, the error we displayed was misleading. Once we fix that up, we can convert previously dead code into proper checking for destination dreg matching. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24gas: blackfin: catch invalid register combinations with SEARCH/BITMUXMike Frysinger1-0/+6
The destination registers for SEARCH cannot be the same. Same rule for the source registers for BITMUX. Signed-off-by: Mike Frsyinger <vapier@gentoo.org>
2011-03-232011-03-23 Eric B. Weddington <eric.weddington@atmel.com>Eric B. Weddington1-0/+6
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u, atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu. * doc/c-avr.texi: Document new device names.
2011-03-22/bfd:Eric B. Weddington1-3/+46
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * archures.c: Add AVR XMEGA architecture information. * cpu-avr.c (arch_info_struct): Likewise. * elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise. (elf32_avr_object_p): Likewise. /gas: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (struct avr_opcodes_s): Add opcode field. (AVR_INSN): Change definition to match. (avr_opcodes): Likewise, change to match. (mcu_types): Add XMEGA architecture names and new XMEGA device names. (md_show_usage): Add XMEGA architecture names. (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices. Add support for SPM Z+ instruction. * doc/c-avr.texi: Add documentation for XMEGA architectures and devices. /include/opcode: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA): New instruction set flags. (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA. /ld: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures. (eavrxmega?.c): Likewise. * configure.tgt (targ_extra_emuls): Likewise. * emulparams/avrxmega1.sh: New file. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation): Add avrxmega6, avrxmega7 to list of architectures for no stubs. /opcodes: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-212011-03-21 Eric B. Weddington <eric.weddington@atmel.com>Eric B. Weddington1-1/+1
* config/tc-avr.c (md_show_usage): Add "Assembler" text to output.
2011-03-18 * config/obj-elf.c (elf_frob_symbol): Report S_SET_SIZE symbolAlan Modra1-41/+4
on .size expression errors rather than symbols in the size expression.
2011-03-18 * read.c (read_a_source_file): Remove md_after_pass_hook.Alan Modra3-7/+4
Move "quit" label before set of dot_symbol. * config/tc-d10v.h (md_after_pass_hook): Don't define. * config/tc-d30v.h (md_after_pass_hook): Likewise. * config/tc-m32r.h (md_after_pass_hook): Likewise. (md_cleanup): Define to call m32r_fill_insn.
2011-03-182011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel1-0/+2
* config/tc-s390.c (md_parse_option): Add -march=all option which switches to the highest available CPU.
2011-03-16Add --size-check=[error|warning].H.J. Lu1-6/+14
gas/ 2011-03-16 H.J. Lu <hongjiu.lu@intel.com> * as.c (show_usage): Add --size-check=. (parse_args): Add and handle OPTION_SIZE_CHECK. * as.h (flag_size_check): New. * config/obj-elf.c (elf_frob_symbol): Use as_bad to report bad .size directive only for --size-check=error. * doc/as.texinfo: Document --size-check=. gas/testsuite/ 2011-03-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/bad-size.d: New. * gas/i386/bad-size.s: Likewise. * gas/i386/bad-size.warn: Likewise. * gas/i386/i386.exp: Run bad-size for ELF targets.
2011-03-15gas: blackfin: add support for bf54x-0.4Mike Frysinger1-0/+5
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-14include/elf/Richard Sandiford1-14/+11
* arm.h (R_ARM_IRELATIVE): New relocation. bfd/ * reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE entry. (elf32_arm_howto_from_type): Update accordingly. (elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE. (elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3. (arm_plt_info): New structure, split out from elf32_arm_link_hash_entry with an extra noncall_refcount field. (arm_local_iplt_info): New structure. (elf_arm_obj_tdata): Add local_iplt. (elf32_arm_local_iplt): New accessor macro. (elf32_arm_link_hash_entry): Replace plt_thumb_refcount, plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info. Change tls_type to a bitfield and add is_iplt. (elf32_arm_link_hash_newfunc): Update accordingly. (elf32_arm_allocate_local_sym_info): New function. (elf32_arm_create_local_iplt): Likewise. (elf32_arm_get_plt_info): Likewise. (elf32_arm_plt_needs_thumb_stub_p): Likewise. (elf32_arm_get_local_dynreloc_list): Likewise. (create_ifunc_sections): Likewise. (elf32_arm_copy_indirect_symbol): Update after the changes to elf32_arm_link_hash_entry. Assert the is_iplt has not yet been set. (arm_type_of_stub): Add an st_type argument. Use elf32_arm_get_plt_info to get PLT information. Assert that all STT_GNU_IFUNC references are turned into PLT references. (arm_build_one_stub): Pass the symbol type to elf32_arm_final_link_relocate. (elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub. (elf32_arm_allocate_irelocs): New function. (elf32_arm_add_dynreloc): In static objects, use .rel.iplt for all R_ARM_IRELATIVE. (elf32_arm_allocate_plt_entry): New function. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_final_link_relocate): Add an st_type parameter. Set srelgot to null for static objects. Use separate variables to record which st_value and st_type should be used when generating a dynamic relocation. Use elf32_arm_get_plt_info to find the symbol's PLT information, setting has_iplt_entry, splt, plt_offset and gotplt_offset accordingly. Check whether STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change the relocation target accordingly. Broaden assert to include .iplts. Don't set sreloc for static relocations. Assert that we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32 and R_ARM_ABS32_NOI. Generate R_ARM_IRELATIVE relocations instead of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC symbol. Pass the symbol type to arm_type_of_stub. Conditionally resolve GOT references to the .igot.plt entry. (elf32_arm_relocate_section): Update the call to elf32_arm_final_link_relocate. (elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_check_relocs): Always create ifunc sections. Set isym at the same time as setting h. Use elf32_arm_allocate_local_sym_info to allocate local symbol information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Record PLT information for local STT_GNU_IFUNC functions as well as global functions. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols. Don't remove STT_GNU_IFUNC PLTs unless all references have been removed. Update after the changes to elf32_arm_link_hash_entry. (allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT entries should live in .plt or .iplt. Check whether the .igot.plt and .got entries can be combined. Use elf32_arm_allocate_plt_entry to allocate .plt and .(i)got.plt entries. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Likewise other non-.got dynamic relocations. (elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt and dynamic relocations for local STT_GNU_IFUNC symbols. Check whether the .igot.plt and .got entries can be combined. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Use stashed section pointers intead of strcmp checks. Handle iplt and igotplt. (elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry to fill in .plt, .got.plt and .rel(a).plt entries. Point STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations resolve to it. (elf32_arm_output_plt_map_1): New function, split out from elf32_arm_output_plt_map. Handle .iplt entries. Use elf32_arm_plt_needs_thumb_stub_p. (elf32_arm_output_plt_map): Call it. (elf32_arm_output_arch_local_syms): Add mapping symbols for local .iplt entries. (elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols. (elf32_arm_swap_symbol_out): Likewise. (elf32_arm_add_symbol_hook): New function. (elf_backend_add_symbol_hook): Define for all targets. opcodes/ * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. gas/ * config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to determine whether a relocation is needed. (md_apply_fix, arm_apply_sym_value): Likewise. ld/testsuite/ * ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd, ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd, ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s, ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd, ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd, ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd, ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s, ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd, ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd, ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd, ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s, ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd, ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd, ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd, ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s, ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd, ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd, ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd, ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s, ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd, ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd, ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld, ld-arm/ifunc-static.ld: New tests. * ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d, ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update for new stub hashes. * ld-arm/arm-elf.exp: Run them.
2011-03-14include/elf/Richard Sandiford1-2/+2
* internal.h (elf_internal_sym): Add st_target_internal. * arm.h (arm_st_branch_type): New enum. (ARM_SYM_BRANCH_TYPE): New macro. bfd/ * elf-bfd.h (elf_link_hash_entry): Add target_internal. * elf.c (swap_out_syms): Set st_target_internal for each Elf_Internal_Sym. * elfcode.h (elf_swap_symbol_in): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise. * elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elflink.c (elf_link_output_extsym): Likewise. (bfd_elf_final_link): Likewise. (elf_link_add_object_symbols): Copy st_target_internal to the hash table if we see a definition. (_bfd_elf_copy_link_hash_symbol_type): Copy target_internal. * elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with a branch_type field. (a8_erratum_fix, a8_erratum_reloc): Likewise. (arm_type_of_stub): Replace actual_st_type with an actual_branch_type parameter. (arm_build_one_stub): Use branch types rather than st_types to determine the type of branch. (cortex_a8_erratum_scan): Likewise. (elf32_arm_size_stubs): Likewise. (bfd_elf32_arm_process_before_allocation): Likewise. (allocate_dynrelocs_for_symbol): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_final_link_relocate): Replace sym_flags parameter with a branch_type parameter. (elf32_arm_relocate_section): Update call accordingly. (elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC. (elf32_arm_output_map_sym): Initialize st_target_internal. (elf32_arm_output_stub_sym): Likewise. (elf32_arm_symbol_processing): Delete. (elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs. Use st_target_internal to record the branch type. (elf32_arm_swap_symbol_out): Use st_target_internal to test for Thumb functions. (elf32_arm_is_function_type): Delete. (elf_backend_symbol_processing): Likewise. (elf_backend_is_function_type): Likewise. gas/ * config/tc-arm.c (arm_adjust_symtab): Set the branch type for Thumb symbols. ld/ * emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check eh->target_internal. opcodes/ * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. Use branch types instead. (print_insn): Likewise.
2011-03-10 * gas/config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS,Alan Modra2-11/+4
TARGET_SYMBOL_FIELDS): Don't define. * gas/config/tc-arc.c (arc_common): Use correct symbol "local" field.
2011-03-06Mention symbol name in non-constant .size expression.H.J. Lu1-5/+43
gas/ 2011-03-05 H.J. Lu <hongjiu.lu@intel.com> * config/obj-elf.c (elf_frob_symbol): Mention symbol name in non-constant .size expression. gas/testsuite/ 2011-03-05 H.J. Lu <hongjiu.lu@intel.com> * gas/elf/bad-size.err: Updated.
2011-03-05Revert the last change.H.J. Lu1-10/+3
2011-03-05Set x86_cie_data_alignment to -4 for x32.H.J. Lu1-3/+10
gas/ 2011-03-04 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (x86_cie_stack_alignment): New. (md_begin): Set x86_cie_data_alignment if it isn't set. Set x86_cie_stack_alignment. (i386_target_format): Set x86_cie_data_alignment to -4 for x32. (tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment instead of x86_cie_data_alignment on SP and RA. gas/testsuite/ 2011-03-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
2011-02-28 gas/Maciej W. Rozycki1-0/+2
* config/tc-mips.c (append_insn): Disable branch relaxation for DSP instructions. gas/testsuite/ * gas/mips/relax-bposge.l: New test for DSP branch relaxation. * gas/mips/relax-bposge.s: Source for the new test. * gas/mips/mips.exp: Run the new test.
2011-02-28 gas/Maciej W. Rozycki1-1/+4
* config/tc-mips.c (macro): Handle M_PREF_AB. include/opcode/ * mips.h (M_PREF_AB): New enum value. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
2011-02-28 gas/Maciej W. Rozycki1-17/+26
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary register to use. (RELAX_BRANCH_UNCOND): Adjust accordingly. (RELAX_BRANCH_LIKELY): Likewise. (RELAX_BRANCH_LINK): Likewise. (RELAX_BRANCH_TOOFAR): Likewise. (RELAX_BRANCH_AT): New macro. (append_insn): Encode the temporary register to use in standard MIPS branch relaxation. (relaxed_branch_length): Update according to changes to RELAX_BRANCH_ENCODE. (md_convert_frag): Use the encoded register as the temporary. gas/testsuite/ * gas/mips/relax-at.d: New test for branch relaxation with .set at. * gas/mips/relax.s: Update to support the new test. * gas/mips/relax.l: Update accordingly. * gas/mips/relax.d: Update for multi-arch invocation. * gas/mips/mips.exp: Run the new test. Adjust to run "relax" across all applicable architectures.
2011-02-28 gas/Maciej W. Rozycki1-2/+6
* config/tc-mips.c (mips_fix_adjustable): On REL targets also reject PC-relative relocations. gas/testsuite/ * gas/mips/branch-misc-2.d: Adjust for relocation change. * gas/mips/branch-misc-2pic.d: Likewise. * gas/mips/branch-misc-4.d: New test for PC-relative relocation overflow. * gas/mips/branch-misc-4-64.d: Likewise. * gas/mips/branch-misc-4.s: Source for the new tests. * testsuite/gas/mips/mips.exp: Run the new tests.
2011-02-28 gas/Maciej W. Rozycki1-1/+1
* config/tc-mips.c (md_convert_frag): Correct message capitalization. gas/testsuite/ * gas/mips/relax-swap1.l: Adjust for message capitalization correction. * gas/mips/relax-swap2.l: Likewise. * gas/mips/relax.l: Likewise.
2011-02-25Don't sign-checking 4-byte relocations for x32.H.J. Lu1-1/+1
gas/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (reloc): Don't sign-checking 4-byte relocations if 64bit relocations aren't allowed. gas/testsuite/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run reloc64. * gas/i386/ilp32/reloc64.s: Allow TLS relocations with 32bit register destinations. * gas/i386/ilp32/reloc64.d: Updated. * gas/i386/ilp32/reloc64.l: New.
2011-02-25 PR gas/12519Alan Modra1-18/+6
* config/obj-elf.c (elf_frob_symbol): Properly handle size expression. * ld-mn10300/i135409-3.s: Correct .size label reference. * ld-sh/sh64/stolib.s: Likewise.
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