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2008-12-03include/elf/Nick Clifton1-0/+14
* common.h (STT_IFUNC): Define. elfcpp/ * elfcpp.h (enum STT): Add STT_IFUNC. bfd/ * syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION. Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags to remove gaps. (bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION. (bfd_decode_symclass): Likewise. * elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into STT_IFUNC. (elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC. (_bfd_elf_is_function_type): Likewise. * elf32-arm.c (arm_elf_find_function): Likewise. (elf32_arm_adjust_dynamic_symbol): Likewise. (elf32_arm_swap_symbol_in): Likewise. (elf32_arm_additional_program_headers): Likewise. * elf32-i386.c (is_indirect_symbol): New function. (elf_i386_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf_i386_relocate_section): Likewise. * elf64-x86-64.c (is_indirect_symbol): New function. (elf64_x86_64_check_relocs): Also generate dynamic relocs for relocations against STT_IFUNC symbols. (allocate_dynrelocs): Likewise. (elf64_x86_64_relocate_section): Likewise. * elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into BSF_INDIRECT_FUNCTION. * elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support for STT_IFUNC symbols. (get_ifunc_reloc_section_name): New function. (_bfd_elf_make_ifunc_reloc_section): New function. * elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field. * bfd-in2.h: Regenerate. gas/ * config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type. * doc/as.texinfo: Document new feature. * NEWS: Mention new feature. gas/testsuite/ * gas/elf/type.s: Add test of STT_IFUNC symbol type. * gas/elf/type.e: Update expected disassembly. * gas/elf/elf.exp: Update grep of symbol types. ld/ * NEWS: Mention new feature. * pe-dll.c (process_def_file): Replace use of redundant BFD_FORT_COMM_DEFAULT_VALUE with 0. * scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn sections. ld/testsuite/ * ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc descriptions. * ld-mips-elf/reloc-1-n64.d: Likewise. * ld-i386/ifunc.d: New test. * ld-i386/ifunc.s: Source file for the new test. * ld-i386/i386.exp: Run the new test.
2008-11-292008-11-29 Kai Tietz <kai.tietz@onevision.com>Kai Tietz1-1/+1
* config/tc-i386.c (i386_target_format): For coff flavour in TE_PEP use "pe-i386" for 32-bit.
2008-11-28 * aoutx.h (NAME): Add case statements for bfd_mach_mips14000,Thiemo Seufer1-0/+4
bfd_mach_mips16000. * archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000, bfd_mach_mips16000. * bfd-in2.h: Regenerate. * cpu-mips.c: Add enums I_mips14000, I_mips16000. (arch_info_struct): Add refs to R14000, R16000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000, bfd_mach_mips16000. (mips_mach_extensions): Map R14000, R16000 to R10000. * config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000. (mips_cpu_info_table): Add r14000, r16000. * doc/c-mips.texi: Add entries for 14000, 16000. * mips-dis.c (mips_arch_choices): Add r14000, r16000. * mips.h: Define CPU_R14000, CPU_R16000. (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-27 * config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): DefinedM R Swami Reddy2-9/+110
* config/tc-cr16.c (md_pseudo_table): Add "4byte" directive to md_pseudo_table and accept @c prefix, same as long directive. (cr16_cons_fix_new): Initialize rtype to BFD_RELOC_UNUSED. config/tc-cr16.c (tc_gen_reloc): Declare a variable of type bfd_reloc_code_real_type and set it for GOT related relocations. (md_undefined_symbol): Defined (process_label_constant): Added checks for GOT/got and cGOT/cGOT prefixes with constant label and set the appropriate relocation type. * doc/c-cr16.texi (cr16-operand specifiers): Add got/GOT and cgot/cGOT.
2008-11-26* config/tc-m32c.c (md_pseudo_table): Add support for .loc et al.DJ Delorie1-0/+3
2008-11-25* config/tc-m32c.c (md_convert_frag): Fix ADJNZ reloc math.DJ Delorie1-4/+4
2008-11-212008-11-21 Sterling Augustine <sterling@tensilica.com>Sterling Augustine1-1/+1
* xtensa-isa.c (xtensa_state_is_shared_or): New function. 2008-11-21 Sterling Augustine <sterling@tensilica.com> * xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag. * xtensa-isa.h (xtensa_state_is_shared_or): New prototype. 2008-11-21 Sterling Augustine <sterling@tensilica.com> * config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call xtensa_state_is_shared_or to allow multiple opcodes within a single FLIX bundle to write to these special states.
2008-11-19 * config/tc-cris.c (cris_number_to_imm): Apply S_SET_THREAD_LOCALHans-Peter Nilsson1-7/+13
on symbols in TLS relocs.
2008-11-18Add support for ARM half-precision conversion instructions.Catherine Moore1-49/+124
2008-11-14 PR 7026Nick Clifton1-5/+5
* config/tc-arm.c: Ensure that all uses of as_bad have a formatting string.
2008-11-12 * config/tc-cris.c (cris_number_to_imm): Except forHans-Peter Nilsson1-28/+18
BFD_RELOC_NONE, always set contents. Where previously this was skipped, set contents to 0.
2008-11-12 * config/tc-cris.c (cris_relax_frag): Add missing case forHans-Peter Nilsson1-0/+1
ENCODE_RELAX (STATE_COND_BRANCH_PIC, STATE_DWORD).
2008-11-06 * config/tc-mips.c (COP_INSN): Change logic to always return falseAdam Nemet1-4/+3
for FP instructions. testsuite/ * gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d, testsuite/gas/mips/mips1-fp.l: New tests. * gas/mips/mips.exp: Run them.
2008-11-062008-11-06 Chao-ying Fu <fu@mips.com>Chao-ying Fu1-1/+5
* config/tc-mips.c (validate_mips_insn): Add case '1'. (mips_ip): Add case '1' to process sync type.
2008-11-052008-11-04 Sterling Augustine <sterling@tensilica.com>Bob Wilson1-0/+54
* config/tc-xtensa.c (tinsn_check_arguments): Check for multiple writes to the same register.
2008-11-042008-11-04 Sterling Augustine <sterling@tensilica.com>Bob Wilson5-13/+67
* config/tc-xtensa.c (xtensa_j_opcode): New. (xg_instruction_matches_option_term): Handle "FREEREG" option. (xg_build_to_insn): Likewise. Update renamed tls_reloc reference. (md_begin): Initialize xtensa_j_opcode. (md_assemble): Update renamed tls_reloc reference. Handle "j.l". (xg_assemble_vliw_tokens): Save free_reg info in the frag. (tinsn_immed_from_frag): Get free_reg info back out of the frag. (vinsn_to_insnbuf): Update renamed tls_reloc references. Distinguish extra argument for "FREEREG" from extra TLS argument. * config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field. * config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc field to extra_arg. * config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l". (build_transition): Handle "FREEREG" operand. * config/xtensa-relax.h (enum op_type): Add OP_FREEREG. 2008-11-04 Bob Wilson <bob.wilson@acm.org> * gas/xtensa/all.exp: Run jlong test. * gas/xtensa/jlong.d: New. * gas/xtensa/jlong.s: New.
2008-10-24* config/tc-mips.c (mips_cpu_info_table): Move the MIPS64r2Maciej W. Rozycki1-2/+2
comment so that Broadcom SB-1 cores are in the MIPS64 section.
2008-10-21Remove unnecessary casts on obstack_alloc invocations.Alan Modra3-4/+4
2008-10-20 * config/bfin-parse.y: Use C style comments.Alan Modra4-11/+11
* config/tc-bfin.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mips.c: Likewise.
2008-10-12gas/H.J. Lu2-27/+52
2008-10-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (processor_type): Moved to tc-i386.h. (cpu_arch_tune): Make it global. (cpu_arch_isa): Likewise. (cpu_arch_isa_flags): Likewise. (i386_align_code): Check fragP->tc_frag_data.isa, fragP->tc_frag_data.isa_flags and cpu_arch_tune instead of cpu_arch_isa, cpu_arch_isa_flags and cpu_arch_tune, respectively. * config/tc-i386.h (processor_type): Moved from tc-i386.c. (cpu_arch_tune): New. (cpu_arch_isa): Likewise. (cpu_arch_isa_flags): Likewise. (i386_tc_frag_data): Likewise. (TC_FRAG_TYPE): Likewise. (TC_FRAG_INIT): Likewise. gas/testsuite/ 2008-10-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run nops-5, nops-5-i686, x86-64-nops-5 and x86-64-nops-5-k8. * gas/i386/nops-5.d: New. * gas/i386/nops-5.s: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise.
2008-10-09 * dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame.Eric Botcazou2-0/+14
* config/tc-i386.h (md_fix_up_eh_frame): Define on Solaris. (i386_solaris_fix_up_eh_frame): Declare. * config/tc-i386.c (i386_solaris_fix_up_eh_frame): New function.
2008-10-072008-10-07 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+3
* read.c (pseudo_set): Don't allow global register symbol only if TC_GLOBAL_REGISTER_SYMBOL_OK is undefined. * symbols.c (S_SET_EXTERNAL): Likewise. * config/tc-mmix.h (TC_GLOBAL_REGISTER_SYMBOL_OK): Defined. * doc/internals.texi: Document TC_GLOBAL_REGISTER_SYMBOL_OK.
2008-10-04 * config/tc-cris.c: Update all comments regarding explicit relocationsHans-Peter Nilsson1-39/+89
to, besides PIC, also imply TLS or to say "relocation specifier" or similar. (RELOC_SUFFIX_CHAR): Rename from PIC_SUFFIX_CHAR. Change all callers. (cris_get_reloc_suffix): Rename from cris_get_pic_suffix. Change all callers. Also handle TLS relocs. (cris_get_specified_reloc_size): Rename from cris_get_pic_reloc_size. Change all callers. Also handle TLS relocs. (tls): New constant. (cris_process_instruction): Check for non-PIC TLS relocations and adjust message when emitting error message about relocation not fitting. (get_autoinc_prefix_or_indir_op): Also check for relocation suffix when tls is true. (get_3op_or_dip_prefix_op): Ditto. (cris_number_to_imm, tc_gen_reloc): Handle TLS relocs like PIC relocs.
2008-09-30 * coffgen.c (coff_write_symbols): Check to see if a symbol's flagsNick Clifton1-0/+1
do not match it class and if necessary update the class. (null_error_handler): New function. Suppresses the generation of bfd error messages. * coff64-rs6000.c (bfd_xcoff_backend_data): Update comment. * config/tc-tic4x.c (tic4x_globl): Call S_SET_EXTERNAL as well as S_SET_STORAGE_CLASS.
2008-09-26 * Makefile.am (TARG_ENV_HFILES): Add config/te-solaris.h.Eric Botcazou1-0/+30
* Makefile.in (TARG_ENV_HFILES): Likewise. * configure.tgt (Solaris targets): Set em=solaris. * config/te-solaris.h: New file.
2008-09-26 * config/bfin-parse.y (asm_1): Fix reduce/reduce conflicts.Jie Zhang1-12/+10
2008-09-19 * write.c (TC_FORCE_RELOCATION_SUB_LOCAL): Heed md_register_arithmetic.Alan Modra6-14/+19
(TC_VALIDATE_FIX_SUB): Likewise. * config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise. * config/tc-hppa.h (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise. * config/tc-mn10300.h (TC_VALIDATE_FIX_SUB): Likewise. * config/tc-sh.h (TC_VALIDATE_FIX_SUB): Likewise. (TC_FORCE_RELOCATION_SUB_LOCAL): Likewise. * config/tc-sh64.h (TC_VALIDATE_FIX_SUB): Likewise. * config/tc-xtensa.h (TC_VALIDATE_FIX_SUB): Likewise. * doc/internals.texi (TC_FORCE_RELOCATION_SUB_ABS, TC_FORCE_RELOCATION_SUB_LOCAL, TC_VALIDATE_FIX_SUB): Show new param.
2008-09-19 * write.c (md_register_arithmetic): Define.Alan Modra1-2/+3
(fixup_segment): Adjust TC_FORCE_RELOCATION_SUB_ABS invocation. Modify error message when registers involved. (TC_FORCE_RELOCATION_SUB_ABS): Heed md_register_arithmetic. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Likewise.
2008-09-15 * config/tc-frv.c (md_apply_fix): Use abs_section_sym forAlan Modra2-4/+13
relocs with no symbol. * config/tc-mmix.c (md_assemble): Mark fake symbol on BFD_RELOC_MMIX_BASE_PLUS_OFFSET as OK for use by relocs. (mmix_md_end): Likewise mark mmix reg contents section symbol.
2008-09-14Fix Opcode generation of ld a,(bc) and ld a,(de) on target z80Arnold Metselaar1-1/+1
2008-09-122008-09-12 Sterling Augustine <sterling@tensilica.com>Bob Wilson1-1/+1
* config/tc-xtensa.c (init_op_placement_info_table): Allow number of operands equal to MAX_INSN_ARGS.
2008-09-09gas/Peter Bergner1-9/+2
* config/tc-ppc.c (ppc_setup_opcodes): Simplify POWER4/NOPOWER4 test. Remove POWER5 and POWER6 tests. gas/testsuite/ * gas/ppc/common.s: New test. * gas/ppc/common.d: Likewise. * gas/ppc/power4_32.s: Likewise. * gas/ppc/power4_32.d: Likewise. * gas/ppc/power6.s: Add attn, mtcr, mtcrf, mfcr, dcbz. * gas/ppc/power6.d: Likewise. * gas/ppc/ppc.exp: Run power4_32 test.
2008-09-09 * config/tc-hppa.c (hppa_regname_to_dw2regnum): Add register name toDave Anglin1-0/+10
number support for 32-bit targets.
2008-09-08 * config/tc-hppa.h (DIFF_EXPR_OK): Define for SOM target. ReviseDave Anglin1-4/+13
comment regarding use of difference expressions. (TC_FORCE_RELOCATION_SUB_LOCAL): Define to 1.
2008-09-07 * dw2gencfi.c (CFI_DIFF_EXPR_OK): Define if not defined.Dave Anglin1-0/+4
(dot_cfi_personality): Use CFI_DIFF_EXPR_OK instead of DIFF_EXPR_OK. (dot_cfi_lsda, output_cie, output_fde): Likewise. * config/tc-hppa.h (CFI_DIFF_EXPR_OK): Define.
2008-09-06gas/Richard Sandiford1-0/+1
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define. gas/testsuite/ * gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test. * gas/mips/mips.exp: Run it.
2008-09-03Make new functions static.Nick Clifton1-3/+3
Rearrange wording of documentation.
2008-09-03* config/tc-i386.c (pe_lcomm_internal): New function. Allows theNick Clifton1-0/+44
alignment field of the .lcomm directive to be optional. (pe_lcomm): New function. Pass pe_lcomm_internal to s_comm_internal. (md_pseudo_table): Implement .lcomm directive for COFF based targets. * doc/c-i386.texi (i386-Directives): New node. Used to document the .lcomm directive.
2008-08-30 * config/tc-hppa.h: Don't define DWARF2_EH_FRAME_READ_ONLY on LinuxDave Anglin1-3/+4
and NetBSD.
2008-08-29 * config/tc-avr.c (mcu_types): Add atmega16u4.Nick Clifton1-0/+1
* doc/c-avr.texi: Likewise.
2008-08-28gas/H.J. Lu1-0/+23
2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.
2008-08-28gas/Jan Beulich1-9/+100
2008-08-28 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (md_assemble): Force number of displacement operands to zero when processing string instruction. (i386_index_check): Special-case string instruction operands. Don't fudge address prefix if there already was a memory operand. Fix error message to correctly reflect the addressing mode used. (i386_att_operand): Fix comment. (i386_intel_operand): Snapshot, clear, and restore base and index reg for each operand processed. Increment count of memory operands later. gas/testsuite/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New. * gas/i386/i386.exp: Run new tests.
2008-08-28 * elf-hppa.h (elf_hppa_reloc_final_type): Handle R_PARISC_GPREL64,Dave Anglin2-0/+8
R_PARISC_SEGREL32 and R_PARISC_SEGREL64. * som.c (som_fixup_formats): Add R_DATA_GPREL fixup. (som_hppa_howto_table): Likewise. (hppa_som_gen_reloc_type): In case R_HPPA_GOTOFF, detect R_DATA_GPREL final type. (som_write_fixups): Handle R_DATA_GPREL. * config/tc-hppa.c (is_SB_relative): New macro. (fix_new_hppa): Remove $segrel$ marker. (cons_fix_new_hppa): Set reloc type R_PARISC_SEGREL32 if expression is segment relative. * config/tc-hppa.h (tc_frob_symbol): Check for $segrel$.
2008-08-27gas/Jan Beulich1-5/+7
2008-08-27 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (check_string): Use register_prefix for error message. (process_operands): Likewise.
2008-08-26 * config/bfin-parse.y (check_macfunc_option): Fix instructionJie Zhang1-12/+15
mode checking. (asm_1): Check mode for 16-bit multiply instructions. testsuite/ * gas/bfin/arith_mode.d: New test. * gas/bfin/arith_mode.s: New test. * gas/bfin/invalid_arith_mode.l: New test. * gas/bfin/invalid_arith_mode.s: New test. * gas/bfin/bfin.exp: Add arith_mode and invalid_arith_mode.
2008-08-22 * config/tc-mcore.c (md_assemble): Increase length of name arrayNick Clifton1-1/+1
to include terminating NUL.
2008-08-22 * config/bfin-lex.l (NUMBER): Protect special `.'.Jie Zhang1-1/+1
testsuite/ * gas/bfin/misc.s: New test. * gas/bfin/misc.d: New test. * gas/bfin/bfin.exp: Add misc test.
2008-08-22 * config/tc-hppa.c (md_begin): Set BSF_KEEP for "dummy_symbol".Alan Modra1-75/+75
2008-08-21 * dw2gencfi.c (DWARF2_FDE_RELOC_SIZE): New.Richard Henderson2-4/+20
(output_cie, output_fde): Use it. (DWARF2_EH_FRAME_READ_ONLY): New. (cfi_finish): Use it. * config/tc-hppa.h (DWARF2_FDE_RELOC_SIZE): Set to 8 for 64-bit. (DWARF2_CIE_DATA_ALIGNMENT): Change sign. (DWARF2_EH_FRAME_READ_ONLY): New. * config/tc-hppa.c (tc_gen_reloc): Generate pc-relative relocations from the results of DIFF_EXPR_OK manipulation.
2008-08-212008-08-21 Sterling Augustine <sterling@tensilica.com>Bob Wilson1-1/+1
* config/xtensa-istack.h (MAX_INSN_ARGS): Increase to 64.
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