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ctf_arc_import_parent, called by the cached-opening machinery used by
ctf_archive_next and archive-wide lookup functions like
ctf_arc_lookup_symbol, has an err-pointer parameter like all other opening
functions. Unfortunately it unconditionally initializes it whenever
provided, even if there was no error, which can lead to its being
initialized to an uninitialized value. This is not technically an
API-contract violation, since we don't define what happens to the error
value except when an error happens, but it is still unpleasant.
Initialize it only when there is an actual error, so we never initialize it
to an uninitialized value.
While we're at it, improve all the opening pathways: on success, set errp to
0, rather than leaving it what it was, reducing the likelihood of
uninitialized error param returns in callers too. (This is inconsistent
with the treatment of ctf_errno(), but the err value being a parameter
passed in from outside makes the divergence acceptable: in open functions,
you're never going to be overwriting some old error value someone might want
to keep around across multiple calls, some of which are successful and some
of which are not.)
Soup up existing tests to verify all this.
Thanks to Bruce McCulloch for the original patch, and Stephen Brennan for
the report.
libctf/
PR libctf/32903
* ctf-archive.c (ctf_arc_open_internal): Zero errp on success.
(ctf_dict_open_sections): Zero errp at the start.
(ctf_arc_import_parent): Intialize err.
* ctf-open.c (ctf_bufopen): Zero errp at the start.
* testsuite/libctf-lookup/add-to-opened.c: Make sure one-element
archive opens update errp.
* testsuite/libctf-writable/ctf-compressed.c: Make sure real archive
opens update errp.
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This patch adds support for RISC-V RVA23 and RVB23 Profiles[1].
[1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-ratified
bfd/ChangeLog:
* elfxx-riscv.c: New profiles.
gas/ChangeLog:
* testsuite/gas/riscv/attribute-19.d: New test.
* testsuite/gas/riscv/attribute-20.d: New test.
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This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
bfd/ChangeLog:
* elfxx-riscv.c (struct riscv_profiles): New struct.
(riscv_parse_extensions): New argument.
(riscv_find_profiles): New checking function.
(riscv_parse_subset): Add Profiles handler.
gas/ChangeLog:
* NEWS: Add RISC-V Profiles.
* doc/as.texi: Update -march input type.
* doc/c-riscv.texi: Ditto.
* testsuite/gas/riscv/option-arch-fail.l: Modify hint info.
* testsuite/gas/riscv/attribute-17.d: New test.
* testsuite/gas/riscv/attribute-18.d: New test.
* testsuite/gas/riscv/march-fail-rvi20u64v.d: New test.
* testsuite/gas/riscv/march-fail-rvi20u64v.l: New test.
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when doing load store switching it wrongly adjusts the address of the
R_SH_USES reloc and not the actual offset from that instruction. This is
an issue if the pc-relative function call relaxation gets done in a
later pass wich will result in overriding the wrong instruction.
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Make rs_fill_nop behave like rs_fill in using a repeat count
(fr_offset) to emit fr_var length repeated nop patterns. Besides
being more elegant, this reduces memory required for large .nops
directives.
* as.h (rs_fill_nop): Update comment.
* config/tc-i386.c (i386_generate_nops): Handle rs_fill_nop as
for rs_align_code.
* config/tc-i386.h (MAX_MEM_FOR_RS_SPACE_NOP): Define.
* listing.c (calc_hex): Handle rs_fill_nop as for rs_fill.
* read.c (MAX_MEM_FOR_RS_SPACE_NOP): Define.
(s_nops): Use MAX_MEM_FOR_RS_SPACE_NOP setting up frag.
* write.c (write_contents): Call md_generate_nops for rs_fill_nop
before the fr_fix part is written, so that rs_fill_nop can be
handled as for rs_fill.
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Now that rs_align_code has been corrected for all targets, put the
.align limit back to bits_per_address-1. Also fix a comment.
* frags.h (fr_var): Correct comment.
* read.c (TC_ALIGN_LIMIT): Revert commit ff4c03516c change.
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Reduce memory requirement for .align in code.
I've changed some of the tests to use "clc" rather than "nop", so that
code emitted by .p2align can be clearly seen.
* config/tc-i386.c (i386_output_nops): Merge into..
(i386_generate_nops): ..here. Put shorter nop first. For
rs_align_code make use of the fact that the last fr_var bytes
are output repeatedly rather than repeating them here.
* config/tc-i386.h (HANDLE_ALIGN): Don't test max_bytes.
(MAX_MEM_FOR_RS_ALIGN_CODE): Update.
* testsuite/gas/i386/nops-1.s,
* testsuite/gas/i386/nops-2.s,
* testsuite/gas/i386/nops-3.s,
* testsuite/gas/i386/nops-4.s,
* testsuite/gas/i386/nops16-1.s: Replace "nop" with "clc".
* testsuite/gas/i386/align-branch-6.d,
* testsuite/gas/i386/nop-1-suffix.d,
* testsuite/gas/i386/nop-1.d,
* testsuite/gas/i386/nop-1.l,
* testsuite/gas/i386/nop-2.d,
* testsuite/gas/i386/nop-4.d,
* testsuite/gas/i386/nop-5.d,
* testsuite/gas/i386/nops-1-core2.d,
* testsuite/gas/i386/nops-1.d,
* testsuite/gas/i386/nops-10.d,
* testsuite/gas/i386/nops-2.d,
* testsuite/gas/i386/nops-3.d,
* testsuite/gas/i386/nops-4.d,
* testsuite/gas/i386/nops-4a-i686.d,
* testsuite/gas/i386/nops-5.d,
* testsuite/gas/i386/nops-6.d,
* testsuite/gas/i386/nops-7.d,
* testsuite/gas/i386/nops-9.d,
* testsuite/gas/i386/nops16-1.d,
* testsuite/gas/i386/x86-64-align-branch-6.d,
* testsuite/gas/i386/x86-64-nop-1.d,
* testsuite/gas/i386/x86-64-nop-5.d,
* testsuite/gas/i386/x86-64-nops-1-core2.d,
* testsuite/gas/i386/x86-64-nops-1-pentium.d,
* testsuite/gas/i386/x86-64-nops-1.d,
* testsuite/gas/i386/x86-64-nops-2.d,
* testsuite/gas/i386/x86-64-nops-3.d,
* testsuite/gas/i386/x86-64-nops-4-core2.d,
* testsuite/gas/i386/x86-64-nops-4.d,
* testsuite/gas/i386/x86-64-nops-5.d,
* testsuite/gas/i386/x86-64-nops-6.d,
* testsuite/gas/i386/x86-64-nops-7.d: Adjust to suit.
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avr, kvx, metag, mn10300, nds32, v850, visium, and wasm32 targets
defined HANDLE_ALIGN without defining MAX_MEM_FOR_RS_ALIGN_CODE. This
can result in a rather large chunk of memory being allocated. Fix
that by a combination of changing the default allocation to one byte
and/or defining a target MAX_MEM_FOR_RS_ALIGN_CODE.
arm wanted to write out the entire set of nops, and limited allowed
code alignment to 64 bytes to prevent large memory allocations.
Fix that by making use of the fact that rs_align_code frags repeat
fr_var bytes at fr_literal + fr_fix to fill out the required area.
Fix metag, nds32 and kvx too, which it seems copied either arm or x86
in similarly not making use of repeating patterns.
It's worth mentioning that my tidy to kvx changed the order of nop
bundles, placing a short bundle first rather than last.
epiphany was totally broken in that uninitialised data was written out
for any alignment requiring more than three bytes of fill.
ppc created a new frag to handle a branch over a large number of nops.
This saves 4 bytes per rs_align_code frag, and most times the branch
isn't used so it is generally a win for memory usage, but I figured
the extra code complexity wasn't worth it. So that code of mine goes.
visium copied the same scheme, so that goes too.
This leaves x86 as the only target making large allocations for
alignment frags.
* frags.c (MAX_MEM_FOR_RS_ALIGN_CODE): Default to 1.
* config/tc-aarch64.c (aarch64_handle_align): Remove always true
condition.
* config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Move to be
adjacent to HANDLE_ALIGN define.
* config/tc-arm.c (arm_handle_align): Allow alignment of more
than MAX_MEM_FOR_RS_ALIGN_CODE bytes. Just write one repeat
of nop pattern to frag.
(arm_frag_align_code): Delete function.
* config/tc-arm.h (MAX_MEM_ALIGNMENT_BYTES): Don't define.
(MAX_MEM_FOR_RS_ALIGN_CODE): Set to 7.
(md_do_align): Don't define.
(arm_frag_align_code): Don't declare.
* config/tc-epiphany.c (epiphany_handle_align): Correct frag
so that nop_pattern repeats rather than random data.
* config/tc-epiphany.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* config/tc-kvx.c (kvx_make_nops): Merge into..
(kvx_handle_align): ..here. Put short nop bundle first,
followed by repeated full nop bundle.
* config/tc-kvx.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* config/tc-m32c.h (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE):
Don't define.
* config/tc-metag.c (metag_handle_align): Just write one
repeat of nop pattern to frag.
* config/tc-metag.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* config/tc-nds32.c (nds32_handle_align): Just write one
repeat of nop pattern to frag.
* config/tc-nds32.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* config/tc-ppc.c (ppc_handle_align): Don't make a new frag
for branch.
* config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Increase to 8.
* config/tc-visium.c (visium_handle_align): Don't make a new
frag for branch.
* config/tc-visium.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* config/tc-wasm32.h (HANDLE_ALIGN): Don't define.
* testsuite/gas/epiphany/nop.d,
* testsuite/gas/epiphany/nop.s: New test.
* testsuite/gas/epiphany/allinsn.exp: Run it.
* testsuite/gas/kvx/nop-align.d: Adjust.
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While reviewing another patch I was briefly confused by a call to
target_pid_to_exec_file coming from validate_exec_file while attaching
to a process when I had not previously set an executable.
The current order of actions in validate_exec_file is:
1. Get name of current executable.
2. Get name of executable from the current inferior.
3. If either of (1) or (2) return NULL, then there's nothing to
check, early return.
I think it would be cleaner if we instead did this:
1. Get name of current executable.
3. If (1) returned NULL then there's nothing to check, early return.
3. Get name of executable from the current inferior.
4. If (3) returned NULL then there's nothing to check, early return.
This does mean there's an extra step, but I don't think the code is
any more complex really, and we now avoid trying to extract the name
of the executable from the current inferior unless we really need it.
This avoids the target_pid_to_exec_file call that I was seeing, which
for remote targets does avoid a packet round trip (not that I'm
selling this as an "optimisation", just noting the change).
There should be no user visible changes after this commit.
Approved-By: Simon Marchi <simon.marchi@efficios.com>
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While looking at code coverage for gdb, I noticed that the
cooked_index_entry self-tests were not run. I tracked this down to a
formatting error in cooked-index-entry.c.
I suspect it might be better to use a macro to define these
initialization functions. That would probably remove the possibility
for this kind of error.
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gprofng did not read the .debug_rnglists section for dwarf-5.
Another problem was that gprofng ignored DW_AT_abstract_origin
As a result, gprofng skiped Dwarf for all functions declared as:
<1><e18b>: Abbrev Number: 43 (DW_TAG_subprogram)
<e18c> DW_AT_abstract_origin: <0xe168>
<e190> DW_AT_linkage_name: _ZN10Bool_ArrayD2Ev
gprofng/ChangeLog
2025-05-19 Vladimir Mezentsev <vladimir.mezentsev@oracle.com>
PR 32892
* src/Dwarf.cc: Read the .debug_rnglists section.
Support DW_AT_abstract_origin.
* src/Dwarf.h: Likewise.
* src/DwarfLib.cc: Likewise.
* src/DwarfLib.h: Likewise.
* src/LoadObject.cc (dump_functions): Print mangled names for aliases.
* src/Stabs.cc (fixSymtabAlias): Set 'alias' correctly.
* src/Symbol.cc (find_symbols): Add argument where to collect symbols.
* src/Symbol.h: Likewise.
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This patch rebases the original patch from Nelson's implement[1].
Added new extension Smcdeleg and Ssccfg with a new CSR, scountinhibit.[2]
Co-Authored-By: Nelson Chu <nelson@rivosinc.com>
Co-Authored-By: Jiawei Chen <jiawei@iscas.ac.cn>
[1] https://patchwork.sourceware.org/project/binutils/patch/20240620045359.47513-1-nelson@rivosinc.com/
[2] https://github.com/riscvarchive/riscv-smcdeleg-ssccfg/releases/tag/v1.0.0
bfd/ChangeLog:
* elfxx-riscv.c: New extensions.
gas/ChangeLog:
* NEWS: Mention new extensions.
* config/tc-riscv.c (enum riscv_csr_class): New CSR class.
(riscv_csr_address): Add support for Ssccfg.
* testsuite/gas/riscv/csr-version-1p10.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p10.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p11.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p11.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p12.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p12.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p13.d: New test for Ssccfg CSR.
* testsuite/gas/riscv/csr-version-1p13.l: New warning for Ssccfg CSR.
* testsuite/gas/riscv/csr.s: New Ssccfg CSR.
* testsuite/gas/riscv/imply.d: New imply check.
* testsuite/gas/riscv/imply.s: New implies.
* testsuite/gas/riscv/march-help.l: New helping info.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_SCOUNTINHIBIT): New CSR address.
(DECLARE_CSR): Add Ssccfg CSR.
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344b1e0f5f7 Introduced range-check 3rd argument of .align, incorrect
value are not converted silently. added warning message to fix regression.
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or $9223372036854775808,%eax
runtime error: negation of -9223372036854775808 cannot be represented
in type 'offsetT' (aka 'long'); cast to an unsigned type to negate
this value to itself
* config/tc-i386.c (offset_in_range): Avoid signed overflow.
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I ran codespell on the gdb directory and fixed a number of minor
problems. In a couple cases I replaced a "gdb spelling" (e.g.,
"readin") with an English one ("reading") where it seemed harmless.
I also added "Synopsis" as an accepted spelling.
gdb is nowhere near codespell-clean.
Approved-By: Tom de Vries <tdevries@suse.de>
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make-check-all.sh
I forgot to run test-case gdb.dwarf2/dw-form-strx-out-of-bounds.exp with
make-check-all.sh, and consequently failed to notice that it fails with for
instance target board fission-dwp.
The test-case does:
...
source $srcdir/$subdir/dw-form-strx.exp.tcl
...
and in that tcl file, prepare_for_testing fails, so a -1 is returned, but
that is ignored by the source command.
Fix this by using require, but rather that testing the result of the source
command, communicate success by setting a global variable
prepare_for_testing_done.
Likewise in gdb.dwarf2/dw-form-strx.exp.
Also, the test-case gdb.dwarf2/dw-form-strx-out-of-bounds.exp fails for target
board readnow, because the DWARF error occurs during a different command than
expected.
Fix this by just skipping the test-case in that case.
Tested on x86_64-linux.
Reported-by: Simon Marchi <simark@simark.ca>
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.debuginfod codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.guile codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.mi codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.opt codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.pascal codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.reverse codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.rocm codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.stabs codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.xml codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Make gdb.tui codespell-clean and add the dir to the pre-commit
configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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I noticed a typo in the testsuite, twice: gdbsever. Fix these.
Codespell doesn't detect it, so add a new file
gdb/contrib/codespell-dictionary.txt that contains a gdbsever->gdbserver
entry, and update gdb/contrib/setup.cfg to use it.
Approved-By: Tom Tromey <tom@tromey.com>
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The following gdb/testsuite subdirs are codespell-clean:
...
$ for d in gdb/testsuite/gdb.*; do \
echo -n "$d:"; \
codespell --config ./gdb/contrib/setup.cfg $d \
| wc -l; \
done 2>&1 \
| grep :0
gdb/testsuite/gdb.ctf:0
gdb/testsuite/gdb.dap:0
gdb/testsuite/gdb.gdb:0
gdb/testsuite/gdb.go:0
gdb/testsuite/gdb.modula2:0
gdb/testsuite/gdb.objc:0
gdb/testsuite/gdb.opencl:0
gdb/testsuite/gdb.perf:0
gdb/testsuite/gdb.replay:0
gdb/testsuite/gdb.server:0
gdb/testsuite/gdb.testsuite:0
...
Add them to the pre-commit configuration.
Approved-By: Tom Tromey <tom@tromey.com>
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Import the following commits from GCC as of r16-614-g9d039eff453f77:
31dd621796f libiberty: add ldirname function
f3d07779fdb libiberty: Append <libgen.h> to AC_CHECK_DECLS [PR119218].
90183362524 libiberty, gcc: Add memrchr to libiberty and use it [PR119283].
43717ee9064 libiberty: Fix off-by-one when collecting range expression
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An oss-fuzz testcase found:
runtime error: shift exponent 140 is too large for 32-bit type 'int'
OK, that's just a completely silly uleb, but we ought to be able to
handle 64 bits here.
* elfxx-loongarch.c (loongarch_elf_add_sub_reloc_uleb128): Formatting.
Don't left shift int. Avoid shifts larger than bits in a bfd_vma.
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Simulator testsuite build started failing with host GCC-15:
bits-tst.c:323:1: error: function declaration isn’t a prototype [-Werror=strict-prototypes]
bits-tst.c: In function ‘main’:
bits-tst.c:323:1: error: old-style function definition [-Werror=old-style-definition]
Fix by including string.h to get the required prototypes, and changing
main's declaration to modern C.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
Approved-By: Tom Tromey <tom@tromey.com>
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Silence ubsan warning. We don't worry about wrap-around in most
places that adjust abs_section_offset, so don't fuss over an overflow
in the multiplication here.
* read.c (s_fill): Replace "long" vars with offsetT and valueT.
Avoid signed overflow calculating abs_section_offset.
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T-Head/XuanTie's vector extension documentation states that their vector
extensions are based on the standard vector extension draft,
version 0.7.1.
In that draft, it is rare to see dependencies between extensions as
in the ratified version ... except: "Zvamo" -> "Zaamo".
cf. <https://github.com/riscvarchive/riscv-v-spec/releases/tag/0.7.1>
> If vector AMO instructions are supported, then the scalar Zaamo
> instructions (atomic operations from the standard A extension)
> must be present.
Note that using the words like "imply" or "depend" for extensions
weren't a common practice to represent dependencies between extensions
at the time the documentation was created.
The "Zaamo" was not ratified as an extension at the time but this is a
subset of the "A" extension and defines scalar AMO operations (while
"Zvamo" -- NOT in the ratified specification -- defines vector AMO ops).
The important part is that the T-Head/XuanTie's documentation just
states that the "Zvamo" (draft) extension is renamed to "XTheadZvamo".
It means, this implication should have been preserved in some way.
> The extension Zvamo is renamed to XTheadZvamo.
cf. <https://github.com/XUANTIE-RV/thead-extension-spec/blob/2.3.0/xtheadvector.adoc>
bfd/ChangeLog:
* elfxx-riscv.c (riscv_implicit_subsets): Add implication
"XTheadZvamo" -> "Zaamo".
gas/ChangeLog:
* testsuite/gas/riscv/imply.s: Add "XTheadZvamo" implication.
* testsuite/gas/riscv/imply.d: Ditto.
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While this dependency is not directly stated in the documentation,
the XTheadVector extension cannot work without the Zicsr extension
(the documentation does not specify CSR access instruction subset
either as in the Zkr extension or the seed CSR section in the manual).
Also, making an implication to the Zicsr extension is in parity with
the ratified vector extensions (in GNU Binutils, the Zve32x extension --
a dependency of V -- depends on the Zvl32b and Zicsr extensions).
This commit adds this implicit dependency.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_implicit_subsets): Add implicit
dependency "XTheadVector" -> "Zicsr".
gas/ChangeLog:
* testsuite/gas/riscv/imply.s: Add implicit "XTheadVector"
dependency to the "Zicsr" extension.
* testsuite/gas/riscv/imply.d: Ditto.
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T-Head/XuanTie's "XTheadVector" is based on a draft version of the now
standard vector extensions and it conflicts with not just the "V"
extension but all of its subsets.
This commit makes "XTheadVector" conflict with the "Zve32x" extension,
which is the smallest subset of the standard vector extensions. Still,
a reference to "V" is preserved in the error message
as the documentation suggests:
> Therefore, the XTheadVector extension and the V extension are
> in conflict.
cf. <https://github.com/XUANTIE-RV/thead-extension-spec/blob/2.3.0/xtheadvector.adoc>
Note that, instructions in the "XTHeadZvamo" extension currently has
no conflicts with other extensions, even after addition of the "Zabha"
extension.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_parse_check_conflicts):
Make "XTheadVector" conflict with not just "V" but its subsets.
gas/ChangeLog:
* testsuite/gas/riscv/x-thead-vector-fail.d: Test a vector
subset "Zve32x" to test failures.
* testsuite/gas/riscv/x-thead-vector-fail.l: Reflect change
in the error message.
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Simplify the test whether a symbol is absolute, by using the helper
bfd_is_abs_symbol.
bfd/
* elf64-s390.c (elf_s390_relocate_section): Use
bfd_is_abs_symbol to test whether symbol is absolute.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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Dereferences of GOT slots with lgrl or lg for global symbols are
rewritten to larl to get get rid of the extra memory access. However
this is invalid for:
- symbols marked for absolute addressing
- symbols at odd addresses (larl can handle only even addresses)
Commit e6213e09ed0e ("S/390: Prevent GOT access rewrite for certain
symbols") added checks for the above. But instead of checking the
address of a symbol for being halfword aligned, it tries to deduce
this from whether the symbol value and section the symbol is defined
in are halfword aligned. The way it is done has two issues:
1. The use of bfd_section_from_elf_index to obtain the section the
symbol is defined in may not return the one that remains in the
output. For instance for COMDAT sections getting deduplicated
the section retrieved using bfd_section_from_elf_index may not be
the same as h->root.u.def.section. If COMDAT sections of same
group signature have different alignment properties the wrong
one may be checked. This may then lead to an erroneous rewrite
of lgrl %rX, sym@GOTENT to larl %rX, sym, although the symbol in
the remaining section is not properly aligned, triggering an
"relocation for misaligned symbol" error at link-time.
This may for instance occur when mixing C++ modules compiled with
GCC and Clang, as GCC emits a 2-byte alignment and Clang a 1-byte
alignment for COMDAT sections containing type information:
$ cat sample.cpp
#include <typeinfo>
struct A {};
const std::type_info &q() { return typeid(A); }
$ g++ -c sample.cpp -o sample_gcc.o
$ clang++ -c sample.cpp -o sample_clang.o
$ readelf -WS sample_gcc.o sample_clang.o
Produces (reformatted and reduced):
File Name Off Size ES Flg Lk Inf Al
sample_gcc.o .rodata._ZTS1A 000080 000004 00 AG 0 0 2
sample_clang.o .rodata._ZTS1A 000058 000003 00 AG 0 0 1
2. The symbol may end up at an even address, if both the symbol value
and the section defining the symbol are 1-byte aligned. While this
does not trigger an error, it fails an opportunity to rewrite a GOT
access.
In a Linux Kernel build this causes ~15k GOT accesses using lgrl to
be skipped to be rewritten to larl.
Resolve both issues by simply checking whether the symbol address is
halfword aligned. Do not check the symbol value nor section defining
the symbol for halfword alignment.
bfd/
PR ld/32969
* elf64-s390.c (elf_s390_relocate_section): Only rewrite
lgrl/lg from GOT to larl if symbol address is halfword aligned.
ld/testsuite/
PR ld/32969
* ld-s390/s390.exp (pr32969_64-1, pr32969_64-2): Add tests for
rewrite of GOT access when COMDAT section deduplication is
involved.
* ld-s390/pr32969_64-1.dd: New test for rewrite of GOT access
when COMDAT section deduplication is involved.
* ld-s390/pr32969_64-2.dd: Likewise.
* ld-s390/pr32969a.s: Likewise.
* ld-s390/pr32969b.s: Likewise.
* ld-s390/pr32969c.s: Likewise.
Bug: https://sourceware.org/PR32969
Fixes: e6213e09ed0e ("S/390: Prevent GOT access rewrite for certain symbols")
Reported-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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Report the BFD in which a misaligned symbol is defined in the error
message. This complements commit 906f69cf65da ("IBM zSystems: Issue
error for *DBL relocs on misaligned symbols"). While at it reword
the error message.
Old error message text (re-wrapped):
<sec-bfd>(<sec>+<off>): misaligned symbol `<sym>' (<addr>) for
relocation <rel>
New error message text (re-wrapped):
<sec-bfd>(<sec>+<off>): relocation <rel> against misaligned symbol
`<sym>' (<addr>) in <sym-bfd>
Note that the linker tests do not require to be updated, as they match
against the pattern ".*misaligned symbol.*", which has not changed in
the error message.
bfd/
PR ld/32969
* elf64-s390.c (elf_s390_relocate_section): Report BFD
in which a misaligned symbol is defined in error message.
Bug: https://sourceware.org/PR32969
Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
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Fix PR gas/32952 - sframe: incorrect handling of .cfi_undefined in gas
In context of SFrame generation, it is incorrect to simply ignore all
.cfi_undefined. We may ignore only those .cfi_undefined which are for
registers of no interest (similar to whats done for other CFI
directives).
gas/
* gen-sframe.c (sframe_xlate_do_cfi_undefined): New definition.
(sframe_do_cfi_insn): Handle .cfi_undefined.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Add new tests.
* gas/cfi-sframe/cfi-sframe-common-10.d: New test.
* gas/cfi-sframe/cfi-sframe-common-10.s: New test.
* gas/cfi-sframe/cfi-sframe-x86_64-empty-4.d: New test.
* gas/cfi-sframe/cfi-sframe-x86_64-empty-4.s: New test.
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The current warning text of "skipping SFrame FDE" does not unabiguously
indicate that the SFrame FDE is not generated in the output section.
Reword the diagnostic to say "no SFrame FDE emitted" as requested.
Adjust the testcases for the updated warning.
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To process some CFI directives like .cfi_undefined and .cfi_same_value,
it is necessary for correctness to detect all cases when the register
used is one of SP, FP or RA.
Currently, the backends needed to specify the SFRAME_CFA_RA_REG only in
the case of those ABIs where RA tracking was necessary, e.g. AArch64.
For AMD64, since the return address is always at a fixed offset from the
CFA, RA tracking was disabled.
The backends must now specify the applicable return address register via
SFRAME_CFA_RA_REG. This is necessary so that SFrame generation code can
then properly handle the cases when RA is used like so:
.cfi_undefined <RA>
or,
.cfi_same_value <RA>
Detecting these cases is necessary for correctness. E.g., on AMD64, we
need to skip FDE generation as the above constructs cannot be
represented in SFrame yet.
This change is a prerequisite to fixing the two PRs:
PR gas/32952 - sframe: incorrect handling of .cfi_undefined in gas
PR gas/32953 - sframe: incorrect handling of .cfi_same_value in gas
In the SFrame generation code in gen-sframe.c, instead of using
SFRAME_FRE_RA_TRACKING ifdef's, we now simply rely on the API
sframe_ra_tracking_p () to detect if RA-tracking is enabled for the
target.
While at it, use const variables for x86 backend.
ChangeLog:
* gas/config/tc-i386.c (x86_sframe_cfa_ra_reg): New definition.
* gas/config/tc-i386.h (REG_RA): New definition.
(SFRAME_CFA_RA_REG): New declaration.
* gas/gen-sframe.c (SFRAME_FRE_RA_TRACKING): Remove.
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Andrew pointed out that a recent commit neglected to update the
comment for find_field_create_baton. This patch fixes the oversight.
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