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2017-05-16Allow target files access to default TC_FORCE_RELOCATION definesAlan Modra23-63/+103
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. (TC_FORCE_RELOCATION_LOCAL): Use it. (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. (TC_FORCE_RELOCATION_SUB_SAME): Use it. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. * config/tc-aarch64.h: Similarly. * config/tc-avr.h: Similarly. * config/tc-cris.h: Similarly. * config/tc-i386.h: Similarly. * config/tc-i960.h: Similarly. * config/tc-ia64.h: Similarly. * config/tc-microblaze.h: Similarly. * config/tc-mips.h: Similarly. * config/tc-msp430.h: Similarly. * config/tc-nds32.h: Similarly. * config/tc-pru.h: Similarly. * config/tc-riscv.h: Similarly. * config/tc-rl78.h: Similarly. * config/tc-s390.h: Similarly. * config/tc-sh.h: Similarly. * config/tc-sh64.h: Similarly. * config/tc-sparc.h: Similarly. * config/tc-xtensa.h: Similarly. * config/tc-mn10300.h: Similarly. (GENERIC_FORCE_RELOCATION_LOCAL): Define. * config/tc-msp430.c (msp430_force_relocation_local): Modify to be addition to rather than replacement of standard TC_FORCE_RELOCATION_LOCAL.
2017-05-16Rename non_ir_ref to non_ir_ref_regularAlan Modra59-62/+128
Since the flag is now set only for regular object refs. include/ * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to non_ir_ref_regular. bfd/ * elf-m10300.c: Rename occurrences of non_ir_ref. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cris.c: Likewise. * elf32-d10v.c: Likewise. * elf32-dlx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. ld/ * plugin.c: Rename occurrences of non_ir_ref.
2017-05-16non_ir_ref_dynamicAlan Modra8-41/+69
dynamic_ref_after_ir_def is a little odd compared to other symbol flags in that as the name suggests, it is set only for certain references after a definition. It turns out that setting a flag for any non-ir reference from a dynamic object can be used to solve the problem for which this flag was invented, which I think is a cleaner. This patch does that, and sets non_ir_ref only for regular object references. include/ * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic. ld/ * plugin.c (is_visible_from_outside): Use non_ir_ref_dynamic. (plugin_notice): Set non_ir_ref for references from regular objects, non_ir_ref_dynamic for references from dynamic objects. bfd/ * elf64-ppc.c (add_symbol_adjust): Transfer non_ir_ref_dynamic. * elflink.c (elf_link_add_object_symbols): Update to use non_ir_ref_dynamic. (elf_link_input_bfd): Test non_ir_ref_dynamic in addition to non_ir_ref. * linker.c (_bfd_generic_link_add_one_symbol): Likewise.
2017-05-16Automatic date update in version.inGDB Administrator1-1/+1
2017-05-152017-05-15 Eric Christopher <echristo@gmail.com>Eric Christopher2-0/+11
* layout.cc (Layout::segment_precedes): Add a case for testing pointer equality when determining which segment precedes another.
2017-05-152017-05-15 Jeff Law <law@redhat.com>Jeff Law2-3/+8
* readelf.c (display_arc_attribute): Avoid implicit fallthru.
2017-05-15Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.Nick Clifton4-1/+95
PR gas/21458 * config/tc-arm.c (do_adr): If the ADR involves a thumb function symbol, ensure that the T bit will be set. (do_adrl): Likewise. (do_t_adr): Likewise. * testsuite/gas/arm/pr21458.s: New test. * testsuite/gas/arm/pr21458.d: New test driver.
2017-05-15MIPS16e2: Add new MIPS16e2 relaxation GAS and LD testsMaciej W. Rozycki96-114/+1500
Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI instruction rather than an LI/SLL instruction pair. gas/ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' flags. * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment preservation between MIPS16 and MIPS16e2 code. * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over all MIPS16 architectures. ld/ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-15MIPS16e2: Add new MIPS16e2 ASE binutils and GAS testsMaciej W. Rozycki37-8/+3982
Verify MIPS16e2 ASE instruction assembly, disassembly and object file flags. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3' to `as' flags. * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test. * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: Remove `.module mips3'. * testsuite/binutils-all/mips/mips.exp: Run the new tests. gas/ * testsuite/gas/mips/mips16e2.d: New test. * testsuite/gas/mips/mips16e2-mt.d: New test. * testsuite/gas/mips/mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-hilo.d: New test. * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.d: New test. * testsuite/gas/mips/mips16e2-imm-error.d: New test. * testsuite/gas/mips/elf_ase_mips16e2.d: New test. * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. * testsuite/gas/mips/mips16e2-lui.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips16e2@lui-2.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. * testsuite/gas/mips/mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-mt.s: New test source. * testsuite/gas/mips/mips16e2-sub.s: New test source. * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. * testsuite/gas/mips/mips16e2-hilo.s: New test source. * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. * testsuite/gas/mips/mips16e2-imm-error.s: New test source. * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-lui.s: New test source. * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 architectures. Run the new tests.
2017-05-15MIPS16e2: Add MIPS16e2 ASE GAS test infrastructureMaciej W. Rozycki24-5/+410
Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source.
2017-05-15MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki15-66/+446
Add MIPS16e2 ASE support as per the architecture specification[1], including in particular: 1. A new ELF ASE flag to mark MIPS16e2 binaries. 2. MIPS16e2 instruction assembly support, including a relaxation update to use LUI rather than an LI/SLL instruction pair for loading the high part of 32-bit addresses. 3. MIPS16e2 instruction disassembly support, including updated rules for extended forms of instructions that are now subdecoded and therefore do not alias to the original MIPS16 ISA revision instructions even for encodings that are not valid in the MIPS16e2 instruction set. Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and `.module' pseudo-ops. Control the availability of the MT ASE subset of the MIPS16e2 instruction set with a combination of these controls and the preexisting MT ASE controls. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016 include/ * elf/mips.h (AFL_ASE_MIPS16E2): New macro. (AFL_ASE_MASK): Adjust accordingly. * opcode/mips.h: Document new operand codes defined. (mips_operand_type): Add OP_REG28 enum value. (INSN2_SHORT_ONLY): Update description. (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. bfd/ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. opcodes/ * mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry. (mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag. (print_insn_arg) <OP_REG28>: Add handler. (validate_insn_args) <OP_REG28>: Handle. (print_mips16_insn_arg): Handle MIPS16 instructions that require 32-bit encoding and 9-bit immediates. (print_insn_mips16): Handle MIPS16 instructions that require 32-bit encoding and MFC0/MTC0 operand decoding. * mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'> <'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers. (RD_C0, WR_C0, E2, E2MT): New macros. (mips16_opcodes): Add entries for MIPS16e2 instructions: GP-relative "addiu" and its "addu" spelling, "andi", "cache", "di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh", "lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0", "movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause", "pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw" instructions, "swl", "swr", "sync" and its "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases, "xori", "dmt", "dvpe", "emt" and "evpe". Add split regular/extended entries for original MIPS16 ISA revision instructions whose extended forms are subdecoded in the MIPS16e2 ISA revision: "li", "sll" and "srl". binutils/ * readelf.c (print_mips_ases): Handle MIPS16e2 ASE. * NEWS: Mention MIPS16e2 ASE support. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. (RELAX_MIPS16_E2): New macro. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. (mips16_immed_extend): New prototype. (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum values. (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. (mips_ases): Add "mips16e2" entry. (mips_set_ase): Handle MIPS16e2 ASE. (insn_insert_operand): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (is_opcode_valid_16): Pass enabled ASE bitmask on to `opcode_is_member'. (validate_mips_insn): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (operand_reg_mask) <OP_REG28>: Add handler. (match_reg28_operand): New function. (match_operand) <OP_REG28>: Add handler. (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. (match_mips16_insn): Handle MIPS16 instructions that require 32-bit encoding and `V' and `u' operand codes. (mips16_ip): Allow any characters except from `.' in opcodes. (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle immediates whose width is not one of these listed. (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. (mips_convert_ase_flags): Handle MIPS16e2 ASE. * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and `-mno-mips16e2' options. (-mmips16e2, -mno-mips16e2): New options. * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and `-mno-mips16e2' options. (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' and `.set nomips16e2'.
2017-05-15MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve out-of-range operand error diagnostics for invalid values in the [32768,65535] range used for a signed 16-bit immediate, making the message consistent with that used for other invalid values, e.g.: foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768' foo.s:2: Error: invalid operands `lw $2,32768($gp)' vs: foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769' foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for signed 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting signed 16-bit immediates will be added, so make the case work well right from the start: foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768' foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)' gas/ * config/tc-mips.c (match_int_operand): Call `match_out_of_range' before returning failure for 0x8000-0xffff values conditionally allowed.
2017-05-15MIPS16/GAS: Improve non-constant operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve operand error diagnostics for non-constant expressions used for a 16-bit immediate, making the message more descriptive and indicating the offending operand, e.g.: foo.s:1: Error: invalid operands `lui $2,foo-bar' will show as: foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting 16-bit immediates will be added, so make the case work well right from the start. gas/ * config/tc-mips.c (match_int_operand): Call `match_not_constant' before returning failure for a non-constant 16-bit immediate conditionally allowed.
2017-05-15MIPS/GAS: Improve bignum operand error diagnosticsMaciej W. Rozycki14-2/+109
Improve bignum operand error diagnostics for cases where a constant would be accepted and report them as range errors, also indicating the offending operand and instruction, e.g.: $ cat bignum.s addiu $2, 0x10000000000000000 break 0x10000000000000000 $ as -o bignum.o bignum.s bignum.s:1: Error: bignum invalid bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000' $ now show as: $ as -o bignum.o bignum.s bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000' bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000' $ gas/ * config/tc-mips.c (match_const_int): Call `match_out_of_range' rather than `match_not_constant' for unrelocated operands retrieved as an `O_big' expression. (match_int_operand): Call `match_out_of_range' for relocatable operands retrieved as an `O_big' expression. (match_mips16_insn): Call `match_out_of_range' for relaxable operands retrieved as an `O_big' expression. * testsuite/gas/mips/addiu-error.d: New test. * testsuite/gas/mips/mips16@addiu-error.d: New test. * testsuite/gas/mips/micromips@addiu-error.d: New test. * testsuite/gas/mips/break-error.d: New test. * testsuite/gas/mips/lui-1.l: Adjust error message. * testsuite/gas/mips/addiu-error.l: New stderr output. * testsuite/gas/mips/mips16@addiu-error.l: New stderr output. * testsuite/gas/mips/micromips@addiu-error.l: New stderr output. * testsuite/gas/mips/break-error.l: New stderr output. * testsuite/gas/mips/addiu-error.s: New test source. * testsuite/gas/mips/break-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-15MIPS16/GAS: Improve non-immediate operand error diagnosticsMaciej W. Rozycki10-40/+189
Improve non-immediate operand error diagnostics for extensible MIPS16 instructions and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat addiu.s addiu $4, $3, $2 $ as -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: invalid operands `addiu $4,$3,$2' $ To do so observe that for extensible MIPS16 instructions and a non-PC relative operand this case is handled by an explicit OT_INTEGER check in `match_mips16_insn' returning a failure right away and consequently preventing a call to `match_expression' from being made. As from commit d436c1c2e889 ("Improve error reporting for register expressions"), <https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the check has become redundant as `match_expression' now only ever returns success for OT_INTEGER argument tokens, and a special case of an OT_CHAR `(' token already handled by `match_mips16_insn' just ahead of the `match_expression' call. Previously it also returned success for OT_REG argument tokens. Let the call to `match_expression' always happen then, yielding the same failure for the affected cases, however with more accurate diagnostics provided by the call making reporting consistent: $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ gas/ * config/tc-mips.c (match_mips16_insn): Remove the explicit OT_INTEGER check before the `match_expression' call. * testsuite/gas/mips/mips16-insn-e.l: Adjust messages. * testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-reg-error.d: New test. * testsuite/gas/mips/mips16-reg-error.l: New stderr output. * testsuite/gas/mips/mips16-reg-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS16/GAS: Improve disallowed relocation operand error diagnosticsMaciej W. Rozycki6-1/+98
Improve disallowed relocation operand error diagnostics for MIPS16 code and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat sltu.s sltu $2, %lo(foo) $ as -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)' $ To do so call `match_not_constant' from `match_mips16_insn' whenever a disallowed relocation operation has been noticed, like `match_const_int' does, making reporting consistent: $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ gas/ * config/tc-mips.c (match_mips16_insn): Call `match_not_constant' for a disallowed relocation operation. * testsuite/gas/mips/mips16-reloc-error.d: New test. * testsuite/gas/mips/mips16-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16-reloc-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS/GAS/testsuite: Convert LUI list tests to dump testsMaciej W. Rozycki4-2/+15
gas/ * testsuite/gas/mips/lui-1.d: New test. * testsuite/gas/mips/lui-2.d: New test. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests.
2017-05-15MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decodingMaciej W. Rozycki2-1/+6
The `sel' operand of CP0 move instructions is a part of the base ISA and has nothing to do with the MT ASE. opcodes/ * mips-dis.c (print_insn_args) <default>: Remove an MT ASE reference in CP0 move operand decoding.
2017-05-15MIPS/GAS: Update `match_const_int' descriptionMaciej W. Rozycki2-2/+5
Remove a stale reference to FALLBACK parameter from the description of `match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"), <https://sourceware.org/ml/binutils/2013-08/msg00133.html>. gas/ * config/tc-mips.c (match_const_int): Update description.
2017-05-15MIPS/GAS/doc: Refer to `.module' rather than `.set'Maciej W. Rozycki3-12/+26
Complement commit 919731affbef ("Add MIPS .module directive") and update the GAS manual to refer to the `.module' rather than `.set' directive in command-line option descriptions, following an observation that unlike `.set' and like the respective command-line option the use of the `.module' directive affects the ISA and ASE flags recorded in the object file produced, and therefore it is `.module' rather than `.set' that corresponds to the respective command-line option. gas/ * doc/as.texinfo (-mips16, -no-mips16): Refer to `.module mips16' rather than `.set mips16'. (-mmicromips, -mno-micromips): Refer to `.module micromips' and `.module nomicromips' rather than `.set micromips' and `.set nomicromips'. (-msmartmips, -mno-smartmips): Refer to `.module smartmips' rather than `.set smartmips'. * doc/c-mips.texi (MIPS Options): Refer to `.module mips16', `.module micromips', `.module nomicromips' and `.module smartmips' rather than `.set mips16', `.set micromips', `.set nomicromips' and `.set smartmips' respectively.
2017-05-15Fix gdb procfs.c compilation on SolarisRainer Orth2-2/+7
Prompted by the creation of the gdb 8.0 branch, I tried to build it on x86_64-pc-solaris2.12, but failed: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()': /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string<char>&, char**, int)}' [-fpermissive] t->to_create_inferior = procfs_create_inferior; ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function] static void procfs_create_inferior (struct target_ops *, char *, ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function] procfs_create_inferior (struct target_ops *ops, const char *exec_file, ^~~~~~~~~~~~~~~~~~~~~~ This can easily be fixed by the following patch. * procfs.c (procfs_create_inferior): Change prototype to match definition.
2017-05-15Add .debug_gdb_scripts section to PE linker scripts.Nick Clifton3-0/+26
PR ld/21459 * scripttempl/pe.sc: Add .debug_gdb_scripts section. * scripttempl/pep.sc: Likewise.
2017-05-15Automatic date update in version.inGDB Administrator1-1/+1
2017-05-14Fix match and mask for 64-bit bb opcode.John David Anglin2-1/+5
2017-05-14Automatic date update in version.inGDB Administrator1-1/+1
2017-05-13Fix assertion failure relaxing TLS for position-independent executables.James Clarke2-1/+9
gold/ PR gold/21444 * gold.cc (Target_sparc::Relocate::relocate_tls): Local variables are final for position-independent executables. This has to be consistent with Target_sparc::Scan::local otherwise they will disagree as to whether local-exec is used.
2017-05-13Avoid compiler warning in MinGW buildEli Zaretskii2-1/+6
gdb: 2017-05-13 Eli Zaretskii <eliz@gnu.org> * tui/tui.c (tui_enable): Cast "unknown" to 'char *' to avoid a C++ compiler warning.
2017-05-13Automatic date update in version.inGDB Administrator1-1/+1
2017-05-12Fix misplacement of a relaxed section on AArch64.Igor Kudrin6-4/+152
gold/ChangeLog PR gold/21430 * aarch64.cc (AArch64_relobj::convert_input_section_to_relaxed_section): Set the section offset to -1ULL. (Target_aarch64::relocate_section): Adjust the view in case of a relaxed input section. * testsuite/Makefile.am (pr21430): New test. * testsuite/Makefile.in: Regenerate * testsuite/pr21430.s: New test source file. * testsuite/pr21430.sh: New test script.
2017-05-12x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED propertiesH.J. Lu10-2/+142
If there are more than GNU property note in an input, we should merge X86_ISA_1_USED and X86_ISA_1_NEEDED properties. bfd/ * elf32-i386.c (elf_i386_parse_gnu_properties): Merge GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED properties. * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run property-x86-3. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/property-x86-3.d: New file. * testsuite/ld-i386/property-x86-3.s: Likewise. * testsuite/ld-x86-64/property-x86-3.d: Likewise. * testsuite/ld-x86-64/property-x86-3.s: Likewise.
2017-05-12Avoid exponential behavior in rust_evaluate_subexpTom Tromey2-8/+13
The STRUCTOP_STRUCT case in rust_evaluate_subexp would evaluate its LHS, and then, if it did not need Rust-specific treatment, it would back up and re-evaluate the entire STRUCTOP_STRUCT part of the expression using evaluate_subexp_standard. This yields exponential behavior and causes some expressions to evaluate extremely slowly. The fix is to simply do the needed work inline. This is PR rust/21483. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> PR rust/21483: * rust-lang.c (rust_evaluate_subexp) <STRUCTOP_STRUCT>: Don't recurse, just call value_struct_elt directly.
2017-05-12Fix rust_dump_subexp_bodyTom Tromey2-2/+8
rust_dump_subexp_body was not correct in a couple of cases. While debugging the bug I was really interested in, this caused a crash. This patch fixes the problems. No test case because, IIRC there generally aren't tests for expression dumping. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> * rust-lang.c (rust_dump_subexp_body) <STRUCTOP_ANONYMOUS, OP_RUST_ARRAY>: Fix.
2017-05-12Replace "return" with "break"Tom Tromey2-1/+5
This replaces a "return" with a "break" in rust_print_subexp, for consistency. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> * rust-lang.c (rust_print_subexp): Replace "return" with "break".
2017-05-12MIPS/GAS: Unify GP-relative percent-opsMaciej W. Rozycki6-1/+38
For a reason that is unclear commit d6f165938798 ("Support for MIPS16 HI16/LO16 relocations"), <https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has added support for the R_MIPS16_GPREL relocation, has spelled its corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which is how its regular MIPS counterpart is spelled. To make assembly code sharing easier between the regular MIPS and the MIPS16 ISA make both percent-op spellings acceptable in both kinds of code now. Parts of this change by Matthew Fortune. gas/ * config/tc-mips.c (mips_percent_op): Add "%gprel". (mips16_percent_op): Add "%gp_rel". * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms. * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms. * testsuite/gas/mips/elf-rel8.d: Adjust accordingly. * testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
2017-05-12MIPS16/opcodes: Make the handling of BREAK and SDBBP consistentMaciej W. Rozycki13-61/+85
Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand in the hexadecimal rather than decimal numeral system and add respective operandless variants with an implicit 0 operand, making our handling of these instructions consistent with how we have processed their regular MIPS and microMIPS counterparts since forever. opcodes/ * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand type to hexadecimal. (mips16_opcodes): Add operandless "break" and "sdbbp" entries. binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK and SDBBP disassembly. gas/ * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly. * testsuite/gas/mips/mips16-64@mips16.d: Likewise. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise. * testsuite/gas/mips/mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
2017-05-12Automatic date update in version.inGDB Administrator1-1/+1
2017-05-12MIPS/opcodes: Mark descriptive SYNC mnemonics as aliasesMaciej W. Rozycki7-14/+88
Following the way how descriptive SYNC mnemonics have been defined in the architecture[1][2] mark them as aliases, so that the generic SYNC instruction can be alternatively disassembled along with its immediate operand, as noted in the documents referred. References: [1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 305 [2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 481 opcodes/ * mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs", "syncw", "syncws", "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. * micromips-opc.c (micromips_opcodes): Mark "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. gas/ * testsuite/gas/mips/mips32r2-sync-1.d: New test. * testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-11x86-64: Rename .plt.bnd to .plt.secH.J. Lu18-102/+140
Rename .plt.bnd to .plt.sec to indicate that this is used as the second PLT section. There is no change in run-time behavior. We also scan the .plt.sec section to synthesize PLT symbols. bfd/ * elf64-x86-64.c (elf_x86_64_link_hash_entry): Rename plt_bnd to plt_second. (elf_x86_64_link_hash_table): Rename plt_bnd/plt_bnd_eh_frame to plt_second/plt_second_eh_frame. (elf_x86_64_link_hash_newfunc): Updated. (elf_x86_64_allocate_dynrelocs): Likewise. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_finish_dynamic_symbol): Likewise. (elf_x86_64_finish_dynamic_sections): Likewise. (elf_x86_64_plt_type): Rename plt_bnd to plt_second. (elf_x86_64_get_synthetic_symtab): Updated. Also scan the .plt.sec section. (elf_backend_setup_gnu_properties): Updated. Create the .plt.sec section instead of the .plt.sec section. ld/ * emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Replace .plt.bnd with .plt.sec. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/mpx3.dd: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/plt-main-bnd-now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-05-11x86: Generate PLT relocations for -z nowH.J. Lu20-201/+213
This patch partially reverses: commit 25070364b0ce33eed46aa5d78ebebbec6accec7e Author: H.J. Lu <hjl.tools@gmail.com> Date: Sat May 16 07:00:21 2015 -0700 Don't generate PLT relocations for now binding to support LD_AUDIT and LD_PROFILE with -z now. If there is an existing GOT relocation, it is still used to avoid PLT relocation against the same function symbol. bfd/ * elf32-i386.c (elf_i386_allocate_dynrelocs): Partially revert commit 25070364b0ce33eed46aa5d78ebebbec6accec7e. * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewse. ld/ * testsuite/ld-i386/plt-pic2.dd: Updated. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/plt2.rd: Likewise. * testsuite/ld-i386/pr17689now.rd: Likewise. * testsuite/ld-ifunc/ifunc-16-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-16-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/plt2.rd: Likewise. * testsuite/ld-x86-64/pr17689now.rd: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise.
2017-05-11Automatic date update in version.inGDB Administrator1-1/+1
2017-05-10MIPS/GAS/testsuite: Convert ISA override list tests to dump testsMaciej W. Rozycki24-185/+78
And remove the zillion duplicate sources. Also `mips1@isa-override-2.l' is the same as `r3000@isa-override-2.l', so remove the latter too, now that `r3000@isa-override-2.d' can name a file to match stderr output against. gas/ * testsuite/gas/mips/isa-override-2.d: New test. * testsuite/gas/mips/mips1@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.d: New test. * testsuite/gas/mips/r3900@isa-override-2.d: New test. * testsuite/gas/mips/mips2@isa-override-2.d: New test. * testsuite/gas/mips/mips32@isa-override-2.d: New test. * testsuite/gas/mips/mips32r2@isa-override-2.d: New test. * testsuite/gas/mips/mips32r3@isa-override-2.d: New test. * testsuite/gas/mips/mips32r5@isa-override-2.d: New test. * testsuite/gas/mips/mips32r6@isa-override-2.d: New test. * testsuite/gas/mips/octeon3@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.l: Remove list test. * testsuite/gas/mips/mips1@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3000@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3900@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test source. * testsuite/gas/mips/octeon3@isa-override-2.s: Remove test source. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests.
2017-05-10MIPS/binutils/testsuite: Define names of temporary filesMaciej W. Rozycki2-0/+13
Define `tempfile' and `copyfile' in `mips.exp' so that standalone script execution via `RUNTESTFLAGS=mips.exp' works rather than producing: Running .../binutils/testsuite/binutils-all/mips/mips.exp ... ERROR: tcl error sourcing .../binutils/testsuite/binutils-all/mips/mips.exp. ERROR: can't read "tempfile": no such variable while executing "binutils_assemble_flags ${srcfile} $tempfile $opts(as)" (procedure "run_dump_test" line 207) invoked from within "run_dump_test "mips-ase-1"" invoked from within "if [is_elf_format] { run_dump_test "mips-ase-1" run_dump_test "mips-ase-2" run_dump_test "mips-ase-3" run_dump_test "mixed-mips16" ..." (file ".../binutils/testsuite/binutils-all/mips/mips.exp" line 22) invoked from within "source .../binutils/testsuite/binutils-all/mips/mips.exp" ("uplevel" body line 1) invoked from within "uplevel #0 source .../binutils/testsuite/binutils-all/mips/mips.exp" invoked from within "catch "uplevel #0 source $test_file_name"" testcase .../binutils/testsuite/binutils-all/mips/mips.exp completed in 0 seconds binutils/ * testsuite/binutils-all/mips/mips.exp: Define `tempfile' and `copyfile' variables.
2017-05-10i386: Set CHECK_RELOCS_AFTER_OPEN_INPUT to yesH.J. Lu4-0/+11
All linker targets based on elf32-i386 should check relocations after opening all inputs since this is how elf32-i386 works. * emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Set to yes. * emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise.
2017-05-10MIPS/GAS/testsuite: Correct swapped MIPS16e subset test namesMaciej W. Rozycki8-7/+17
Correct the test names swapped between common and 64-bit MIPS16e subset tests. gas/ * testsuite/gas/mips/mips16e-sub.d: Correct test name. * testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise.
2017-05-10bfd: fix the deletion of relocs in sparc64Jose E. Marchesi2-5/+25
This patch fixes the deletion of relocations in BFD sections in sparc64 targets. A specialized `_bfd_set_reloc' function is provided that updates the internal canon_reloc_count(sec) counter instead of sec->reloc_count. Additionally, the `write_relocs' callback in elf64-sparc is adapted to use the canon_reloc_count to traverse `sec->orelocation'. Tested in sparc64-linux-gnu targets. Fixes an existing failure in the merge-notes objcopy test. No regressions. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> * elf64-sparc.c (elf64_sparc_set_reloc): New function. (bfd_elf64_set_reloc): Define. (elf64_sparc_write_relocs): Use `canon_reloc_count'.
2017-05-10bfd: new BFD target entry point _bfd_set_reloc.Jose E. Marchesi27-10/+124
This patch adds a new entry point to the BFD_JUMP_TABLE_RELOCS. The previous common implementation `bfd_set_reloc', in bfd/bfd.c, has been moved to bfd/reloc.c with the name `_bfd_generic_set_reloc', and all BFD targets has been adapted to use it. This patch doesn't introduce any change on functionality, but prepares the ground for further work. bfd/ChangeLog: 2017-05-10 Jose E. Marchesi <jose.marchesi@oracle.com> * targets.c (BFD_JUMP_TABLE_RELOCS): Add NAME##_set_reloc. (struct bfd_target): New field _bfd_set_reloc. * bfd.c (bfd_set_reloc): Call backend _set_bfd. * reloc.c (_bfd_generic_set_reloc): New function. * coffcode.h (coff_set_reloc): Define to _bfd_generic_set_reloc. * nlm-target.h (nlm_set_reloc): Likewise. * coff-rs6000.c (_bfd_xcoff_set_reloc): Likewise. * aout-tic30.c (MY_set_reloc): Likewise. * aout-target.h (MY_set_reloc): Likewise. * elfxx-target.h (bfd_elfNN_set_reloc): Likewise. * coff-alpha.c (_bfd_ecoff_set_reloc): Likewise. * mach-o-target.c (bfd_mach_o_set_reloc): Likewise. * vms-alpha.c (alpha_vms_set_reloc): Likewise. * aout-adobe.c (aout_32_set_reloc): Likewise. * bout.c (b_out_set_reloc): Likewise. * coff-mips.c (_bfd_ecoff_set_reloc): Likewise. * i386os9k.c (aout_32_set_reloc): Likewise. * ieee.c (ieee_set_reloc): Likewise. * oasys.c (oasys_set_reloc): Likewise. * som.c (som_set_reloc): Likewise. * versados.c (versados_set_reloc): Likewise. * coff64-rs6000.c (rs6000_xcoff64_vec): Add _bfd_generic_set_reloc. (rs6000_xcoff64_aix_vec): LIkewise. * libbfd.c (_bfd_norelocs_set_reloc): New function. * libbfd-in.h: Prototype for _bfd_norelocs_set_reloc. * i386msdos.c (msdos_set_reloc): Define to _bfd_norelocs_set_reloc. * elfcode.h (elf_set_reloc): Define. * bfd-in2.h: Regenerated.
2017-05-10x86-64: Use .plt.bnd for IFUNC function addressH.J. Lu6-2/+107
When -z bndplt is used, we must use the .plt.bnd entry for IFUNC function address. bfd/ PR ld/21481 * elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Use .plt.bnd for IFUNC function address. ld/ PR ld/21481 * testsuite/ld-x86-64/pr21481a.c: New file. * testsuite/ld-x86-64/pr21481b.S: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests.
2017-05-10MIPS/GAS/testsuite: Remove stale `mips16-macro' list test outputMaciej W. Rozycki2-12/+4
Complement commit c60aaac10f9a1 ("MIPS/GAS/testsuite: Extend MIPS16 testing over multiple ISAs") and remove a stale `mips16-macro' list test output replaced with the `mips16-32@mips16-macro' stderr output. gas/ * testsuite/gas/mips/mips16-macro.l: Remove list test.
2017-05-10MIPS/GAS/testsuite: Remove last remnants of ECOFF supportMaciej W. Rozycki21-100/+23
Complement commit 16e5e222b6ea ("Make gas/mips/mips.exp ELF-only"), <https://sourceware.org/ml/binutils/2013-06/msg00195.html>, and commit fcedb9f3ca87 ("MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF support"), and remove stale ECOFF test dumps previously missed. gas/ * testsuite/gas/mips/r3900@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test. * testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test.
2017-05-10[ARC] Object attributes.Claudiu Zissulescu82-176/+1735
gas/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/attr-arc600.d: New file. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.s: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.s: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.s: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-em.s: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.s: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-name.s: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.s * testsuite/gas/arc/attr-quarkse_em.d: Likewise. * testsuite/gas/arc/blank.s: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/arc/cpu-pseudop-1.d: Update test. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/nps400-0.d: Likewise. * testsuite/gas/elf/elf.exp: Set target_machine for ARC. * config/tc-arc.c (opcode/arc-attrs.h): Include. (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. (arc_attribute): Declare new function. (md_pseudo_table): Add arc_attribute. (cpu_types): Rename default cpu features. (selected_cpu): Set the default OSABI flag. (mpy_option): New variable. (pic_option): Likewise. (sda_option): Likewise. (tls_option): Likewise. (feature_type, feature_list): Remove. (arc_initial_eflag): Likewise. (attributes_set_explicitly): New variable. (arc_check_feature): Check also for the conflicting features. (arc_select_cpu): Refactor assignment of selected_cpu.eflags. (arc_option): Remove setting of private flags and architecture. (check_cpu_feature): Refactor feature names. (autodetect_attributes): New function. (assemble_tokens): Use above function. (md_parse_option): Refactor feature names. (arc_attribute): New function. (arc_set_attribute_int): Likewise. (arc_set_attribute_string): Likewise. (arc_stralloc): Likewise. (arc_set_public_attributes): Likewise. (arc_md_end): Likewise. (arc_copy_symbol_attributes): Likewise. (rc_convert_symbolic_attribute): Likewise. * config/tc-arc.h (md_end): Define. (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. * doc/c-arc.texi: Document ARC object attributes. binutils/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (decode_ARC_machine_flags): Recognize OSABI v4. (get_arc_section_type_name): New function. (get_section_type_name): Use the above function. (display_arc_attribute): New function. (process_arc_specific): Likewise. (process_arch_specific): Handle ARC specific information. * testsuite/binutils-all/strip-3.d: Consider ARC.attributes section. include/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. (Tag_ARC_*): Define. (E_ARC_OSABI_V4): Define. (E_ARC_OSABI_CURRENT): Reassign it. (TAG_CPU_*): Define. * opcode/arc-attrs.h: New file. * opcode/arc.h (insn_subclass_t): Assign enum values. (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) (ARC_CRC): Delete. bfd/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (FEATURE_LIST_NAME): Define. (CONFLICT_LIST): Likewise. (opcode/arc-attrs.h): Include. (arc_elf_print_private_bfd_data): Print OSABI v4 flag. (arc_extract_features): New file. (arc_stralloc): Likewise. (arc_elf_merge_attributes): Likewise. (arc_elf_merge_private_bfd_data): Use object attributes. (bfd_arc_get_mach_from_attributes): New function. (arc_elf_object_p): Use object attributes. (arc_elf_final_write_processing): Likewise. (elf32_arc_obj_attrs_arg_type): New function. (elf32_arc_obj_attrs_handle_unknown): Likewise. (elf32_arc_section_from_shdr): Likewise. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Likewise. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_handle_unknown): Likewise. (elf_backend_section_from_shdr): Likewise. ld/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/attr-merge-0.d: New file. * testsuite/ld-arc/attr-merge-0.s: Likewise. * testsuite/ld-arc/attr-merge-0e.s: Likewise. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-1.s: Likewise. * testsuite/ld-arc/attr-merge-1e.s: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-2.s: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-3.s: Likewise. * testsuite/ld-arc/attr-merge-3e.s: Likewise. * testsuite/ld-arc/attr-merge-4.s: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. * testsuite/ld-arc/attr-merge-5a.s: Likewise. * testsuite/ld-arc/attr-merge-5b.s: Likewise. * testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise. * testsuite/ld-arc/attr-merge-err-isa.d: Likewise. * testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise. * testsuite/ld-arc/got-01.d: Update test. * testsuite/ld-arc/attr-merge-err-quarkse.d: New file. * testsuite/ld-arc/attr-quarkse.s: Likewise. * testsuite/ld-arc/attr-quarkse2.s: Likewise. opcodes/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (parse_option): Update quarkse_em option.. * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to QUARKSE1. (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
generated by cgit v1.1 at 2025-02-23 08:34:04 +0000