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This option does not merge certain text sections with prefixes
.text.hot, .text.unlikely, .text.startup and .text.exit.
* layout.cc (Layout::default_section_order): Check for text section
prefixes.
(Layout::text_section_name_mapping): New static member.
(Layout::text_section_name_mapping_count): New static member.
(Layout::match_section_name): New static function.
(Layout::output_section_name): Check for text section prefixes.
* layout.h (Output_section_order::ORDER_TEXT_HOT): New enum value.
(Output_section_order::ORDER_TEXT_STARTUP): New enum value.
(Output_section_order::ORDER_TEXT_EXIT): New enum value.
(Output_section_order::ORDER_TEXT_UNLIKELY): New enum value.
(Layout::text_section_name_mapping): New static member.
(Layout::text_section_name_mapping_count): New static member.
(Layout::match_section_name): New static function.
* options.h (keep_text_section_prefix): New -z option.
* testsuite/Makefile.am (keep_text_section_prefix): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/keep_text_section_prefix.cc: New test source.
* testsuite/keep_text_section_prefix.sh: New test script.
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The regcache cooked_read test needs to know which architectures have a
save_reggroup, riscv does and needs adding to the list.
gdb/ChangeLog:
* regcache.c (cooked_read_test): Add riscv to the list of
architectures that have a save_reggroup.
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which are resolved at static linking time.
For absolute symbols which are forced local or not dynamic, the ABS relocation
should be resolved at static linking time.
Originally, an RELATIVE/ABS relocation will be generated even for absolution
symbols for the dynamic linker to resolve.
bfd/
2018-03-07 Renlin Li <renlin.li@arm.com>
PR ld/20402
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol,
and don't emit relocation in specific case.
ld/
2018-03-07 Renlin Li <renlin.li@arm.com>
PR ld/20402
* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
* testsuite/ld-aarch64/pr20402.s: New.
* testsuite/ld-aarch64/pr20402.d: New.
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Some of the watchpoint logic depends on the fact that the head of the
value chain represents the user-specified value to watch. Thus no
additional values should be added to the value chain after that. However,
if a watchpoint is defined for a C++ structure/class object, then run-time
type information (RTTI) may be present. Thus, while constructing the
value chain for the watchpoint, the dynamic type is fetched by
gnuv3_rrti_type, which invokes value_addr, which then adds a new value to
the head of the value chain. This new value represents the pointer to the
structure instead of the structure itself.
With such a "polluted" value chain the watchpoint logic does not recognize
when the user intended to watch a struct, and can_use_hardware_watchpoint
returns zero. Instead of a hardware watchpoint, a software watchpoint
will then be set for no apparent reason.
This is fixed by adding an early exit to gnuv3_rtti_type when the input
value is not a dynamic class object.
gdb/testsuite/ChangeLog:
* gdb.cp/watch-cp.cc: New test.
* gdb.cp/watch-cp.exp: New file.
gdb/ChangeLog:
* gnu-v3-abi.c (gnuv3_rtti_type): Add early exit if the given
value is not a dynamic class object.
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Rewrite NOP generation for fill and code alignment by:
1. Add a 11-byte NOP with another 0x66 prefix.
2. Remove the multi-byte NOP entries which consist of 2 instructions.
3. Select proper NOPs based on ISA and processor tuning.
4. Generate multiple NOPs with the longer NOPs first followed by the
shorter NOP.
5. Use jump for larger NOP padding:
a. > 8 bytes (2 NOPs) in 16-bit mode.
b. > 14 bytes (2 NOPs) for older processors.
c. > 77 bytes (7 NOPs) for newer processors.
6. Update MAX_MEM_FOR_RS_ALIGN_CODE to 4095.
PR gas/22874
* config/tc-i386.c (f32_5): Removed.
(f32_8): Likewise.
(f32_9): Likewise.
(f32_10): Likewise.
(f32_11): Likewise.
(f32_12): Likewise.
(f32_13): Likewise.
(f32_14): Likewise.
(f16_5): Likewise.
(f16_6): Likewise.
(f16_7): Likewise.
(f16_8): Likewise.
(jump_31): Likewise.
(alt64_11): Likewise.
(alt64_patt): Likewise.
(jump_disp8): New.
(jump32_disp32): Likewise.
(jump16_disp32): Likewise.
(alt_11): Likewise.
(f32_patt): Updated.
(f16_patt): Likewise.
(alt_patt): Add alt_11.
(i386_align_code): Merged with ...
(i386_generate_nops): This. Rewritten.
(fits_in_imm7): Moved before i386_generate_nops.
(fits_in_imm31): Likewise.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Updated to
4095.
(i386_align_code): Removed.
(HANDLE_ALIGN): Rewritten with i386_generate_nops.
* doc/as.texinfo: Update limits of control byte for x86 .nops
directive.
* testsuite/gas/i386/i386.exp: Run nops-7 and x86-64-nops-7.
* gas/testsuite/gas/i386/noavx-3.l: Updated.
* gas/testsuite/gas/i386/nop-1.d: Likewise.
* gas/testsuite/gas/i386/nop-1.s: Likewise.
* gas/testsuite/gas/i386/nop-2.d: Likewise.
* gas/testsuite/gas/i386/nop-2.s: Likewise.
* gas/testsuite/gas/i386/nop-3.d: Likewise.
* gas/testsuite/gas/i386/nop-4.d: Likewise.
* gas/testsuite/gas/i386/nop-5.d: Likewise.
* gas/testsuite/gas/i386/nop-5.s: Likewise.
* gas/testsuite/gas/i386/nop-6.d: Likewise.
* gas/testsuite/gas/i386/nop-bad-1.l: Likewise.
* gas/testsuite/gas/i386/nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i386-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/nops-1.d: Likewise.
* gas/testsuite/gas/i386/nops-2-core2.d: Likewise.
* gas/testsuite/gas/i386/nops-2-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-2.d: Likewise.
* gas/testsuite/gas/i386/nops-3-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-3-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-3.d: Likewise.
* gas/testsuite/gas/i386/nops-4-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-4-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-4.d: Likewise.
* gas/testsuite/gas/i386/nops-4a-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-5-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-5.d: Likewise.
* gas/testsuite/gas/i386/nops-6.d: Likewise.
* gas/testsuite/gas/i386/nops16-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-5.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-g64.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-pentium.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-3.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-5.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d: Likewise.
* gas/testsuite/gas/i386/nops-7.d: New file.
* gas/testsuite/gas/i386/nops-7.s: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-7.d: Likewise.
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xcoff (32-bit) objdump accepted but ignored -M options unless
-mpowerpc was also given. This patch fixes that, leaving the default
as -Mpwr for xcoff. I've also enabled more tests for xcoff targets.
binutils/
* configure.ac: Add objdump_private_desc_xcoff for rs6000.
* configure: Regenerate.
gas/
* testsuite/gas/ppc/aix.exp: Run for rs6000 too.
* testsuite/gas/ppc/ppc.exp: Run more tests for non-ELF targets.
* testsuite/gas/ppc/machine.d: Don't run for PE targets.
opcodes/
* disassemble.c (disassembler): Use bfd_arch_powerpc entry for
bfd_arch_rs6000.
* disassemble.h (print_insn_rs6000): Delete.
* ppc-dis.c (powerpc_init_dialect): Handle rs6000.
(disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
(print_insn_rs6000): Delete.
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* elf64-mips.c (mips_elf64_rtype_to_howto): Return NULL on error.
(mips_elf64_slurp_one_reloc_table): Pass on error.
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I noticed a few formatting buglets in rust-exp.y: A couple of lines
were too long, and a couple of parser rules did not follow the same
formatting as the rest of the code.
I'm checking this in as obvious. Tested by rebuilding.
2018-03-06 Tom Tromey <tom@tromey.com>
* rust-exp.y: Formatting fixes.
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PR 22920
* emultempl/riscvelf.em (riscv_create_output_section_statements): New.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): New.
* testsuite/ld-elf/pr21884.d (#notarget): Add riscv*-*-*.
* testsuite/ld-unique/pr21529.d (#notarget): Likewise.
* testsuite/ld-srec/srec.exp (run_srec_test): For riscv*-*-* target,
call setup_xfail.
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Some parts of the target description support were committed with the
initial riscv patch. As target descriptions are not currently supported
on riscv this commit removes the two pieces for code that relate to
target description support.
It is expected that target description support will be added in the
future, at which point this, or similar code will be added back.
gdb/ChangeLog:
* riscv-tdep.c (riscv_register_name): Remove target description
support.
(riscv_gdbarch_init): Remove target description check.
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The GDB coding standard states these lines should never have been
added.
gdb/ChangeLog:
* riscv-tdep.c: Remove 'Contributed by ...' lines from header
comment.
* riscv-tdep.h: Likewise.
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The code making use of pseudo registers was initially intended to
support running 32-bit ABI files on 64-bit riscv targets. However, the
implementation was incomplete, and broken.
For now I've removed all reference to pseudo registers from the riscv
target, we've not lost any functionality, and this cleans up failures in
the selftests.
Once the riscv target has matured a little we'll probably end up
bringing back some of the use of pseudo registers in order to better
support running 32-bit executables on a 64-bit target.
gdb/ChangeLog:
* riscv-tdep.c (riscv_pseudo_register_read): Delete.
(riscv_pseudo_register_write): Delete.
(riscv_gdbarch_init): Remove all use of pseudo registers.
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This patch replaces the cleanups that close the list and tuple of the
btrace instruction history output with ui_out_emit_tuple and
ui_out_emit_list.
This allows removing make_cleanup_ui_out_tuple_begin_end and
make_cleanup_ui_out_list_begin_end.
This patch (along with the previous ones in the series) was regtested on
the buildbot.
gdb/ChangeLog:
* record-btrace.c (btrace_print_lines): Replace cleanup
parameter with RAII equivalents.
(btrace_insn_history): Replace cleanup with RAII equivalents.
* ui-out.h (make_cleanup_ui_out_list_begin_end,
make_cleanup_ui_out_tuple_begin_end): Remove.
* ui-out.c (struct ui_out_end_cleanup_data, do_cleanup_end,
make_cleanup_ui_out_end, make_cleanup_ui_out_tuple_begin_end,
make_cleanup_ui_out_list_begin_end): Remove.
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This patch replaces two VEC(tp_t) with std::vector<thread_info *>, which
allows to remove two cleanups. To make it easier to map the old code to
the new code, I added the ordered_remove and unordered_remove functions,
which operate on std::vector and do the same as VEC's
ordered_remove/unordered_remove.
gdb/ChangeLog:
* record-btrace.c (record_btrace_maybe_mark_async_event): Change
parameter types to std::vector. Use bool.
(record_btrace_wait): Replace VEC(tp_t) with
std::vector<thread_info *>.
* common/gdb_vecs.h (unordered_remove, ordered_remove): New.
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This patch removes a cleanup that disables btrace on threads in case of
failure, so we don't leave it enabled for some the threads and disabled
for the rest.
gdb/ChangeLog:
* record-btrace.c (record_btrace_disable_callback): Remove.
(struct scoped_btrace_disable): New.
(record_btrace_open): Use scoped_btrace_disable.
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Should use a ULONGEST when reading from the regcache.
gdb/ChangeLog:
* riscv-tdep.c (riscv_return_value): Change type to ULONGEST for
reading values from registers.
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Another riscv format string fix.
gdb/ChangeLog:
* riscv-tdep.c (riscv_push_dummy_call): Use core_addr_to_string_nz
where appropriate.
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Some of the format strings used in the new riscv target were incorrect,
resulting in build failures on some hosts. This commit does the
following:
1. Uses core_addr_to_string for formatting CORE_ADDR types.
2. Fixes legacy use of stderr for logging in one place that got
missed, instead gdb_stdlog is used.
3. Re-indent a few printf related lines that were wrong.
This should resolve some (but not all) of the build failures the new
riscv target introduced.
gdb/ChangeLog:
* riscv-tdep.c (riscv_print_arg_location): Add header comment,
change parameter type. Use GDB's print functions, and use
core_addr_to_string where appropriate.
(riscv_push_dummy_call): Use core_addr_to_string where
appropriate, update call to riscv_print_arg_location, and reindent
a few lines.
(riscv_return_value): Update call to riscv_print_arg_location.
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This commit introduces basic support for baremetal RiscV as a GDB
target. This target is currently only tested against the RiscV software
simulator, which is not included as part of this commit. The target has
been tested against the following RiscV variants: rv32im, rv32imc,
rv32imf, rv32imfc, rv64im, rv64imc, rv64imfd, rv64imfdc.
Across these variants we pass on average 34858 tests, and fail 272
tests, which is ~0.8%.
The RiscV has a feature of its ABI where structures with a single
floating point field, a single complex float field, or one float and
one integer field are treated differently for argument passing. The
new test gdb.base/infcall-nested-structs.exp is added to cover this
feature. As passing these structures should work on all targets then
I've made the test as a generic one, even though, for most targets,
there's probably nothing special about any of these cases.
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Add riscv-tdep.o
(HFILES_NO_SRCDIR): Add riscv-tdep.h.
(ALLDEPFILES): Add riscv-tdep.c
* configure.tgt: Add riscv support.
* riscv-tdep.c: New file.
* riscv-tdep.h: New file.
* NEWS: Mention new target.
* MAINTAINERS: Add entry for riscv.
gdb/testsuite/ChangeLog:
* gdb.base/infcall-nested-structs.exp: New file.
* gdb.base/infcall-nested-structs.c: New file.
* gdb.base/float.exp: Add riscv support.
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In some cases passing an argument to a function on amd64, or attempting
to fetch the return value, can trigger an assertion failure within GDB.
An example of a type that would trigger such an error is:
struct foo_t
{
long double a;
struct {
struct {
/* Empty. */
} es1;
} s1;
};
GCC does permit empty structures, so we should probably support this.
The test that exposes this bug is in the next commit along with the
RiscV support.
gdb/ChangeLog:
* amd64-tdep.c (amd64_classify_aggregate): Ignore zero sized
fields within aggregates.
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Replace linear search with binary search on dynamic relocations. After
finding a match, scan backward to the first matching relocation, then
scan forward for a matching relocation with non-absolute symbol.
On Fedora 27 x86-64, time for "objdump -d" on libxul.so from RHEL 7.4
x86-64 went from
134.46user 0.12system 2:15.03elapsed
to
8.49user 0.14system 0:08.64elapsed
PR binutils/22911
* objdump.c (is_significant_symbol_name): Return TRUE for all
.plt* sections.
(find_symbol_for_address): Replace linear search with binary
search on dynamic relocations.
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This function can take the flags as the gdb_disassembly_flags type
instead of int.
gdb/ChangeLog:
* record-btrace.c (btrace_print_lines): Change type of flags to
gdb_disassembly_flags.
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Use the signal code from siginfo_t to distinguish SIGTRAP events due
to trace traps (TRAP_TRACE) and software breakpoints (TRAP_BRKPT).
For software breakpoints, adjust the PC when the event is reported as
part of the API when supplying "stopped_by_sw_breakpoint". Currently
FreeBSD only supports hardware watchpoints and breakpoints on x86
which are reported as trace traps. Signal information is not used on
MIPS and sparc64 kernels which do not reliably report TRAP_BRKPT for
software breakpoints.
gdb/ChangeLog:
* fbsd-nat.c: Include "inf-ptrace.h".
(USE_SIGTRAP_SIGINFO): Conditionally define.
[USE_SIGTRAP_SIGINFO] (fbsd_handle_debug_trap): New function.
(fbsd_wait) [USE_SIGTRAP_SIGINFO]: Call "fbsd_handle_debug_trap".
[USE_SIGTRAP_SIGINFO] (fbsd_stopped_by_sw_breakpoint): New
function.
[USE_SIGTRAP_SIGINFO] (fbsd_supports_stopped_by_sw_breakpoint):
Likewise.
[USE_SIGTRAP_SIGINFO] (fbsd_supports_stopped_by_hw_breakpoint):
Likewise.
(fbsd_nat_add_target) [USE_SIGTRAP_SIGINFO]: Set
"stopped_by_sw_breakpoint", "supports_stopped_by_sw_breakpoint",
"supports_stopped_by_hw_breakpoint" target methods.
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For now this just logs information about the state of the current LWP
for each STOPPED event in fbsd_wait().
gdb/ChangeLog:
* NEWS (Changes since GDB 8.1): Add "set/show debug fbsd-nat".
* fbsd-nat.c (debug_fbsd_nat): New variable.
(show_fbsd_nat_debug): New function.
(fbsd_wait): Log LWP info if "debug_fbsd_nat" is enabled.
(_initialize_fbsd_nat): Add "fbsd-nat" debug boolean command.
gdb/doc/ChangeLog:
* gdb.texinfo (Debugging Output): Document "set/show debug
fbsd-nat".
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Report that a thread is stopped by a hardware breakpoint if a non-data
watchpoint is set in DR6. This change should be a no-op since a target
still needs to implement the "to_supports_stopped_by_hw_breakpoint"
method before this function is used.
gdb/ChangeLog:
* nat/x86-dregs.c (x86_dr_stopped_by_hw_breakpoint): New function.
* nat/x86-dregs.h (x86_dr_stopped_by_hw_breakpoint): New
prototype.
* x86-nat.c (x86_stopped_by_hw_breakpoint): New function.
(x86_use_watchpoints): Set "stopped_by_hw_breakpoint" target
method.
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Currently, when `mips_elf_calculate_relocation' is asked to relocate an
undefined symbol, it reports an error or a warning and immediately
returns without performing the relocation. This is fine if the link
fails, but if unresolved_syms_in_objects == RM_GENERATE_WARNING, the
link will continue and output some unrelocated code, which is a
regression from commit e7e2196da3f0 ("MIPS/BFD: Correctly report
undefined relocations").
Fix this by continuing after calling the `undefined_symbol' hook unless
this is an error condition.
bfd/
PR ld/21900
* elfxx-mips.c (mips_elf_calculate_relocation): Only return
after calling `undefined_symbol' hook if this is an error
condition. Assume the value of 0 for the symbol requested
otherwise.
ld/
PR ld/21900
* testsuite/ld-mips-elf/undefined-warn.d: New test.
* testsuite/ld-mips-elf/undefined.s: Add padding at the end.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
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Unless I'm missing something very obvious, this xstrdup seems
unnecessary to me. We can pass "mode" directly to sprintf.
gdb/gdbserver/ChangeLog:
* server.c (handle_general_set): Remove unnecessary xstrdup.
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Nothing is using it anymore.
gdb/ChangeLog:
* common/gdb_vecs.c (free_char_ptr_vec): Remove.
* common/gdb_vecs.h (free_char_ptr_vec): Remove.
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This patch makes the charset list an std::vector instead of a VEC.
Because we must have access to the raw pointers as a simple array, we
can't use a vector of unique_ptr/unique_xmalloc_ptr. Therefore, wrap
the vector in a simple class to facilitate the cleanup. This allows
removing one usage of free_char_ptr_vec.
gdb/ChangeLog:
* charset.c (struct charset_vector): New.
(charsets): Change type to charset_vector.
(find_charset_names): Adjust.
(add_one): Adjust.
(_initialize_charset): Adjust.
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This allows removing a usage of free_char_ptr_vec.
gdb/ChangeLog:
* progspace.h (struct program_space) <deleted_solibs>: Change
type to std::vector<std::string>.
* progspace.c (clear_program_space_solib_cache): Adjust.
* breakpoint.c (print_solib_event): Adjust.
(check_status_catch_solib): Adjust.
* solib.c (update_solib_list): Adjust.
* ui-out.h (class ui_out) <field_string>: New overload.
* ui-out.c (ui_out::field_string): New overload.
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This patch makes program_space a C++ object by adding a
constructor/destructor, giving default values to fields, and using
new/delete.
gdb/ChangeLog:
* progspace.h (struct program_space): Add constructor and
destructor, initialize fields.
(add_program_space): Remove.
* progspace.c (add_program_space): Rename to...
(program_space::program_space): ... this.
(release_program_space): Rename to...
(program_space::~program_space): ... this.
(delete_program_space): Use delete to delete program_space.
(initialize_progspace): Use new to allocate program_space.
* inferior.c (add_inferior_with_spaces): Likewise.
(clone_inferior_command): Likewise.
* infrun.c (follow_fork_inferior): Likewise.
(handle_vfork_child_exec_or_exit): Likewise.
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This patch makes delim_string_to_char_ptr_vec and all related functions
use std::vector of gdb::unique_xmalloc_ptr. This allows getting rid of
make_cleanup_free_char_ptr_vec. Returning a vector of
unique_xmalloc_ptr instead of std::string allows to minimize the impacts
on the calling code. We can evaluate later whether we could/should
return a vector of std::strings instead.
gdb/ChangeLog:
* common/gdb_vecs.h (make_cleanup_free_char_ptr_vec): Remove.
(delim_string_to_char_ptr_vec): Return std::vector of
gdb::unique_xmalloc_ptr.
(dirnames_to_char_ptr_vec_append): Take std::vector of
gdb::unique_xmalloc_ptr.
(dirnames_to_char_ptr_vec): Return std::vector of
gdb::unique_xmalloc_ptr.
* common/gdb_vecs.c (delim_string_to_char_ptr_vec_append):
Take std::vector of gdb::unique_xmalloc_ptr, adjust the code.
(delim_string_to_char_ptr_vec): Return an std::vector of
gdb::unique_xmalloc_ptr, adjust the code.
(dirnames_to_char_ptr_vec_append): Take an std::vector of
gdb::unique_xmalloc_ptr, adjust the code.
(dirnames_to_char_ptr_vec): Return an std::vector of
gdb::unique_xmalloc_ptr, adjust the code.
* auto-load.c (auto_load_safe_path_vec): Change type to
std::vector of gdb::unique_xmalloc_ptr.
(auto_load_expand_dir_vars): Return an std::vector of
gdb::unique_xmalloc_ptr, adjust the code.
(auto_load_safe_path_vec_update): Adjust.
(filename_is_in_auto_load_safe_path_vec): Adjust.
(auto_load_objfile_script_1): Adjust.
* build-id.c (build_id_to_debug_bfd): Adjust.
* linux-thread-db.c (thread_db_load_search): Adjust.
* source.c (add_path): Adjust.
(openp): Adjust.
* symfile.c (find_separate_debug_file): Adjust.
* utils.c (do_free_char_ptr_vec): Remove.
(make_cleanup_free_char_ptr_vec): Remove.
gdb/gdbserver/ChangeLog:
* server.c (parse_debug_format_options): Adjust to
delim_string_to_char_ptr_vec changes.
* thread-db.c (thread_db_load_search): Adjust to
dirnames_to_char_ptr_vec changes.
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Another patch aimed at making binutils comply with the GNU coding
standard. The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html
cpu/
* frv.opc: Include opintl.h.
(add_next_to_vliw): Use opcodes_error_handler to print error.
Standardize error message.
(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
* sysdep.h (opcodes_error_handler): Define.
(_bfd_error_handler): Declare.
* Makefile.am: Remove stray #.
* opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
EDIT" comment.
* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
opcodes_error_handler to print errors. Standardize error messages.
* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
and include opintl.h.
* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
* i386-gen.c: Standardize error messages.
* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
* Makefile.in: Regenerate.
* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
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on mingw*)
commit b4987c956dfa44ca9fd8552f63e15f5fa094b2a4
Author: Sergio Durigan Junior <sergiodj@redhat.com>
Date: Fri Feb 9 18:44:59 2018 -0500
Create new common/pathstuff.[ch]
Introduced a regression when compiling for mingw*:
/gdb/common/pathstuff.c: In function 'gdb::unique_xmalloc_ptr<char>
gdb_realpath(const char*)':
/gdb/common/pathstuff.c:56:14: error: 'MAX_PATH' was not declared in this scope
char buf[MAX_PATH];
^
/gdb/common/pathstuff.c:57:5: error: 'DWORD' was not declared in this scope
DWORD len = GetFullPathName (filename, MAX_PATH, buf, NULL);
^
/gdb/common/pathstuff.c:57:11: error: expected ';' before 'len'
DWORD len = GetFullPathName (filename, MAX_PATH, buf, NULL);
^
/gdb/common/pathstuff.c:63:9: error: 'len' was not declared in this scope
if (len > 0 && len < MAX_PATH)
^
/gdb/common/pathstuff.c:64:54: error: 'buf' was not declared in this scope
return gdb::unique_xmalloc_ptr<char> (xstrdup (buf));
^
make[2]: *** [pathstuff.o] Error 1
The proper fix is to conditionally include "<windows.h>". This commit
does that, without introducing any regressions as per tests made by
our BuildBot.
gdb/ChangeLog:
2018-03-01 Sergio Durigan Junior <sergiodj@redhat.com>
PR gdb/22907
* common/pathstuff.c: Conditionally include "<windows.h>".
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While using @progbits in .pushsection work on some targets, it does not
work on arm target where this introduces a comment. This patch replaces
its use in gdb.dlang/watch-loc.c and gdb.mi/dw2-ref-missing-frame-func.c
by %progbits which should work on all targets since it is used in
target-independent elf/section7.s GAS test.
2018-03-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
gdb/testsuite/
* gdb.dlang/watch-loc.c: Use %progbits instead of @progbits.
* gdb.mi/dw2-ref-missing-frame-func.c: Likewise.
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PR 22903
bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch
and nop instead of 4.
(elfNN_arch64_build_stubs): Add nop after branch. Increase size by
8 instead of 4.
ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
Give stub_sec 8 byte alignment.
* emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5.
* emulparams/aarch64elf.sh (NOP): Likewise.
* emulparams/aarch64elf32.sh (NOP): Likewise.
* emulparams/aarch64fbsd.sh (NOP): Likewise.
* emulparams/aarch64linux.sh (NOP): Likewise.
* emulparams/aarch64linux32.sh (NOP): Likewise.
* testsuite/ld-aarch64/erratum835769.d: Adjust for added nop.
* testsuite/ld-aarch64/erratum843419.d: Likewise.
* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-b-none-function.d: Likewise.
* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-b-section.d: Likewise.
* testsuite/ld-aarch64/farcall-b.d: Likewise.
* testsuite/ld-aarch64/farcall-back.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
* testsuite/ld-aarch64/farcall-bl.d: Likewise.
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Commit 4d354d8b8932d450c77fd52f3501662827523014 introduced a NULL
pointer dereference by replacing a pointer assignment by a pointer
dereference assignment without adding a NULL pointer check. This patch
fixes it.
2018-03-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (md_begin): Add NULL pointer check before
dereferencing march_ext_opt.
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The gcore shell script (gdb/gcore.in) doesn't quote its variables
enough.
For example, trying to write a core file with - say - a space
ungraciously fails like this:
$ gcore -o 'foo bar' 6270
/usr/bin/gcore: line 92: [: foo: binary operator expected
gcore: failed to create foo bar.6270
Similarly, one can inject meta characters like * (by accident)
that may yield unexpected results, e.g. as in:
$ gcore -o foobar '*'
This change fixes these issues in several places.
Aso, since the script uses array syntax, the patch changes the
the shell in the first line from `/bin/sh` to /bin/bash`.
POSIX doesn't specify the array syntax for shell, thus, the
script doesn't work on systems where /bin/sh is linked to - say -
dash.
Since the source gcore.in already is processed by a pre-processor
one could even auto-detect the path to bash and thus dynamically
generate the first line. For systems where bash isn't available
via /bin/bash. But I think this would be overkill and /bin/bash
is good enough as most systems probably have it.
gdb/ChangeLog:
PR gdb/22888
* gcore.in: Quote variables and switch interpreter to bash.
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bfd/
PR 22756
* elfnn-riscv.c (riscv_relax_delete_bytes): When adjust st_size, use
else if instead of if.
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Pedro pointed out that some Rust tests were failing after the recent
enum change. I was able to reproduce this even with the most current
Rust compiler -- no test was failing, but rather the gdb internal
error was causing an "untested" result, which I didn't notice.
The internal error is caused by a bad assertion in
alloc_discriminant_info. This happened because, in an earlier version
of the patch, the discriminant could only appear at index 0. However,
it can now appear anywhere. This patch fixes the assertion in the
obvious way, and adds a second assertion to ensure that the
discriminant is also correct.
Fixing this revealed a real failure, which was caused by using the
wrong base name when computing the name of a univariant enum's sole
member. This is also fixed here.
Tested by running the gdb.rust tests with rustc 1.23 and
double-checking the summary:
# of expected passes 276
Note that if you try this yourself, it is still possible to get an
"untested" result from traits.exp if your Rust compiler is old enough.
2018-03-01 Tom Tromey <tom@tromey.com>
* dwarf2read.c (alloc_discriminant_info): Fix default_index
assertion. Add assertion for discriminant_index.
(quirk_rust_enum): Use correct base type name in univariant case.
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I've always found the code in ARM backend of gas to control what
CPU/architecture and FPU are selected by the user and to support
autodetection of features complex and confusing. Chief among the
issues I have with that code is the lack of comments to explain
the meaning of the various variables. This patch addresses that
and much more:
- add comments to explain meaning of all arm_feature_set variables
- keep track of currently selected CPU, extensions and FPU in a separate
set of new variables
- make naming of variable more consistent
- remove dead code
- simplify handling of extensions
The overall approach is as follows:
* restrict m*_opt variable to hold the feature bits of the
corresponding mcpu/march/mfpu command-line options
* record selected CPU, extensions and FPU in new selected_* during
md_begin
* whenever a .cpu/.arch/.arch_extension/.fpu directive is met, update
the corresponding selected_* variables (eg. selected_arch, then
selected_cpu for a .cpu or .arch directive) and then finally
cpu_variant from them
* pass extension feature set pointer by value to arm_parse_extension
since it's only ever called from arm_parse_cpu and arm_parse_arch
which allocate the extension feature set themselves
* likewise, remove allocation from s_arm_arch_extension since the use
of arm_feature_set structure for selected_ext rather than a pointer
alleviate the need for it
* in autodetection mode, only set all CPU fits in cpu_variant but leave
selected_cpu* variables unset
* in md_begin, remove dead "else if" to set a default FPU when no FPU
was selected. Setting a default FPU based on CPU as did the code
before it turn dead should be based on the default FPU field of the
CPU and architecture table as will be done in a separate patch. Logic
is wrong anyway since it sets VFP2 as default FPU for Armv6-M and
Armv7-M
Hopefully that should be enough to understand the change but if not feel
free to ask questions about the patch. While I believe the new code is
easier to understand, it remains complex and the old one was even more
complex so the change is difficult to understand.
2018-03-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (cpu_variant, arm_arch_used, thumb_arch_used,
legacy_cpu, legacy_fpu, mcpu_cpu_opt, dyn_mcpu_ext_opt,
mcpu_fpu_opt, march_cpu_opt, dyn_march_ext_opt, march_fpu_opt,
mfpu_opt, object_arch, selected_cpu): Comment meaning of variables.
(dyn_mcpu_ext_opt): Also rename into ...
(mcpu_ext_opt): This.
(dyn_march_ext_opt): Also rename into ...
(march_ext_opt): This.
(object_arch): Also rename into ...
(selected_object_arch): This and make it a plain arm_feature_set
structure.
(selected_arch, selected_ext, selected_fpu): New static variables.
(mark_feature_used): Fix comments, feature is marked as used iff it is
currently allowed.
(do_bx): Adapt to change in name and type of object_arch.
(md_begin): Set selected_arch rather than mcpu_cpu_opt, selected_ext
rather than dyn_mcpu_ext_opt and selected_fpu rather than mfpu_opt.
Remove dead code to set default FPU if architecture version is greater
than 5. Set all CPU bits of cpu_variant directly in autodection
leaving mcpu_cpu_opt, selected_arch and selected_cpu unset.
(arm_parse_extension): Take extension feature set pointer parameter by
value rather than by pointer. Remove allocation code. Adapt code
accordingly.
(arm_parse_cpu): Adapt to variable renaming and changes in
arm_parse_extension () signature.
(arm_parse_arch): Likewise.
(aeabi_set_public_attributes): Also set selected_arch and selected_ext
in addition to selected_cpu. Set flags_arch and flags_ext from them
instead of selected_cpu. Adapt to variables renaming and type change.
(arm_md_post_relax): Adapt to variable renaming.
(s_arm_cpu): Set selcted_cpu_cpu and selected_ext instead of
mcpu_cpu_opt and dyn_mcpu_ext_opt. Set selected_cpu from them and
cpu_variant from selected_cpu and selected_fpu.
(s_arm_arch): Likewise.
(s_arm_object_arch): Adapt to variable renaming.
(s_arm_arch_extension): Use ARM_CPU_IS_ANY instead of checking feature
set against arm_any. Check selected_arch rather than *mcpu_cpu_opt.
Set selected_ext rather than *dyn_mcpu_ext_opt and remove allocation
code.
(s_arm_fpu): Set selected_fpu instead of mfpu_opt. Set all CPU feature
bits if in autodetection mode.
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corrupt DWARF information on a 32-bit host.
PR 22905
* dwarf.c (display_debug_ranges): Check that the offset loaded
from the range_entry structure is valid.
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These flags are returned as an int by get_call_history_modifiers, and
get cast back to record_print_flags in the btrace code. Instead, we can
make the arguments of that type from start to end.
gdb/ChangeLog:
* record.c (get_call_history_modifiers): Return a
record_print_flags.
(cmd_record_call_history): Adjust.
* record-btrace.c (record_btrace_call_history): Adjust.
(record_btrace_call_history_range): Adjust.
(record_btrace_call_history_from): Adjust.
* target-debug.h (target_debug_print_record_print_flags): New.
* target-delegates.c: Re-generate.
* target.c (target_call_history): Change flags type.
(target_call_history_from): Likewise.
(target_call_history_range): Likewise.
* target.h (struct target_ops) <target_call_history>: Likewise.
(target_call_history_from): Likewise.
(target_call_history_range): Likewise.
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When 2 source registers are identical, AVX256 and AVX512 vpsub[bwdq]
instructions can be encoded with VEX128 or EVEX128 encodings.
gas/
* config/tc-i386.c (optimize_encoding): Optimize AVX256 and
AVX512 vpsub[bwdq] instructions.
* testsuite/gas/i386/optimize-1.s: Add tests for AVX256 and
AVX512 vpsub[bwdq] instructions.
* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
opcodes/
* * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
vpsub[bwdq] instructions.
* i386-tbl.h: Regenerated.
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