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2021-12-02Implement 'task apply'Tom Tromey6-18/+277
This adds a 'task apply' command, which is the Ada tasking analogue of 'thread apply'. Unlike 'thread apply', it doesn't offer the 'ascending' flag; but otherwise it's essentially the same.
2021-12-02Add "task" keyword to the "watch" commandTom Tromey5-1/+175
Breakpoints in gdb can be made specific to an Ada task using the "task" qualifier. This patch applies this same idea to watchpoints.
2021-12-02aarch64: Update gas/NEWS for recent changesRichard Sandiford1-1/+4
gas/ * NEWS: Mention support for Armv8.8-A and for new system registers.
2021-12-02aarch64: Add BC instructionRichard Sandiford10-48/+158
This patch adds support for the Armv8.8-A BC instruction. [https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions/BC-cond--Branch-Consistent-conditionally-?lang=en] include/ * opcode/aarch64.h (AARCH64_FEATURE_HBC): New macro. (AARCH64_ARCH_V8_8): Make armv8.8-a imply AARCH64_FEATURE_HBC. opcodes/ * aarch64-tbl.h (aarch64_feature_hbc): New variable. (HBC, HBC_INSN): New macros. (aarch64_opcode_table): Add BC.C. * aarch64-dis-2.c: Regenerate. gas/ * doc/c-aarch64.texi: Document +hbc. * config/tc-aarch64.c (aarch64_features): Add "hbc". * testsuite/gas/aarch64/hbc.s, testsuite/gas/aarch64/hbc.d: New test. * testsuite/gas/aarch64/hbc-invalid.s, testsuite/gas/aarch64/hbc-invalid.l, testsuite/gas/aarch64/hbc-invalid.d: New test.
2021-12-02aarch64: Enforce P/M/E order for MOPS instructionsRichard Sandiford8-32/+354
The MOPS instructions should be used as a triple, such as: cpyfp [x0]!, [x1]!, x2! cpyfm [x0]!, [x1]!, x2! cpyfe [x0]!, [x1]!, x2! The registers should also be the same for each writeback operand. This patch adds a warning for code that doesn't follow this rule, along similar lines to the warning that we already emit for invalid uses of MOVPRFX. include/ * opcode/aarch64.h (C_SCAN_MOPS_P, C_SCAN_MOPS_M, C_SCAN_MOPS_E) (C_SCAN_MOPS_PME): New macros. (AARCH64_OPDE_A_SHOULD_FOLLOW_B): New aarch64_operand_error_kind. (AARCH64_OPDE_EXPECTED_A_AFTER_B): Likewise. (aarch64_operand_error): Make each data value a union between an int and a string. opcodes/ * aarch64-tbl.h (MOPS_CPY_OP1_OP2_INSN): Add scan flags. (MOPS_SET_OP1_OP2_INSN): Likewise. * aarch64-opc.c (set_out_of_range_error): Update after change to aarch64_operand_error. (set_unaligned_error, set_reg_list_error): Likewise. (init_insn_sequence): Use a 3-instruction sequence for MOPS P instructions. (verify_mops_pme_sequence): New function. (verify_constraints): Call it. * aarch64-dis.c (print_verifier_notes): Handle AARCH64_OPDE_A_SHOULD_FOLLOW_B and AARCH64_OPDE_EXPECTED_A_AFTER_B. gas/ * config/tc-aarch64.c (operand_mismatch_kind_names): Add entries for AARCH64_OPDE_A_SHOULD_FOLLOW_B and AARCH64_OPDE_EXPECTED_A_AFTER_B. (operand_error_higher_severity_p): Check that AARCH64_OPDE_A_SHOULD_FOLLOW_B and AARCH64_OPDE_EXPECTED_A_AFTER_B come between AARCH64_OPDE_RECOVERABLE and AARCH64_OPDE_SYNTAX_ERROR; their relative order is not significant. (record_operand_error_with_data): Update after change to aarch64_operand_error. (output_operand_error_record): Likewise. Handle AARCH64_OPDE_A_SHOULD_FOLLOW_B and AARCH64_OPDE_EXPECTED_A_AFTER_B. * testsuite/gas/aarch64/mops_invalid_2.s, testsuite/gas/aarch64/mops_invalid_2.d, testsuite/gas/aarch64/mops_invalid_2.l: New test.
2021-12-02aarch64: Add support for +mopsRichard Sandiford17-33/+3133
This patch adds support for FEAT_MOPS, an Armv8.8-A extension that provides memcpy and memset acceleration instructions. I took the perhaps controversial decision to generate the individual instruction forms using macros rather than list them out individually. This becomes useful with a follow-on patch to check that code follows the correct P/M/E sequence. [https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions?lang=en] include/ * opcode/aarch64.h (AARCH64_FEATURE_MOPS): New macro. (AARCH64_ARCH_V8_8): Make armv8.8-a imply AARCH64_FEATURE_MOPS. (AARCH64_OPND_MOPS_ADDR_Rd): New aarch64_opnd. (AARCH64_OPND_MOPS_ADDR_Rs): Likewise. (AARCH64_OPND_MOPS_WB_Rn): Likewise. opcodes/ * aarch64-asm.h (ins_x0_to_x30): New inserter. * aarch64-asm.c (aarch64_ins_x0_to_x30): New function. * aarch64-dis.h (ext_x0_to_x30): New extractor. * aarch64-dis.c (aarch64_ext_x0_to_x30): New function. * aarch64-tbl.h (aarch64_feature_mops): New feature set. (aarch64_feature_mops_memtag): Likewise. (MOPS, MOPS_MEMTAG, MOPS_INSN, MOPS_MEMTAG_INSN) (MOPS_CPY_OP1_OP2_PME_INSN, MOPS_CPY_OP1_OP2_INSN, MOPS_CPY_OP1_INSN) (MOPS_CPY_INSN, MOPS_SET_OP1_OP2_PME_INSN, MOPS_SET_OP1_OP2_INSN) (MOPS_SET_INSN): New macros. (aarch64_opcode_table): Add MOPS instructions. (aarch64_opcode_table): Add entries for AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. * aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. (verify_three_different_regs): New function. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. gas/ * doc/c-aarch64.texi: Document +mops. * config/tc-aarch64.c (parse_x0_to_x30): New function. (parse_operands): Handle AARCH64_OPND_MOPS_ADDR_Rd, AARCH64_OPND_MOPS_ADDR_Rs and AARCH64_OPND_MOPS_WB_Rn. (aarch64_features): Add "mops". * testsuite/gas/aarch64/mops.s, testsuite/gas/aarch64/mops.d: New test. * testsuite/gas/aarch64/mops_invalid.s, * testsuite/gas/aarch64/mops_invalid.d, * testsuite/gas/aarch64/mops_invalid.l: Likewise.
2021-12-02aarch64: Add Armv8.8-A system registersRichard Sandiford6-0/+51
Armv8.8-A defines two new system registers: allint and icc_nmiar1_el1. Both of them were previously unmapped. allint supports a 0/1 immediate. [https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/ALLINT--All-Interrupt-Mask-Bit?lang=en] [https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/ICC-NMIAR1-EL1--Interrupt-Controller-Non-maskable-Interrupt-Acknowledge-Register-1?lang=en] opcodes/ * aarch64-opc.c (SR_V8_8): New macro. (aarch64_sys_regs): Add allint and icc_nmiar1_el1. (aarch64_pstatefields): Add allint. gas/ * testsuite/gas/aarch64/armv8_8-a-sysregs.s, * testsuite/gas/aarch64/armv8_8-a-sysregs.d: New test. * testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.s, * testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.l, * testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.d: New test.
2021-12-02aarch64: Add id_aa64isar2_el1Richard Sandiford6-0/+9
Armv8.8-A defines a read-only system register called id_aa64isar2_el1. The register was previously RES0 and should therefore be accepted at all architecture levels. [https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en] opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add id_aa64isar2_el1. gas/ * testsuite/gas/aarch64/sysreg-diagnostic.s: Test writes to id_aa64isar2_el1. * testsuite/gas/aarch64/sysreg-diagnostic.d: Update accordingly. * testsuite/gas/aarch64/sysreg-diagnostic.l: Likewise. * testsuite/gas/aarch64/sysreg.s: Test reads from id_aa64isar2_el1. * testsuite/gas/aarch64/sysreg.d: Update accordingly.
2021-12-02aarch64: Add support for Armv8.8-ARichard Sandiford5-2/+13
This patch adds skeleton support for -march=armv8.8-a, testing only that it correctly inherits from armv8.7-a. include/ * opcode/aarch64.h (AARCH64_FEATURE_V8_8): New macro. (AARCH64_ARCH_V8_8): Likewise. gas/ * doc/c-aarch64.texi: Document armv8.8-a. * config/tc-aarch64.c (aarch64_archs): Add armv8-8-a * testsuite/gas/aarch64/v8-8-a.s, * testsuite/gas/aarch64/v8-8-a.d: New test.
2021-12-02aarch64: Provide line info for unclosed sequencesRichard Sandiford5-15/+17
We warn about MOVPRFX instructions that have no following instruction. This patch adds a line number to the message, which is useful if the assembly code has multiple text sections. The new code is unconditional since OBJ_ELF is always defined for aarch64. gas/ * config/tc-aarch64.h (aarch64_segment_info_type): Add last_file and last_line. * config/tc-aarch64.c (now_instr_sequence): Delete. (force_automatic_sequence_close): Provide a line number when reporting unclosed sequences. (md_assemble): Record the location of the instruction in tc_segment_info. * testsuite/gas/aarch64/sve-movprfx_4.l: Add line number to error message. * testsuite/gas/aarch64/sve-movprfx_7.l: Likewise. * testsuite/gas/aarch64/sve-movprfx_8.l: Likewise.
2021-12-02aarch64: Tweak insn sequence codeRichard Sandiford2-33/+27
libopcodes has some code to check constraints across sequences of consecutive instructions. It was added to support MOVPRFX sequences but is going to be useful for the Armv8.8-A MOPS feature as well. Currently the structure has one field to record the instruction that started a sequence and another to record the remaining instructions in the sequence. It's more convenient for the MOPS code if we put the instructions into a single array instead. No functional change intended. include/ * opcode/aarch64.h (aarch64_instr_sequence): Replace num_insns and current_insns with num_added_insns and num_allocated_insns. opcodes/ * aarch64-opc.c (add_insn_to_sequence): New function. (init_insn_sequence): Update for new aarch64_instr_sequence layout. Add the first instruction to the inst array. (verify_constraints): Update for new aarch64_instr_sequence layout. Don't add the last instruction to the array.
2021-12-02aarch64: Add maximum immediate value to aarch64_sys_regRichard Sandiford11-74/+92
The immediate form of MSR has a 4-bit immediate field (in CRm). However, many forms of MSR require a smaller immediate. These cases are identified by value in operand_general_constraint_met_p, but they're now the common case rather than the exception. This patch therefore adds the maximum value to the sys_reg description and gets the range from there. It also enforces the minimum of 0, which avoids a situation in which: msr dit, #2 would give the expected: Error: immediate value out of range 0 to 1 whereas: msr dit, #-1 would give: Error: immediate value out of range 0 to 15 (from the later UIMM4 checking). Also: - we were reporting the first error above against the wrong operand - TCO takes a single-bit immediate, but we previously allowed all 16 values. [https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions/MSR--immediate---Move-immediate-value-to-Special-Register-?lang=en] opcodes/ * aarch64-opc.h (F_REG_MAX_VALUE, F_GET_REG_MAX_VALUE): New macros. * aarch64-opc.c (operand_general_constraint_met_p): Read the maximum MSR immediate value from aarch64_pstatefields. (aarch64_pstatefields): Add the maximum immediate value for each register. gas/ * testsuite/gas/aarch64/sysreg-4.s: Use an immediate value of 1 rather than 8 for the TCO test. * testsuite/gas/aarch64/sysreg-4.d: Update accordingly. * testsuite/gas/aarch64/armv8_2-a-illegal.l: Fix operand number in MSR immediate error messages. * testsuite/gas/aarch64/diagnostic.l: Likewise. * testsuite/gas/aarch64/pan-illegal.l: Likewise. * testsuite/gas/aarch64/ssbs-illegal1.l: Likewise. * testsuite/gas/aarch64/illegal-sysreg-4b.s, * testsuite/gas/aarch64/illegal-sysreg-4b.d, * testsuite/gas/aarch64/illegal-sysreg-4b.l: New test.
2021-12-02Allow the --visualize-jumps feature to work with the AVR disassembler.Marcus Nilsson2-5/+37
* avr-dis.c (avr_operand); Pass in disassemble_info and fill in insn_type on branching instructions.
2021-12-02gdb, include: replace pragmas with DIAGNOSTIC macros, fix build with g++ 4.8Simon Marchi3-6/+23
When introducing this code, I forgot that we had some macros for this. Replace some "manual" pragma diagnostic with some DIAGNOSTIC_* macros, provided by include/diagnostics.h. In diagnostics.h: - Add DIAGNOSTIC_ERROR, to enable a diagnostic at error level. - Add DIAGNOSTIC_ERROR_SWITCH, to enable -Wswitch at error level, for both gcc and clang. Additionally, using DIAGNOSTIC_PUSH, DIAGNOSTIC_ERROR_SWITCH and DIAGNOSTIC_POP seems to misbehave with g++ 4.8, where we see these errors: CXX ada-tasks.o /home/smarchi/src/binutils-gdb/gdb/ada-tasks.c: In function void read_known_tasks(): /home/smarchi/src/binutils-gdb/gdb/ada-tasks.c:998:10: error: enumeration value ADA_TASKS_UNKNOWN not handled in switch [-Werror=switch] switch (data->known_tasks_kind) ^ Because of the POP, the diagnostic should go back to being disabled, since it was disabled in the beginning, but that's not what we see here. Versions of GCC >= 5 compile correctly. Work around this by making DIAGNOSTIC_ERROR_SWITCH a no-op for GCC < 5. Note that this code (already as it exists in master today) enables -Wswitch at the error level even if --disable-werror is passed. It shouldn't be a problem, as it's not like a new enumerator will appear out of nowhere and cause a build error if building with future compilers. Still, for correctness, we would ideally want to ask the compiler to enable -Wswitch at its default level (as if the user had passed -Wswitch on the command-line). There doesn't seem to be a way to do this. Change-Id: Id33ebec3de39bd449409ea0bab59831289ffe82d
2021-12-02gas: re-generate configureSimon Marchi1-2/+1
When configuring gas, I get: config.status: error: cannot find input file: `doc/Makefile.in' This is because configure is out-of-date, re-generate it. Change-Id: Iaa5980c282900d9fd23b90f0df25bf8ba3676498
2021-12-02libctf: re-generate configureSimon Marchi1-2/+1
When configuring libctf, I get: config.status: error: cannot find input file: `doc/Makefile.in' This is because configure is out-of-date, re-generate it. Change-Id: Ie69acd33012211a4620661582c7d24ad6d2cd169
2021-12-02x86: Skip __[start|stop]_SECNAME for --gc-sections -z start-stop-gcH.J. Lu27-0/+391
Don't convert memory load to immediate load on __start_SECNAME and __stop_SECNAME for --gc-sections -z start-stop-gc if all SECNAME sections been garbage collected. bfd/ PR ld/27491 * elf32-i386.c (elf_i386_convert_load_reloc): Skip __start_SECNAME and __stop_SECNAME for --gc-sections -z start-stop-gc if the input section been garbage collected. * elf64-x86-64.c (elf_x86_64_convert_load_reloc): Likewise. * elfxx-x86.h (elf_x86_start_stop_gc_p): New function. ld/ PR ld/27491 * testsuite/ld-i386/i386.exp: Run PR ld/27491 tests. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/pr27491-1.s: New file. * testsuite/ld-i386/pr27491-1a.d: Likewise. * testsuite/ld-i386/pr27491-1b.d: Likewise. * testsuite/ld-i386/pr27491-1c.d: Likewise. * testsuite/ld-i386/pr27491-2.d: Likewise. * testsuite/ld-i386/pr27491-2.s: Likewise. * testsuite/ld-i386/pr27491-3.d: Likewise. * testsuite/ld-i386/pr27491-3.s: Likewise. * testsuite/ld-i386/pr27491-4.d: Likewise. * testsuite/ld-i386/pr27491-4a.s: Likewise. * testsuite/ld-i386/pr27491-4b.s: Likewise. * testsuite/ld-x86-64/pr27491-1.s: Likewise. * testsuite/ld-x86-64/pr27491-1a.d: Likewise. * testsuite/ld-x86-64/pr27491-1b.d: Likewise. * testsuite/ld-x86-64/pr27491-1c.d: Likewise. * testsuite/ld-x86-64/pr27491-2.d: Likewise. * testsuite/ld-x86-64/pr27491-2.s: Likewise. * testsuite/ld-x86-64/pr27491-3.d: Likewise. * testsuite/ld-x86-64/pr27491-3.s: Likewise. * testsuite/ld-x86-64/pr27491-4.d: Likewise. * testsuite/ld-x86-64/pr27491-4a.s: Likewise. * testsuite/ld-x86-64/pr27491-4b.s: Likewise.
2021-12-01bfd: delete unused proto settingsMike Frysinger2-21/+0
These have been around for decades but don't appear to be used, and trying to build them (e.g. `make archive.p archive.ip`) doesn't work, so just delete it all.
2021-12-01gas: merge doc subdir up a levelMike Frysinger6-1163/+671
This avoids a recursive make into the doc subdir and speeds up the build slightly. It also allows for more parallelism.
2021-12-01libctf: merge doc subdir up a levelMike Frysinger5-1014/+410
This avoids a recursive make into the doc subdir and speeds up the build slightly. It also allows for more parallelism.
2021-12-01gdb: use actual DWARF version in compunit's debugformat fieldSimon Marchi1-1/+12
The "info source" command, with a DWARF-compile program, always show that the debug info is "DWARF 2": (gdb) info source Current source file is test.c Compilation directory is /home/smarchi/build/binutils-gdb/gdb Located in /home/smarchi/build/binutils-gdb/gdb/test.c Contains 2 lines. Source language is c. Producer is GNU C17 9.3.0 -mtune=generic -march=x86-64 -g3 -gdwarf-5 -O0 -fasynchronous-unwind-tables -fstack-protector-strong -fstack-clash-protection -fcf-protection. Compiled with DWARF 2 debugging format. Includes preprocessor macro info. Change it to display the actual DWARF version: (gdb) info source Current source file is test.c Compilation directory is /home/smarchi/build/binutils-gdb/gdb Located in /home/smarchi/build/binutils-gdb/gdb/test.c Contains 2 lines. Source language is c. Producer is GNU C17 9.3.0 -mtune=generic -march=x86-64 -g3 -gdwarf-5 -O0 -fasynchronous-unwind-tables -fstack-protector-strong -fstack-clash-protection -fcf-protection. Compiled with DWARF 5 debugging format. Includes preprocessor macro info. The comp_unit_head::version field is guaranteed to be between 2 and 5, thanks to the check in read_comp_unit_head. So we can still use static strings to pass to record_debugformat, and keep it efficient. In the future, when somebody will update GDB to support DWARF 6, they'll hit this assert and have to update this code. Change-Id: I3270b7ebf5e9a17b4215405bd2e365662a4d6172
2021-12-01elf: Discard input .note.gnu.build-id sectionsH.J. Lu6-1/+117
1. Discard input .note.gnu.build-id sections. 2. Clear the build ID field before writing. 3. Use bfd_make_section_anyway_with_flags to create the output .note.gnu.build-id section. PR ld/28639 * ldelf.c (ldelf_after_open): Discard input .note.gnu.build-id sections, excluding the first one. (write_build_id): Clear the build ID field before writing. (ldelf_setup_build_id): Use bfd_make_section_anyway_with_flags to create the output .note.gnu.build-id section. * testsuite/ld-elf/build-id.exp: New file. * testsuite/ld-elf/pr28639a.rd: Likewise. * testsuite/ld-elf/pr28639b.rd: Likewise. * testsuite/ld-elf/pr28639c.rd: Likewise. * testsuite/ld-elf/pr28639d.rd: Likewise.
2021-12-02Automatic date update in version.inGDB Administrator1-1/+1
2021-12-01binutils: add missing prefix for binutils/index.html ruleMike Frysinger2-2/+2
2021-12-01readelf: recognize FDO Packaging Metadata ELF note. (Correcting snafu ↵Luca Boccassi1-2/+2
during patch application)
2021-12-01readelf: recognize FDO Packaging Metadata ELF noteLuca Boccassi2-0/+18
As defined on: https://systemd.io/COREDUMP_PACKAGE_METADATA/ this note will be used starting from Fedora 36. Allow readelf --notes to pretty print it: Displaying notes found in: .note.package Owner Data size Description FDO 0x00000039 FDO_PACKAGING_METADATA Packaging Metadata: {"type":"deb","name":"fsverity-utils","version":"1.3-1"} Signed-off-by: Luca Boccassi <luca.boccassi@microsoft.com>
2021-12-01[gdb/testsuite] Fix typo in gdb.multi/multi-arch-exec.expTom de Vries1-1/+1
With gdb.multi/multi-arch-exec.exp I run into: ... Running src/gdb/testsuite/gdb.multi/multi-arch-exec.exp ... ERROR: tcl error sourcing src/gdb/testsuite/gdb.multi/multi-arch-exec.exp. ERROR: wrong # args: extra words after "else" clause in "if" command while executing "if [istarget "powerpc64*-*-*"] { set march "-m64" } else if [istarget "s390*-*-*"] { set march "-m31" } else { set march "-m32" }" ... Fix the else if -> elseif typo. Tested on x86_64-linux.
2021-12-01[gdb/testsuite] Fix gdb.arch/i386-pkru.exp on linuxTom de Vries1-3/+10
When running test-case gdb.arch/i386-pkru.exp on a machine with "Memory Protection Keys for Userspace" support, we run into: ... (gdb) PASS: gdb.arch/i386-pkru.exp: probe PKRU support print $pkru^M $2 = 1431655764^M (gdb) FAIL: gdb.arch/i386-pkru.exp: pkru register ... The test-case expects the $pkru register to have the default value 0, matching the "init state" of 0 defined by the XSAVE hardware. Since linux kernel version v4.9 containing commit acd547b29880 ("x86/pkeys: Default to a restrictive init PKRU"), the register is set to 0x55555554 by default (which matches the printed decimal value above). Fix the FAIL by accepting this value for linux. Tested on x86_64-linux.
2021-12-01Fix the fields in the x_n union inside the the x_file structure so that ↵Nick Clifton2-5/+15
pointers can be stored. PR 28630 * coff/internal.h (x_n): Use bfd_hostptr_t for the fields in this structure.
2021-12-01gdb/remote: use scoped_restore to control starting_up flagAndrew Burgess1-22/+22
This commit makes use of a scoped_restore object to control the remote_state::starting_up flag within the remote_target::start_remote method. Ideally I would have liked to create the scoped_restore inside start_remote and just leave the restore in place until the end of the scope, however, I'm worried that doing this would change the behaviour of GDB. Specifically, in start_remote, the following code is executed once the starting_up flag has been restored to its previous value: if (breakpoints_should_be_inserted_now ()) insert_breakpoints (); I think (but am not 100% sure) that calling install_breakpoints could end up back inside remote_target::can_download_tracepoint, which does check the value of remote_state::starting_up. And so, I'm concerned that leaving the scoped_restore in place until the end of start_remote will cause a possible change in behaviour. To avoid this, and to leave things as close to the current behaviour as possible, I've split remote_target::start_remote into two, there's the main function body which moves into remote_target::start_remote_1, this function uses the scoped_restore to change the ::starting_up flag, then there's the old remote_target::start_remote, which now just calls ::start_remote_1, and then does the insert_breakpoints call. There should be no user visible changes after this commit, unless there's a situation where the ::starting_up flag could previously have been left set, if this was the case, then this situation should no longer be possible.
2021-11-30gdb.base/corefile-buildid.exp: fix DUPLICATEs when failing to generate a ↵Simon Marchi1-19/+19
core file When my system isn't properly configured to generate core files in the local directory, I see these DUPLICATEs: DUPLICATE: gdb.base/corefile-buildid.exp: could not generate core file Fix that by having a single with_test_prefix around that message and what follows. Change-Id: I4ac245fcce1c666db56e3bad3582aa17f183dcba
2021-11-30gold: enable silent build rulesMike Frysinger2-0/+40
2021-12-01Automatic date update in version.inGDB Administrator1-1/+1
2021-11-30gdb: Powerpc fix gdb.multi/multi-arch-exec.exp testCarl Love1-1/+3
The expect file has a procedure append_arch_options which sets march based the istarget. The current if / else statement does not check for powerpc64. The else statement is hit which sets march to -m32. This results in compilation errors on 64-bit PowerPC. This patch adds an if statement to check for powerpc64 and if true sets mach to -m64. The patch was tested on a Power 10 system. No compile errors were generated. The test completes with 1 expected pass and no failures.
2021-11-30binutils: regenerate Makefile.in after doc/ changesMike Frysinger1-16/+16
2021-11-30Fix missing build dependency for binutils man pagesRoland McGrath2-16/+21
binutils/ * doc/local.mk: Give each man page target its missing dependency on doc/$(am__dirstamp).
2021-11-30aarch64: Add missing system registers [PR27145]Richard Sandiford11-7/+1043
This patch adds support for various system registers, up to Armv8.7-A. This includes all the registers that were mentioned in the PR and that hadn't become supported since. opcodes/ PR aarch64/27145 * aarch64-opc.c (SR_V8_4): Remove duplicate definition. (SR_V8_6, SR_V8_7, SR_GIC, SR_AMU): New macros. (aarch64_sys_regs): Add missing entries (up to Armv8.7-A). gas/ PR aarch64/27145 * testsuite/gas/aarch64/sysreg-8.s, * testsuite/gas/aarch64/sysreg-8.d, * testsuite/gas/aarch64/illegal-sysreg-8.s, * testsuite/gas/aarch64/illegal-sysreg-8.d, * testsuite/gas/aarch64/illegal-sysreg-8.l, * testsuite/gas/aarch64/illegal-sysreg-8b.s, * testsuite/gas/aarch64/illegal-sysreg-8b.d, * testsuite/gas/aarch64/illegal-sysreg-8b.l: New tests. * testsuite/gas/aarch64/sysreg.s: Change system register numbers to ones that are still unallocated. * testsuite/gas/aarch64/sysreg.d: Update accordingly.
2021-11-30aarch64: Make LOR registers conditional on +lorRichard Sandiford5-5/+19
We have a +lor feature flag for the Limited Ordering Regions extension, but the associated registers didn't use it. opcodes/ * aarch64-opc.c (SR_LOR): New macro. (aarch64_sys_regs): Use it for lorc_el1, lorea_el1, lorn_el1 and lorsa_el1. gas/ * testsuite/gas/aarch64/sysreg-7.s: Enable +lor. * testsuite/gas/aarch64/illegal-sysreg-7.s: Test for LOR registers without +lor. * testsuite/gas/aarch64/illegal-sysreg-7.d: Update accordingly. * testsuite/gas/aarch64/illegal-sysreg-7.l: Likewise.
2021-11-30aarch64: Remove ZIDR_EL1Richard Sandiford4-8/+0
ZIDR_EL1 was part of an early version of SVE, but didn't make it to the final release. opcodes/ * aarch64-opc.c (aarch64_sys_regs): Remove zidr_el1 entry. gas/ * testsuite/gas/aarch64/sve-sysreg.s: Remove zidr_el1. * testsuite/gas/aarch64/sve-sysreg.d: Update accordingly. * testsuite/gas/aarch64/sve-sysreg-invalid.l: Likewise.
2021-11-30aarch64: Allow writes to MFAR_EL3Richard Sandiford6-21/+14
MFAR_EL3 is a read/write register, but was incorrectly marked as read-only [https://developer.arm.com/documentation/ddi0601/2021-09/AArch64-Registers/MFAR-EL3--PA-Fault-Address-Register?lang=en] opcodes/ * aarch64-opc.c (aarch64_sys_regs): Mark mfar_el3 as read-write. gas/ * testsuite/gas/aarch64/rme.s: Test writing to mfar_el3. * testsuite/gas/aarch64/rme.d: Update accordingly. * testsuite/gas/aarch64/rme-invalid.s: Delete. * testsuite/gas/aarch64/rme-invalid.l: Likewise. * testsuite/gas/aarch64/rme-invalid.d: Likewise.
2021-11-30aarch64: Mark PMSIDR_EL1 as read-onlyRichard Sandiford6-4/+9
We were incorrectly allowing writes to PMSIDR_EL1, which is a read-only register. [https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/PMSIDR-EL1--Sampling-Profiling-ID-Register?lang=en] opcodes/ * aarch64-opc.c (aarch64_sys_regs): Make pmsidr_el1 as F_REG_READ. gas/ * testsuite/gas/aarch64/msr.s: Remove write to pmsidr_el1. * testsuite/gas/aarch64/msr.d: Update accordingly. * testsuite/gas/aarch64/illegal-sysreg-2.s, * testsuite/gas/aarch64/illegal-sysreg-2.d, * testsuite/gas/aarch64/illegal-sysreg-2.l: New test.
2021-11-30aarch64: Remove duplicate system register entriesRichard Sandiford3-11/+1
There is a lot of overlap between the ETM and ETE system registers, so some registers were listed twice. Already tested by etm.[sd] and ete.[sd]. opcodes/ * aarch64-opc.c (aarch64_sys_regs): Combine ETE and ETM blocks and remove redundant entries. gas/ * testsuite/gas/aarch64/etm.s: Remove duplicated test. * testsuite/gas/aarch64/etm.d: Update accordingly.
2021-11-30aarch64: Check for register aliases before mnemonicsRichard Sandiford6-34/+38
Previously we would not accept: A .req B if A happened to be the name of an instruction. Adding new instructions could therefore invalidate existing register aliases. I noticed this with a test that used "zero" as a register alias for "xzr", where "zero" is now also the name of an SME instruction. I don't have any evidence that "real" code is doing this, but it seems at least plausible. This patch switches things so that we check for register aliases first. It might slow down parsing slightly, but the difference is unlikely to be noticeable. Things like: b .req + 0 still work, since create_register_alias checks for " .req ", and with the input scrubber, we'll only keep whitespace after .req if it's followed by another name. If there's some valid expression that I haven't thought about that is scrubbed to " .req ", users could avoid the ambiguity by wrapping .req in parentheses. The new test for invalid aliases already passed. I just wanted something to exercise the !dot condition. I can't find a way of exercising the (existing) p == base condition, but I'm not brave enough to say that it can never happen. If it does happen, get_mnemonic_name would return an empty string. gas/ * config/tc-aarch64.c (opcode_lookup): Move mnemonic extraction code to... (md_assemble): ...here. Check for register aliases first. * testsuite/gas/aarch64/register_aliases.d, testsuite/gas/aarch64/register_aliases.s: Test for a register alias called "zero". * testsuite/gas/aarch64/register_aliases_invalid.d, testsuite/gas/aarch64/register_aliases_invalid.l, testsuite/gas/aarch64/register_aliases_invalid.s: New test.
2021-11-30gdb/python: don't use the 'p' format for parsing argsAndrew Burgess2-4/+9
When running the gdb.python/py-arch.exp tests on a GDB built against Python 2 I ran into some errors. The problem is that this test script exercises the gdb.Architecture.integer_type method, and this method uses 'p' as an argument format specifier in a call to gdb_PyArg_ParseTupleAndKeywords. Unfortunately this specified was only added in Python 3.3, so will cause an error for earlier versions of Python. This commit switches to use the 'O' specifier to collect a PyObject, and then uses PyObject_IsTrue to convert the object to a boolean. An earlier version of this patch incorrectly switched from using 'p' to use 'i', however, it was pointed out during review that this would cause some changes in behaviour, for example both of these will work with 'p', but not with 'i': gdb.selected_inferior().architecture().integer_type(32, None) gdb.selected_inferior().architecture().integer_type(32, "foo") The new approach of using 'O' works fine with these cases. I've added some new tests to cover both of the above. There should be no user visible changes after this commit.
2021-11-30[gdb/testsuite] Fix gdb.base/style.exp with stub-termcapTom de Vries1-3/+8
When running test-case gdb.base/style.exp with a gdb build using stub-termcap.c, we run into: ... (gdb) PASS: gdb.base/style.exp: all styles enabled: frame when width=20 ^M<et width 30^M (gdb) FAIL: gdb.base/style.exp: all styles enabled: set width 30 ... The problem is that we're trying to issue the command "set width 30" while width is set to 20, which causes horizontal scrolling. Fix this by resetting the width to 0 before issuing the "set width 30" command. Tested on x86_64-linux. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=24582
2021-11-30Use dwarf_vma type for offsets, ranges and section sizes in DWARF decoder.Nick Clifton2-36/+59
* dwarf.c (find_debug_info_for_offset): Use dwarf_vma type for offsets, sizes and ranges. (display_loc_list): Likewise. Also use print_dwarf_vma to print the offset. (display_loclists_list): Likewise. (display_loc_list_dwo): Likewise. (display_debug_str): Likewise. (display_debug_aranges): Likewise. (display_debug_ranges_list): Likewise. (display_debug_rnglists_list): Likewise. (display_debug_ranges): Likewise.
2021-11-30ld: pru: Add pru_irq_map output sectionNick Clifton5-0/+60
* scripttempl/pru.sc (.pru_irq_map): Define output section. * testsuite/ld-pru/pru_irq_map-1.d: New test. * testsuite/ld-pru/pru_irq_map-2.d: New test. * testsuite/ld-pru/pru_irq_map.s: New test.
2021-11-30gdb/testsuite: check the python module is available before using itAndrew Burgess2-0/+31
The gdb.python/py-inferior-leak.exp test makes use of the tracemalloc module. When running the Python tests with a GDB built against Python 2 I ran into a test failure due to the tracemalloc module not being available. This commit adds a new helper function to lib/gdb-python.exp that checks if a named module is available. Using this we can then skip the py-inferior-leak.exp test when the tracemalloc module is not available.
2021-11-30gdb: fix disassembler regressions for 32-bit armAndrew Burgess1-8/+22
After this commit: commit 76b43c9b5c2b275cbf4f927bfc25984410cb5dd5 Date: Tue Oct 5 15:10:12 2021 +0100 gdb: improve error reporting from the disassembler We started seeing FAILs in the gdb.base/all-architectures*.exp tests, when running on a 32-bit ARM target, though I suspect running on any target that compiles such that bfd_vma is 32-bits would also trigger the failures. The problem is that the test is expected GDB's disassembler to print an error like this: Cannot access memory at address 0x0 However, after the above commit we see an error like: unknown disassembler error (error = -1) The reason for this is this code in opcodes/i386-dis.c (in the print_insn function): if (address_mode == mode_64bit && sizeof (bfd_vma) < 8) { (*info->fprintf_func) (info->stream, _("64-bit address is disabled")); return -1; } This code effectively disallows us from ever disassembling 64-bit x86 code if we compiled GDB with a 32-bit bfd_vma. Notice we return -1 (indicating a failure to disassemble), but never call the memory_error_func callback. Prior to the above commit GDB, when it received the -1 return value would assume that a memory error had occurred and just print whatever value happened to be in the memory error address variable, the default value of 0 just happened to be fine because the test had asked GDB to do this 'disassemble 0x0,+4'. If we instead change the test to do 'disassemble 0x100,+4' then GDB would (previously) have still reported: Cannot access memory at address 0x0 which makes far less sense. In this commit I propose to fix this issue by changing the test to accept either the "Cannot access memory ..." string, or the newer "unknown disassembler error ..." string. With this change done the test now passes. However, there is one weakness with this strategy; if GDB broke such that we _always_ reported "unknown disassembler error ..." we would never notice. This clearly would be bad. To avoid this issue I have adjusted the all-architectures*.exp tests so that, when we disassemble for the default architecture (the one selected by "auto") we _only_ expect to get the "Cannot access memory ..." error string. [ Note: In an ideal world we should be able to disassemble any architecture at all times. There's no reason why the 64-bit x86 disassembler requires a 64-bit bfd_vma, other than the code happens to be written that way. We could rewrite the disassemble to not have this requirement, but, I don't plan to do that any time soon. ] Further, I have changed the all-architectures*.exp test so that we now disassemble at address 0x100, this should avoid us being able to pass by printing a default address of 0x0. I did originally change the address we disassembled at to 0x4, however, some architectures, e.g. ia64, have a default instruction alignment that is greater than 4, so would still round down to 0x0. I could have just picked 0x8 as an address, but I figured that 0x100 was likely to satisfy most architectures alignment requirements.
2021-11-30gdb/python: add gdb.RemoteTargetConnection.send_packetAndrew Burgess10-11/+615
This commits adds a new sub-class of gdb.TargetConnection, gdb.RemoteTargetConnection. This sub-class is created for all 'remote' and 'extended-remote' targets. This new sub-class has one additional method over its base class, 'send_packet'. This new method is equivalent to the 'maint packet' CLI command, it allows a custom packet to be sent to a remote target. The outgoing packet can either be a bytes object, or a Unicode string, so long as the Unicode string contains only ASCII characters. The result of calling RemoteTargetConnection.send_packet is a bytes object containing the reply that came from the remote.
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