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2020-11-19gas, arm: PR26858 Fix availability of single precision vmul/vmla in arm modebinutils-2_33-branchAndre Vieira3-2/+16
This patch fixes a mistake when enabling MVE instructions that disabled support for single precision vmla and vmul for arm mode. gas/ChangeLog: 2020-11-19 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline. 2020-11-12 Andre Vieira <andre.simoesdiasvieira@arm.com> PR 26858 * config/tc-arm.c (asm_opcode insns): Fix vmul and vmla's ARM_VARIANT. * testsuite/gas/arm/pr26858.s: New test. * testsuite/gas/arm/pr26858.d: New test.
2020-05-18Re: Fix tight loop on recursively-defined symbolsAlan Modra2-0/+6
sy_resolving ought to not be set for a struct local_symbol, but it is apparent from local_symbol_make that the field is not initialised. * symbols.c (resolve_symbol_value): Invoke LOCAL_SYMBOL_CHECK before looking at add_symbol->sy_flags.sy_resolving. (cherry picked from commit d402189f2faa0aaa9fb8ad4669fdf0059946cd8a)
2020-05-15Fix tight loop on recursively-defined symbolsAlan Modra6-3/+48
This patch fixes a bug in GAS where the assembler enters a tight loop when attempting to resolve recursively-defined symbols, e.g. when trying to assemble "a=a". This is a regression introduced between binutils 2.32 and 2.33, by commit 1903f1385bff9 * symbols.c (struct local_symbol): Update comment. (resolve_symbol_value): For resolved symbols equated to other symbols, verify that the referenced symbol is not a local_symbol before accessing sy_value. Don't leave symbol loops during finalize_syms resolution. * testsuite/gas/all/assign-bad-recursive.d: New test. * testsuite/gas/all/assign-bad-recursive.l: Error output for test. * testsuite/gas/all/assign-bad-recursive.s: Assembly for test. * testsuite/gas/all/gas.exp: Run it. (cherry picked from commit 2a50b401465f74d7f3ee1654915b9070b4dc0fee)
2020-03-16gas, arm: Fix bad backportAndre Vieira1-1/+0
This patch fixes the backport for PR25660 as it contained bad context.
2020-03-13gas, arm: PR25660L Fix vadd/vsub with lt and le condition codes for MVEAndre Vieira8-3/+123
As explained in the PR, the addition of MVE makes the parser strip 't' and 'e' as suffixes when MVE is enabled. This leads to vadd and vsub in it blocks with lt and le conditions to be initially parsed as vaddl and vsubl. This means the operand parsing for these must allow for the same operands as the scalar vadd and vsub. I had forgotten to do this and this patch remedies that oversight. gas/ChangeLog: 2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline. 2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com> PR 25660 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ. (parse_operands): Handle new operand codes. (do_neon_dyadic_long): Make shape check accept the scalar variants. (asm_opcode_insns): Fix operand codes for vaddl and vsubl. * testsuite/gas/arm/mve-vaddsub-it.s: New test. * testsuite/gas/arm/mve-vaddsub-it.d: New test. * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test. * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test. * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test. * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
2020-03-11powerpc64-ld infinite loopAlan Modra2-1/+5
If this code dealing with possible conversion of inline plt sequences is ever executed, ld will hang. A binary with such sequences and of code size larger than approximately 90% the reach of an unconditional branch is the trigger. Oops. * elf64-ppc.c (ppc64_elf_inline_plt): Do increment rel in for loop. (cherry picked from commit 435edf0bf231240ccecb474b74ebb49dc8db2633)
2020-01-31arm: PR gas/25472 Enable DSP instructions with +mveAndre Vieira3-6/+159
We noticed +mve was not enabling DSP instructions as it should, reported in PR 25472. The MVE architecture extension for Armv8.1-M Mainline implies DSP extensions. This patch reflects that in the '+mve' command line option. gas/ChangeLog: 2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline. 2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com> PR gas/25472 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding. (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for +mve. * testsuite/gas/arm/mve_dsp.d: New test.
2020-01-27AArch64: Fix cfinv disassembly issuesTamar Christina8-1278/+1309
This fixes the preferred disassembly for cfinv. The Armv8.4-a instruction overlaps with the possible encoding space for msr. This because msr allows you to use unallocated encoding space using the general sA_B_cC_cD_E form. However when an encoding does become allocated then we need to ensure that it's used as the preferred disassembly. The problem with cfinv is that its mask has all bits sets because it has no arguments. This causes issues for the Alias resolver in gas as it uses the mask to build alias graph. In this case it can't do it since it thinks almost everything would alias with cfinv. So instead we can only fix this by moving cfinv before msr. gas/ChangeLog: PR 25403 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv. * testsuite/gas/aarch64/armv8_4-a.s: Likewise. opcodes/ChangeLog: PR 25403 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv. * aarch64-asm-2.c: Regenerate * aarch64-dis-2.c: Likewise. * aarch64-opc-2.c: Likewise. (cherry picked from commit 7568c93bf95a518797dfb2987b04911164c14a36)
2020-01-20This is a series of backports for binutils 2.33 which addresses some of the ↵Mihail Ionescu21-286/+536
new context sensitive extension mechanism. This is done in order to get gcc MVE code to work with binutils 2.33. Mihail Ionescu(5) [backport][binutils][arm][1/5] Enable context sensitive .arch_extension [backport][binutils][arm][2/5] Make .fpu reset the FPU/Coprocessor feature bits [backport][binutils][arm][3/5] Change CRC from fpu feature to archititectural extension [backport][binutils][arm][4/5] Set context table for '.arch_extension' [backport][binutils][arm][5/5] PR25376 Change MVE into a CORE_HIGH feature
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2020-01-17ld-arm/tls-gdesc-neg testAlan Modra2-1/+8
Fixes a failure on armeb-linuxeabi. Backport from master. 2019-10-07 Alan Modra <amodra@gmail.com> * testsuite/ld-arm/tls-gdesc-neg.d: Relax target match.
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2020-01-16AArch64: Revert SEC_LINKER_CREATED for AArch64 stubs (PR/25210)Tamar Christina4-1/+68
The SEC_LINKER_CREATED flag was added as a fix for PR 24753. I believe that part of the fix in compress.c to still be correct as linker created sections don't have a size on disk and it fixes the Arm bootstrap regression. So I'm partially revert this change so that we don't have to manage the section manually as implied by SEC_LINKER_CREATED as it's causing an error when both errata workarounds are used together and it wasn't needed. This can also be seen from that the arm bootstrap was fixed and no flag was added to it's stubs. ld/ChangeLog: PR 25210 PR 24753 * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Remove SEC_LINKER_CREATED. * testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419. * testsuite/ld-aarch64/erratum835769-843419.d: New test. (cherry picked from commit 0db131fb835e4c4f6a024e86743467e7e01c965e) Signed-off-by: Tamar Christina <tamar.christina@arm.com>
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2020-01-15Reinstate gas em=freebsd for sparc-freebsdAlan Modra2-0/+5
In commit c9098af41e3 I over-simplified the sparc target decoding, missing the fact that prior to that patch sparc-*-freebsd fell through to the generic *-*-freebsd match. * configure.tgt: Add sparc-*-freebsd case. (cherry picked from commit c24d0e8d4850d4913a1630a53e272c930849406d)
2020-01-15PR25384, PowerPC64 ELFv1 copy relocs against function symbolsAlan Modra7-27/+58
Function symbols of course don't normally want .dynbss copies but with some old versions of gcc they are needed to copy the function descriptor. This patch restricts the cases where they are useful to compilers using dot-symbols, and enables the warning regardless of whether a PLT entry is emitted in the executable. PLTs in shared libraries are affected by a .dynbss copy in the executable. bfd/ PR 25384 * elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment. (ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies of function symbols unless dot symbols are present. Do warn whenever one is created, regardles of whether a PLT entry is also emitted for the function symbol. ld/ * testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output. * testsuite/ld-powerpc/funref.s: Align func_tab. * testsuite/ld-powerpc/funref2.s: Likewise. * testsuite/ld-powerpc/funv1.s: Add dot symbols. (cherry picked from commit e1c6cf618cbeebbafd34afc5ee921fcbf7061bfa)
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2020-01-13[PR ld/22269] arm: Avoid dynamic relocs for undefweak symbols in static PIESzabolcs Nagy2-4/+12
With static PIE linking undefined weak symbols are resolved to 0, so no dynamic relocation is needed for them. The UNDEFWEAK_NO_DYNAMIC_RELOC macro was introduced so this case can be handled easily, but it was not applied consistently in the first attempt to fix ld/22269 for arm: commit 95b03e4ad68e7a90f5096b47df595636344b783a arm: Check UNDEFWEAK_NO_DYNAMIC_RELOC This patch fixes spurious relative relocs in static PIE binaries against GOT entries created for undefined weak symbols on arm*-*, this fixes FAIL: pr22269-1 (static pie undefined weak) bfd/ChangeLog: Backported from master 2020-01-10 Szabolcs Nagy <szabolcs.nagy@arm.com> PR ld/22269 * elf32-arm.c (elf32_arm_final_link_relocate): Use UNDEFWEAK_NO_DYNAMIC_RELOC. (allocate_dynrelocs_for_symbol): Likewise.
2020-01-13[ARM][gas] fix build breakage with gcc-10 by using correct enum typeSzabolcs Nagy2-1/+9
Fixes ../../gas/config/tc-arm.c: In function 'parse_reg_list': ../../gas/config/tc-arm.c:1946:35: error: implicit conversion from 'enum reg_list_els' to 'enum arm_reg_type' [-Werror=enum-conversion] 1946 | reg = arm_reg_parse (&str, REGLIST_RN); | ^~~~~~~~~~ gas/ChangeLog: Backported from mainline. 2020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of REGLIST_RN.
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