diff options
Diffstat (limited to 'sim/mn10300/mn10300_sim.h')
-rw-r--r-- | sim/mn10300/mn10300_sim.h | 105 |
1 files changed, 105 insertions, 0 deletions
diff --git a/sim/mn10300/mn10300_sim.h b/sim/mn10300/mn10300_sim.h index bfa88b6..4ea5d3e 100644 --- a/sim/mn10300/mn10300_sim.h +++ b/sim/mn10300/mn10300_sim.h @@ -6,6 +6,7 @@ #include <limits.h> #include "gdb/remote-sim.h" #include "bfd.h" +#include "sim-fpu.h" #ifndef INLINE #ifdef __GNUC__ @@ -53,6 +54,10 @@ typedef signed long int32; # endif #endif +typedef struct +{ + uint32 low, high; +} dword; typedef uint32 reg_t; struct simops @@ -73,6 +78,11 @@ struct _state reg_t regs[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw, lir, lar, mdrq, plus some room for processor specific regs. */ + union + { + reg_t fs[32]; /* FS0-31 */ + dword fd[16]; /* FD0,2,...,30 */ + } fpregs; uint8 *mem; /* main memory */ int exception; int exited; @@ -123,6 +133,52 @@ extern struct simops Simops[]; #define REG_MCRL 27 #define REG_MCVF 28 +#define REG_FPCR 29 + +#define FPCR (State.regs[REG_FPCR]) + +#define FCC_MASK LSMASK (21, 18) +#define RM_MASK LSMASK (17, 16) /* Must always be zero. */ +#define EC_MASK LSMASK (14, 10) +#define EE_MASK LSMASK ( 9, 5) +#define EF_MASK LSMASK ( 4, 0) +#define FPCR_MASK (FCC_MASK | EC_MASK | EE_MASK | EF_MASK) + +#define FCC_L LSBIT (21) +#define FCC_G LSBIT (20) +#define FCC_E LSBIT (19) +#define FCC_U LSBIT (18) + +#define EC_V LSBIT (14) +#define EC_Z LSBIT (13) +#define EC_O LSBIT (12) +#define EC_U LSBIT (11) +#define EC_I LSBIT (10) + +#define EE_V LSBIT (9) +#define EE_Z LSBIT (8) +#define EE_O LSBIT (7) +#define EE_U LSBIT (6) +#define EE_I LSBIT (5) + +#define EF_V LSBIT (4) +#define EF_Z LSBIT (3) +#define EF_O LSBIT (2) +#define EF_U LSBIT (1) +#define EF_I LSBIT (0) + +#define PSW_FE LSBIT(20) +#define FPU_DISABLED !(PSW & PSW_FE) + +#define XS2FS(X,S) State.fpregs.fs[((X<<4)|(S))] +#define AS2FS(A,S) State.fpregs.fs[((A<<2)|(S))] +#define Xf2FD(X,f) State.fpregs.fd[((X<<3)|(f))] + +#define FS2FPU(FS,F) sim_fpu_32to (&(F), (FS)) +#define FD2FPU(FD,F) sim_fpu_232to (&(F), ((FD).high), ((FD).low)) +#define FPU2FS(F,FS) sim_fpu_to32 (&(FS), &(F)) +#define FPU2FD(F,FD) sim_fpu_to232 (&((FD).high), &((FD).low), &(F)) + #ifdef _WIN32 #define SIGTRAP 5 #define SIGQUIT 3 @@ -145,6 +201,20 @@ sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) #define load_word(ADDR) \ sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR)) +#define load_dword(ADDR) \ +u642dw (sim_core_read_unaligned_8 (STATE_CPU (simulator, 0), \ + PC, read_map, (ADDR))) + +static INLINE dword +u642dw (unsigned64 dw) +{ + dword r; + + r.low = (unsigned32)dw; + r.high = (unsigned32)(dw >> 32); + return r; +} + #define store_byte(ADDR, DATA) \ sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \ PC, write_map, (ADDR), (DATA)) @@ -158,6 +228,15 @@ sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \ #define store_word(ADDR, DATA) \ sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \ PC, write_map, (ADDR), (DATA)) +#define store_dword(ADDR, DATA) \ +sim_core_write_unaligned_8 (STATE_CPU (simulator, 0), \ + PC, write_map, (ADDR), dw2u64 (DATA)) + +static INLINE unsigned64 +dw2u64 (dword data) +{ + return data.low | (((unsigned64)data.high) << 32); +} /* Function declarations. */ @@ -192,3 +271,29 @@ void program_interrupt (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, SIM_SIGNAL sig); void mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word pc); void mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception); void mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception); + +void fpu_disabled_exception (SIM_DESC, sim_cpu *, address_word); +void fpu_unimp_exception (SIM_DESC, sim_cpu *, address_word); +void fpu_check_signal_exception (SIM_DESC, sim_cpu *, address_word); + +extern const struct fp_prec_t +{ + void (* reg2val) (const void *, sim_fpu *); + int (* round) (sim_fpu *); + void (* val2reg) (const sim_fpu *, void *); +} fp_single_prec, fp_double_prec; + +#define FP_SINGLE (&fp_single_prec) +#define FP_DOUBLE (&fp_double_prec) + +void fpu_rsqrt (SIM_DESC, sim_cpu *, address_word, const void *, void *, const struct fp_prec_t *); +void fpu_sqrt (SIM_DESC, sim_cpu *, address_word, const void *, void *, const struct fp_prec_t *); +void fpu_cmp (SIM_DESC, sim_cpu *, address_word, const void *, const void *, const struct fp_prec_t *); +void fpu_add (SIM_DESC, sim_cpu *, address_word, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_sub (SIM_DESC, sim_cpu *, address_word, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_mul (SIM_DESC, sim_cpu *, address_word, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_div (SIM_DESC, sim_cpu *, address_word, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_fmadd (SIM_DESC, sim_cpu *, address_word, const void *, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_fmsub (SIM_DESC, sim_cpu *, address_word, const void *, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_fnmadd (SIM_DESC, sim_cpu *, address_word, const void *, const void *, const void *, void *, const struct fp_prec_t *); +void fpu_fnmsub (SIM_DESC, sim_cpu *, address_word, const void *, const void *, const void *, void *, const struct fp_prec_t *); |