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-rw-r--r--sim/mips/m16.igen10
1 files changed, 5 insertions, 5 deletions
diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen
index 74adacd..3641e36 100644
--- a/sim/mips/m16.igen
+++ b/sim/mips/m16.igen
@@ -860,7 +860,7 @@
{
do_dsll (SD_, TRY, TRX, SHIFT);
}
-
+
11110,5.SHAMT_4_0,1.S5,00000 + 00110,3.RX,3.RY,000,01:EXT-SHIFT:16::DSLL
"dsll r<TRY>, r<TRX>, <SHAMT>"
*mips16:
@@ -868,9 +868,9 @@
{
do_dsll (SD_, TRY, TRX, SHAMT);
}
-
-
-
+
+
+
11101,3.SHAMT,3.RY,01000:SHIFT64:16::DSRL
"dsrl r<TRY>, <SHIFT>"
*mips16:
@@ -1043,7 +1043,7 @@
STATE &= ~simDELAYSLOT;
return target;
}
-
+
// compute basepc dependant on us being in a delay slot
:function:::address_word:basepc:
{