aboutsummaryrefslogtreecommitdiff
path: root/ld/testsuite/ld-or1k
diff options
context:
space:
mode:
Diffstat (limited to 'ld/testsuite/ld-or1k')
-rw-r--r--ld/testsuite/ld-or1k/offsets1.d212
-rw-r--r--ld/testsuite/ld-or1k/offsets1.s14
-rw-r--r--ld/testsuite/ld-or1k/or1k.exp69
3 files changed, 295 insertions, 0 deletions
diff --git a/ld/testsuite/ld-or1k/offsets1.d b/ld/testsuite/ld-or1k/offsets1.d
new file mode 100644
index 0000000..aff09d4
--- /dev/null
+++ b/ld/testsuite/ld-or1k/offsets1.d
@@ -0,0 +1,212 @@
+#source: store1.s
+#as:
+#ld:
+#objdump: -drj.text
+#target: or1k*-*-*
+
+.*: +file format elf32-or1k
+
+
+Disassembly of section \.text:
+
+.* <_start>:
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 03 00 00 l.sw 0\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 03 03 e8 l.sw 1000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 03 07 d0 l.sw 2000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 23 03 b8 l.sw 3000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 23 07 a0 l.sw 4000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 43 03 88 l.sw 5000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 43 07 70 l.sw 6000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 63 03 58 l.sw 7000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 63 07 40 l.sw 8000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 83 03 28 l.sw 9000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 83 07 10 l.sw 10000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 a3 02 f8 l.sw 11000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 a3 06 e0 l.sw 12000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 c3 02 c8 l.sw 13000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 c3 06 b0 l.sw 14000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 e3 02 98 l.sw 15000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d4 e3 06 80 l.sw 16000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 03 02 68 l.sw 17000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 03 06 50 l.sw 18000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 23 02 38 l.sw 19000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 23 06 20 l.sw 20000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 43 02 08 l.sw 21000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 43 05 f0 l.sw 22000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 63 01 d8 l.sw 23000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 63 05 c0 l.sw 24000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 83 01 a8 l.sw 25000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 83 05 90 l.sw 26000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 a3 01 78 l.sw 27000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 a3 05 60 l.sw 28000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 c3 01 48 l.sw 29000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 c3 05 30 l.sw 30000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 e3 01 18 l.sw 31000\(r3\),r0
+.*: 18 60 00 01 l.movhi r3,0x1
+.*: d5 e3 05 00 l.sw 32000\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 03 00 e8 l.sw -32536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 03 04 d0 l.sw -31536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 23 00 b8 l.sw -30536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 23 04 a0 l.sw -29536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 43 00 88 l.sw -28536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 43 04 70 l.sw -27536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 63 00 58 l.sw -26536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 63 04 40 l.sw -25536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 83 00 28 l.sw -24536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 83 04 10 l.sw -23536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 83 07 f8 l.sw -22536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 a3 03 e0 l.sw -21536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 a3 07 c8 l.sw -20536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 c3 03 b0 l.sw -19536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 c3 07 98 l.sw -18536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 e3 03 80 l.sw -17536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d6 e3 07 68 l.sw -16536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 03 03 50 l.sw -15536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 03 07 38 l.sw -14536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 23 03 20 l.sw -13536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 23 07 08 l.sw -12536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 43 02 f0 l.sw -11536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 43 06 d8 l.sw -10536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 63 02 c0 l.sw -9536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 63 06 a8 l.sw -8536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 83 02 90 l.sw -7536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 83 06 78 l.sw -6536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 a3 02 60 l.sw -5536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 a3 06 48 l.sw -4536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 c3 02 30 l.sw -3536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 c3 06 18 l.sw -2536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 e3 02 00 l.sw -1536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d7 e3 05 e8 l.sw -536\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 03 01 d0 l.sw 464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 03 05 b8 l.sw 1464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 23 01 a0 l.sw 2464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 23 05 88 l.sw 3464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 43 01 70 l.sw 4464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 43 05 58 l.sw 5464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 63 01 40 l.sw 6464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 63 05 28 l.sw 7464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 83 01 10 l.sw 8464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 83 04 f8 l.sw 9464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 a3 00 e0 l.sw 10464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 a3 04 c8 l.sw 11464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 c3 00 b0 l.sw 12464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 c3 04 98 l.sw 13464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 e3 00 80 l.sw 14464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d4 e3 04 68 l.sw 15464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 03 00 50 l.sw 16464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 03 04 38 l.sw 17464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 23 00 20 l.sw 18464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 23 04 08 l.sw 19464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 23 07 f0 l.sw 20464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 43 03 d8 l.sw 21464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 43 07 c0 l.sw 22464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 63 03 a8 l.sw 23464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 63 07 90 l.sw 24464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 83 03 78 l.sw 25464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 83 07 60 l.sw 26464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 a3 03 48 l.sw 27464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 a3 07 30 l.sw 28464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 c3 03 18 l.sw 29464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 c3 07 00 l.sw 30464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 e3 02 e8 l.sw 31464\(r3\),r0
+.*: 18 60 00 02 l.movhi r3,0x2
+.*: d5 e3 06 d0 l.sw 32464\(r3\),r0
+.*: 18 60 00 03 l.movhi r3,0x3
+.*: d6 03 02 b8 l.sw -32072\(r3\),r0
diff --git a/ld/testsuite/ld-or1k/offsets1.s b/ld/testsuite/ld-or1k/offsets1.s
new file mode 100644
index 0000000..94cb068
--- /dev/null
+++ b/ld/testsuite/ld-or1k/offsets1.s
@@ -0,0 +1,14 @@
+ .data
+ .p2align 16
+x: .skip 10000
+
+ .text
+ .globl _start
+_start:
+
+ .set i, 0
+.rept 100
+ l.movhi r3, ha(x+i)
+ l.sw lo(x+i)(r3), r0
+ .set i, i+1000
+.endr
diff --git a/ld/testsuite/ld-or1k/or1k.exp b/ld/testsuite/ld-or1k/or1k.exp
new file mode 100644
index 0000000..8f09a7c
--- /dev/null
+++ b/ld/testsuite/ld-or1k/or1k.exp
@@ -0,0 +1,69 @@
+# Expect script for ld-or1k tests
+# Copyright (C) 2015 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+#
+
+if { ![istarget "or1k*-*-*"] } {
+ return
+}
+
+# List contains test-items with 3 items followed by 2 lists:
+# 0:name 1:ld early options 2:ld late options 3:assembler options
+# 4:filenames of assembler files 5: action and options. 6: name of output file
+
+# Actions:
+# objdump: Apply objdump options on result. Compare with regex (last arg).
+# nm: Apply nm options on result. Compare with regex (last arg).
+# readelf: Apply readelf options on result. Compare with regex (last arg).
+
+set or1ktests {
+ {"offsets1" "" "" "" {offsets1.s}
+ {{objdump -drj.text offsets1.d}}
+ "offsets1"}
+}
+
+# Not implemented yet
+# {"TLS -fpic -shared" "-shared -melf64alpha" ""
+# "" {align.s tlspic1.s tlspic2.s}
+# {{readelf -WSsrl tlspic.rd} {objdump -drj.text tlspic.dd}
+# {objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}}
+# "libtlspic.so"}
+# {"Helper shared library" "-shared -melf64alpha" ""
+# "" {tlslib.s} {} "libtlslib.so"}
+# {"TLS -fpic and -fno-pic exec"
+# "-melf64alpha tmpdir/libtlslib.so" "" "" {align.s tlsbinpic.s tlsbin.s}
+# {{readelf -WSsrl tlsbin.rd} {objdump -drj.text tlsbin.dd}
+# {objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}}
+# "tlsbin"}
+# {"TLS -fpic and -fno-pic exec -relax"
+# "-relax -melf64alpha tmpdir/libtlslib.so" ""
+# "" {align.s tlsbinpic.s tlsbin.s}
+# {{readelf -WSsrl tlsbinr.rd} {objdump -drj.text tlsbinr.dd}
+# {objdump -sj.got tlsbinr.sd}}
+# "tlsbinr"}
+# {"empty got"
+# "-melf64alpha" "" ""
+# {emptygot.s}
+# {{nm "-n" emptygot.nm}}
+# "emptygot"}
+# {"TLS in debug sections" "-melf64alpha" ""
+# "" {tlsg.s}
+# {{objdump -sj.debug_foobar tlsg.sd}} "tlsg"}
+
+run_ld_link_tests $or1ktests