diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/riscv-opc.h | 38 | ||||
| -rw-r--r-- | include/opcode/riscv.h | 14 |
2 files changed, 52 insertions, 0 deletions
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 90f4415..53f5f20 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -2210,6 +2210,31 @@ #define MASK_VSM3C_VI 0xfe00707f #define MATCH_VSM3ME_VV 0x82002077 #define MASK_VSM3ME_VV 0xfe00707f +/* Zcb instructions. */ +#define MATCH_C_LBU 0x8000 +#define MASK_C_LBU 0xfc03 +#define MATCH_C_LHU 0x8400 +#define MASK_C_LHU 0xfc43 +#define MATCH_C_LH 0x8440 +#define MASK_C_LH 0xfc43 +#define MATCH_C_SB 0x8800 +#define MASK_C_SB 0xfc03 +#define MATCH_C_SH 0x8c00 +#define MASK_C_SH 0xfc43 +#define MATCH_C_ZEXT_B 0x9c61 +#define MASK_C_ZEXT_B 0xfc7f +#define MATCH_C_SEXT_B 0x9c65 +#define MASK_C_SEXT_B 0xfc7f +#define MATCH_C_ZEXT_H 0x9c69 +#define MASK_C_ZEXT_H 0xfc7f +#define MATCH_C_SEXT_H 0x9c6d +#define MASK_C_SEXT_H 0xfc7f +#define MATCH_C_ZEXT_W 0x9c71 +#define MASK_C_ZEXT_W 0xfc7f +#define MATCH_C_NOT 0x9c75 +#define MASK_C_NOT 0xfc7f +#define MATCH_C_MUL 0x9c41 +#define MASK_C_MUL 0xfc63 /* Svinval instruction. */ #define MATCH_SINVAL_VMA 0x16000073 #define MASK_SINVAL_VMA 0xfe007fff @@ -3367,6 +3392,19 @@ DECLARE_INSN(vsm4r_vv, MATCH_VSM4R_VV, MASK_VSM4R_VV) /* Zvksh instructions. */ DECLARE_INSN(vsm3c_vi, MATCH_VSM3C_VI, MASK_VSM3C_VI) DECLARE_INSN(vsm3me_vv, MATCH_VSM3ME_VV, MASK_VSM3ME_VV) +/* Zcb instructions. */ +DECLARE_INSN(c_sext_b, MATCH_C_SEXT_B, MASK_C_SEXT_B) +DECLARE_INSN(c_sext_h, MATCH_C_SEXT_H, MASK_C_SEXT_H) +DECLARE_INSN(c_zext_b, MATCH_C_ZEXT_B, MASK_C_ZEXT_B) +DECLARE_INSN(c_zext_h, MATCH_C_ZEXT_H, MASK_C_ZEXT_H) +DECLARE_INSN(c_zext_w, MATCH_C_ZEXT_W, MASK_C_ZEXT_W) +DECLARE_INSN(c_mul, MATCH_C_MUL, MASK_C_MUL) +DECLARE_INSN(c_not, MATCH_C_NOT, MASK_C_NOT) +DECLARE_INSN(c_lbu, MATCH_C_LBU, MASK_C_LBU) +DECLARE_INSN(c_lhu, MATCH_C_LHU, MASK_C_LHU) +DECLARE_INSN(c_lh, MATCH_C_LH, MASK_C_LH) +DECLARE_INSN(c_sb, MATCH_C_SB, MASK_C_SB) +DECLARE_INSN(c_sh, MATCH_C_SH, MASK_C_SH) /* Vendor-specific (T-Head) XTheadBa instructions. */ DECLARE_INSN(th_addsl, MATCH_TH_ADDSL, MASK_TH_ADDSL) /* Vendor-specific (T-Head) XTheadBb instructions. */ diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index 739d6da..808f365 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -108,6 +108,10 @@ static inline unsigned int riscv_insn_length (insn_t insn) (RV_X(x, 20, 10)) #define EXTRACT_RVV_VC_IMM(x) \ (RV_X(x, 20, 11)) +#define EXTRACT_ZCB_BYTE_UIMM(x) \ + (RV_X(x, 6, 1) | (RV_X(x, 5, 1) << 1)) +#define EXTRACT_ZCB_HALFWORD_UIMM(x) \ + (RV_X(x, 5, 1) << 1) #define ENCODE_ITYPE_IMM(x) \ (RV_X(x, 0, 12) << 20) @@ -155,6 +159,10 @@ static inline unsigned int riscv_insn_length (insn_t insn) (RV_X(x, 0, 11) << 20) #define ENCODE_RVV_VI_UIMM6(x) \ (RV_X(x, 0, 5) << 15 | RV_X(x, 5, 1) << 26) +#define ENCODE_ZCB_BYTE_UIMM(x) \ + ((RV_X(x, 0, 1) << 6) | (RV_X(x, 1, 1) << 5)) +#define ENCODE_ZCB_HALFWORD_UIMM(x) \ + (RV_X(x, 1, 1) << 5) #define VALID_ITYPE_IMM(x) (EXTRACT_ITYPE_IMM(ENCODE_ITYPE_IMM(x)) == (x)) #define VALID_STYPE_IMM(x) (EXTRACT_STYPE_IMM(ENCODE_STYPE_IMM(x)) == (x)) @@ -180,6 +188,8 @@ static inline unsigned int riscv_insn_length (insn_t insn) #define VALID_CJTYPE_IMM(x) (EXTRACT_CJTYPE_IMM(ENCODE_CJTYPE_IMM(x)) == (x)) #define VALID_RVV_VB_IMM(x) (EXTRACT_RVV_VB_IMM(ENCODE_RVV_VB_IMM(x)) == (x)) #define VALID_RVV_VC_IMM(x) (EXTRACT_RVV_VC_IMM(ENCODE_RVV_VC_IMM(x)) == (x)) +#define VALID_ZCB_BYTE_UIMM(x) (EXTRACT_ZCB_BYTE_UIMM(ENCODE_ZCB_BYTE_UIMM(x)) == (x)) +#define VALID_ZCB_HALFWORD_UIMM(x) (EXTRACT_ZCB_HALFWORD_UIMM(ENCODE_ZCB_HALFWORD_UIMM(x)) == (x)) #define RISCV_RTYPE(insn, rd, rs1, rs2) \ ((MATCH_ ## insn) | ((rd) << OP_SH_RD) | ((rs1) << OP_SH_RS1) | ((rs2) << OP_SH_RS2)) @@ -421,6 +431,10 @@ enum riscv_insn_class INSN_CLASS_ZVKNHA_OR_ZVKNHB, INSN_CLASS_ZVKSED, INSN_CLASS_ZVKSH, + INSN_CLASS_ZCB, + INSN_CLASS_ZCB_AND_ZBA, + INSN_CLASS_ZCB_AND_ZBB, + INSN_CLASS_ZCB_AND_ZMMUL, INSN_CLASS_SVINVAL, INSN_CLASS_ZICBOM, INSN_CLASS_ZICBOP, |