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-rw-r--r--gdb/mips-tdep.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 006bc92..c00efbd 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -558,7 +558,7 @@ mips_xfer_register (struct gdbarch *gdbarch, struct regcache *regcache,
}
/* Determine if a MIPS3 or later cpu is operating in MIPS{1,2} FPU
- compatiblity mode. A return value of 1 means that we have
+ compatibility mode. A return value of 1 means that we have
physical 64-bit registers, but should treat them as 32-bit registers. */
static int
@@ -574,7 +574,7 @@ mips2_fp_compat (const frame_info_ptr &frame)
/* FIXME drow 2002-03-10: This is disabled until we can do it consistently,
in all the places we deal with FP registers. PR gdb/413. */
/* Otherwise check the FR bit in the status register - it controls
- the FP compatiblity mode. If it is clear we are in compatibility
+ the FP compatibility mode. If it is clear we are in compatibility
mode. */
if ((get_frame_register_unsigned (frame, MIPS_PS_REGNUM) & ST0_FR) == 0)
return 1;
@@ -592,7 +592,7 @@ static CORE_ADDR heuristic_proc_start (struct gdbarch *, CORE_ADDR);
static struct cmd_list_element *setmipscmdlist = NULL;
static struct cmd_list_element *showmipscmdlist = NULL;
-/* Integer registers 0 thru 31 are handled explicitly by
+/* Integer registers 0 through 31 are handled explicitly by
mips_register_name(). Processor specific registers 32 and above
are listed in the following tables. */
@@ -920,7 +920,7 @@ mips_convert_register_float_case_p (struct gdbarch *gdbarch, int regnum,
}
/* This predicate tests for the case of a value of less than 8
- bytes in width that is being transfered to or from an 8 byte
+ bytes in width that is being transferred to or from an 8 byte
general purpose register. */
static int
mips_convert_register_gpreg_case_p (struct gdbarch *gdbarch, int regnum,
@@ -1076,7 +1076,7 @@ mips_register_type (struct gdbarch *gdbarch, int regnum)
return builtin_type (gdbarch)->builtin_int32;
else if (tdep->mips64_transfers_32bit_regs_p)
/* The target, while possibly using a 64-bit register buffer,
- is only transfering 32-bits of each integer register.
+ is only transferring 32-bits of each integer register.
Reflect this in the cooked/pseudo (ABI) register value. */
return builtin_type (gdbarch)->builtin_int32;
else if (mips_abi_regsize (gdbarch) == 4)
@@ -2877,7 +2877,7 @@ mips_insn16_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (gdbarch, pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -3312,7 +3312,7 @@ mips_micro_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (get_frame_arch (this_frame), pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -3693,7 +3693,7 @@ mips_insn32_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
find_pc_partial_function (pc, NULL, &start_addr, NULL);
if (start_addr == 0)
start_addr = heuristic_proc_start (gdbarch, pc);
- /* We can't analyze the prologue if we couldn't find the begining
+ /* We can't analyze the prologue if we couldn't find the beginning
of the function. */
if (start_addr == 0)
return cache;
@@ -4581,7 +4581,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -4754,7 +4754,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. Floating point
+ structs may go through BOTH paths. Floating point
arguments will not. */
/* Write this portion of the argument to a general
purpose register. */
@@ -4975,7 +4975,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -5106,7 +5106,7 @@ mips_n32n64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= mips_last_arg_regnum (gdbarch))
@@ -5455,7 +5455,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -5618,7 +5618,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= mips_last_arg_regnum (gdbarch))
@@ -5976,7 +5976,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Now load as many as possible of the first arguments into
- registers, and push the rest onto the stack. Loop thru args
+ registers, and push the rest onto the stack. Loop through args
from first to last. */
for (argnum = 0; argnum < nargs; argnum++)
{
@@ -6080,7 +6080,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
}
/* Note!!! This is NOT an else clause. Odd sized
- structs may go thru BOTH paths. */
+ structs may go through BOTH paths. */
/* Write this portion of the argument to a general
purpose register. */
if (argreg <= mips_last_arg_regnum (gdbarch))