diff options
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/rme-invalid.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/rme-invalid.l | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/rme-invalid.s | 4 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/rme.d | 14 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/rme.s | 10 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 4 |
8 files changed, 49 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8df1225..72b8c69 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2021-04-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> + + * testsuite/gas/aarch64/rme-invalid.d: New test. + * testsuite/gas/aarch64/rme-invalid.l: New test. + * testsuite/gas/aarch64/rme-invalid.s: New test. + * testsuite/gas/aarch64/rme.d: New test. + * testsuite/gas/aarch64/rme.s: New test. + 2021-04-16 Nelson Chu <nelson.chu@sifive.com> PR 27436 diff --git a/gas/testsuite/gas/aarch64/rme-invalid.d b/gas/testsuite/gas/aarch64/rme-invalid.d new file mode 100644 index 0000000..091f40c --- /dev/null +++ b/gas/testsuite/gas/aarch64/rme-invalid.d @@ -0,0 +1,3 @@ +#name: Invalid RME System registers usage +#source: rme-invalid.s +#warning_output: rme-invalid.l diff --git a/gas/testsuite/gas/aarch64/rme-invalid.l b/gas/testsuite/gas/aarch64/rme-invalid.l new file mode 100644 index 0000000..7a9e3b2 --- /dev/null +++ b/gas/testsuite/gas/aarch64/rme-invalid.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*: Warning: specified register cannot be written to at operand 1 -- `msr mfar_el3,x0' diff --git a/gas/testsuite/gas/aarch64/rme-invalid.s b/gas/testsuite/gas/aarch64/rme-invalid.s new file mode 100644 index 0000000..d19ac9ca --- /dev/null +++ b/gas/testsuite/gas/aarch64/rme-invalid.s @@ -0,0 +1,4 @@ +/* Realm Management Extension. */ + +/* Illegal write to RME system registers. */ +msr mfar_el3, x0 diff --git a/gas/testsuite/gas/aarch64/rme.d b/gas/testsuite/gas/aarch64/rme.d new file mode 100644 index 0000000..3667e87 --- /dev/null +++ b/gas/testsuite/gas/aarch64/rme.d @@ -0,0 +1,14 @@ +#name: RME System registers +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + + 0: d53e60a0 mrs x0, mfar_el3 + 4: d53e21c0 mrs x0, gpccr_el3 + 8: d53e2180 mrs x0, gptbr_el3 + c: d51e21c0 msr gpccr_el3, x0 + 10: d51e2180 msr gptbr_el3, x0 diff --git a/gas/testsuite/gas/aarch64/rme.s b/gas/testsuite/gas/aarch64/rme.s new file mode 100644 index 0000000..89ee3a8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/rme.s @@ -0,0 +1,10 @@ +/* Realm Management Extension. */ + +/* Read from RME system registers. */ +mrs x0, mfar_el3 +mrs x0, gpccr_el3 +mrs x0, gptbr_el3 + +/* Write to RME system registers. */ +msr gpccr_el3, x0 +msr gptbr_el3, x0 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index dffc25c..452a96b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2021-04-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> + + * aarch64-opc.c: Add RME system registers. + 2021-04-16 Lifang Xia <lifang_xia@c-sky.com> * riscv-opc.c (riscv_opcodes): New insn alias for addi. Compress diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 79b37bf..8727def 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4682,6 +4682,10 @@ const aarch64_sys_reg aarch64_sys_regs [] = SR_CORE ("accdata_el1", CPENC (3,0,C13,C0,5), 0), + SR_CORE ("mfar_el3", CPENC (3,6,C6,C0,5), F_REG_READ), + SR_CORE ("gpccr_el3", CPENC (3,6,C2,C1,6), 0), + SR_CORE ("gptbr_el3", CPENC (3,6,C2,C1,4), 0), + { 0, CPENC (0,0,0,0,0), 0, 0 } }; |