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| author | Ian Lance Taylor <ian@airs.com> | 1996-12-16 20:01:15 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1996-12-16 20:01:15 +0000 |
| commit | aaff84371eac84395861cac662a5d16eebcb07b9 (patch) | |
| tree | 59c6708db779470eab0c2e1da6848bb9b36bef03 /sim/mips/gencode.c | |
| parent | e85f2fbd1522788287510c836cc8e95293cf5188 (diff) | |
| download | binutils-aaff84371eac84395861cac662a5d16eebcb07b9.zip binutils-aaff84371eac84395861cac662a5d16eebcb07b9.tar.gz binutils-aaff84371eac84395861cac662a5d16eebcb07b9.tar.bz2 | |
* gencode.c (build_mips16_operands): Fix base PC value for PC
relative operands.
(build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
jal instruction.
* interp.c (simJALDELAYSLOT): Define.
(JALDELAYSLOT): Define.
(INDELAYSLOT, INJALDELAYSLOT): Define.
(simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
Diffstat (limited to 'sim/mips/gencode.c')
| -rw-r--r-- | sim/mips/gencode.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c index 4df7c58..c8adaa2 100644 --- a/sim/mips/gencode.c +++ b/sim/mips/gencode.c @@ -954,10 +954,10 @@ build_mips16_operands (bitmap) { int j; - printf ("PC & ~ (uword64) 1"); + printf ("((INDELAYSLOT () ? (INJALDELAYSLOT () ? IPC - 4 : IPC - 2) : IPC) & ~ (uword64) 1)"); for (j = 0; j < opindex; j++) if (ops[j]->shift != 0) - printf (" & 0x%x", ~ ((1 << op->shift) - 1)); + printf (" & ~ (uword64) 0x%x", (1 << ops[j]->shift) - 1); } else if ((op->flags & MIPS16_ZERO) != 0) printf ("0"); @@ -1867,7 +1867,10 @@ build_instruction (doisa, features, mips16, insn) printf(" op1 = WORD64LO(op1);\n"); printf(" /* NOTE: The jump occurs AFTER the next instruction has been executed */\n"); printf(" DSPC = op1;\n"); - printf(" DELAYSLOT();\n"); + if (insn->flags & LINK) + printf(" JALDELAYSLOT();\n"); + else + printf(" DELAYSLOT();\n"); break ; case BRANCH: /* execute delay slot instruction before branch unless (LIKELY && branch_not_taken) */ |