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| author | Jan Vrany <jan.vrany@labware.com> | 2021-12-08 10:46:49 +0000 |
|---|---|---|
| committer | Jan Vrany <jan.vrany@labware.com> | 2021-12-08 10:46:49 +0000 |
| commit | 44f3c3c212f9b568a6b3cff0444b6750e3d8680f (patch) | |
| tree | 6f795ccfca317b5e990a5298bffc9c449daceed8 /sim/m32c | |
| parent | a619b58721f0a03fd91c27670d3e4c2fb0d88f1e (diff) | |
| download | binutils-44f3c3c212f9b568a6b3cff0444b6750e3d8680f.zip binutils-44f3c3c212f9b568a6b3cff0444b6750e3d8680f.tar.gz binutils-44f3c3c212f9b568a6b3cff0444b6750e3d8680f.tar.bz2 | |
ppc: use "trap" ("tw, 31, 0, 0") as breakpoint instruction
Power ISA 3.0 B spec [1], sections 3.3.11 "Fixed-Point Trap Instructions"
and section C.6 "Trap Mnemonics" specify "tw, 31, 0, 0" (encoded as
0x7fe00008) as canonical unconditional trap instruction.
This commit changes the breakpoint instruction used by GDB from
"tw 12, r2, r2" to unconditional "trap".
[1]: https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0
Diffstat (limited to 'sim/m32c')
0 files changed, 0 insertions, 0 deletions