[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline

s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.

This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum.

ChangeLog entries are as follows:

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

*** gas/ChangeLog ***

2019-04-15  Sudakshina Das  <sudi.das@arm.com>
             Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
	(do_t_v8_1_branch): New switch case for bfcsel.
	(toU): Define.
	(insns): New instruction for bfcsel.
	(md_pcrel_from_section): New switch case
	for BFD_RELOC_THUMB_PCREL_BFCSEL.
	(md_appdy_fix): Likewise
	(tc_gen_reloc): Likewise.
	* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
	* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.

*** ld/ChangeLog ***

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/ld-arm/bfcsel.s: New.
	* testsuite/ld-arm/bfcsel.d: New.
	* testsuite/ld-arm/arm-elf.exp: Add above test.

*** opcodes/ChangeLog ***

2019-04-15  Sudakshina Das  <sudi.das@arm.com>

	* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
	(print_insn_thumb32): Edit the switch case for %Z.

4 files changed, 52 insertions, 0 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 1e3ee39..869d8e3 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,5 +1,11 @@
 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
+	* testsuite/ld-arm/bfcsel.s: New.
+	* testsuite/ld-arm/bfcsel.d: New.
+	* testsuite/ld-arm/arm-elf.exp: Add above test.
+
+2019-04-15  Sudakshina Das  <sudi.das@arm.com>
+
 	* testsuite/ld-arm/bfl.s: New.
 	* testsuite/ld-arm/bfl.d: New.
 	* testsuite/ld-arm/arm-elf.exp: Add above test.
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 528565e..5471895 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -673,6 +673,9 @@ set armeabitests_nonacl {
      {"Armv8.1-M Mainline BFL" "-r -Ttext 0x1000 --section-start .foo=0x1001000" "" "-march=armv8.1-m.main" {bfl.s}
       {{objdump -dr bfl.d}}
      "bfl"}
+     {"Armv8.1-M Mainline BFCSEL" "-r -Ttext 0x1000 --section-start .foo=0x1001000" "" "-march=armv8.1-m.main" {bfcsel.s}
+      {{objdump -dr bfcsel.d}}
+     "bfcsel"}
 
     {"R_ARM_THM_JUMP24 Relocation veneers: Short 1"
      "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000" ""
diff --git a/ld/testsuite/ld-arm/bfcsel.d b/ld/testsuite/ld-arm/bfcsel.d
new file mode 100644
index 0000000..914ea93
--- /dev/null
+++ b/ld/testsuite/ld-arm/bfcsel.d
@@ -0,0 +1,18 @@
+
+.*:     file format elf32-.*arm
+
+
+Disassembly of section .text:
+
+00001000 <_start>:
+    1000:	f101 e7ff 	bfcsel	4, 1001000 <bar>, 6, eq
+			1000: R_ARM_THM_BF12	bar
+    1004:	4623      	mov	r3, r4
+    1006:	4611      	mov	r1, r2
+    1008:	d0ff      	beq.n	100a <_start\+0xa>
+    100a:	4613      	mov	r3, r2
+
+Disassembly of section .foo:
+
+01001000 <bar>:
+ 1001000:	4770      	bx	lr
diff --git a/ld/testsuite/ld-arm/bfcsel.s b/ld/testsuite/ld-arm/bfcsel.s
new file mode 100644
index 0000000..675e2ea
--- /dev/null
+++ b/ld/testsuite/ld-arm/bfcsel.s
@@ -0,0 +1,25 @@
+	.global _start
+	.syntax unified
+
+@ We will place the section .text at 0x1000.
+
+	.text
+	.thumb_func
+
+_start:
+	bfcsel .LB1, bar, .LB2, eq
+	mov r3, r4
+	mov r1, r2
+.LB1:
+	beq .LB2
+.LB2:
+	mov r3, r2
+
+@ We will place the section .foo at 0x1001000.
+
+	.section .foo, "xa"
+	.thumb_func
+
+bar:
+	bx lr
+