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author | Jan Beulich <jbeulich@suse.com> | 2023-11-03 10:03:36 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2023-11-03 10:03:36 +0100 |
commit | c76820a017db5f7267d3e86851af41dd8adcbebf (patch) | |
tree | 1dcc804422e08959e41631bf10061afe9f4544c8 /include | |
parent | 0afb0215bdcdccba701eaa35e10f4923888e5ad1 (diff) | |
download | binutils-c76820a017db5f7267d3e86851af41dd8adcbebf.zip binutils-c76820a017db5f7267d3e86851af41dd8adcbebf.tar.gz binutils-c76820a017db5f7267d3e86851af41dd8adcbebf.tar.bz2 |
RISC-V: reduce redundancy in load/store macro insn handling
Within the groups L{B,BU,H,HU,W,WU,D}, S{B,H,W,D}, FL{H,W,D,Q}, and
FS{H,W,D,Q} the sole difference between the handling is the insn
mnemonic passed to the common handling functions. The intended mnemonic,
however, can easily be retrieved. Furthermore leverags that Sx and FSx
are then handled identically, too, and hence their cases can also be
folded.
Diffstat (limited to 'include')
-rw-r--r-- | include/opcode/riscv.h | 22 |
1 files changed, 3 insertions, 19 deletions
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index 93dd516..7911489 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -538,23 +538,9 @@ enum M_LGA, M_LA_TLS_GD, M_LA_TLS_IE, - M_LB, - M_LBU, - M_LH, - M_LHU, - M_LW, - M_LWU, - M_LD, - M_SB, - M_SH, - M_SW, - M_SD, - M_FLW, - M_FLD, - M_FLQ, - M_FSW, - M_FSD, - M_FSQ, + M_Lx, + M_FLx, + M_Sx_FSx, M_CALL, M_J, M_LI, @@ -563,8 +549,6 @@ enum M_SEXTB, M_SEXTH, M_VMSGE, - M_FLH, - M_FSH, M_NUM_MACROS }; |