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authorJin Ma <jinma@linux.alibaba.com>2023-11-18 14:53:08 +0800
committerNelson Chu <nelson@rivosinc.com>2023-11-23 09:31:25 +0800
commit86fbfedd715df8a89d73374d70b1f068f95b450e (patch)
treee569a7d8ff6b5cf8e154f295173d37a1772c4a27 /include
parentda02021b59983145f7da0226afb46345cda5d9ef (diff)
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RISC-V: Add T-Head VECTOR vendor extension.
T-Head has a range of vendor-specific instructions ([2]). Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the "XTheadVector" extension, a collection of T-Head-specific vector instructions. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). Here are some things that need to be explained: The "XTheadVector" extension is not a custom-extension, but a non-standard non-conforming extension. The encoding space of the "TheadVector" instructions overlaps with those of the 'V' extension. This encoding space conflict is not on purpose, but the result of issues in the past that have been resolved since. Therefore, the "XTheadVector" extension and the 'V' extension are in conflict. [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 [2] https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> bfd/ChangeLog: * elfxx-riscv.c (riscv_parse_check_conflicts): The "XTheadVector" extension and the 'V' extension are in conflict. (riscv_multi_subset_supports): Likewise.. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: * testsuite/gas/riscv/x-thead-vector-fail.d: New test. * testsuite/gas/riscv/x-thead-vector-fail.l: New test. * testsuite/gas/riscv/x-thead-vector.s: New test. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class):
Diffstat (limited to 'include')
-rw-r--r--include/opcode/riscv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 710a9b7..a26ef8a 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -467,6 +467,7 @@ enum riscv_insn_class
INSN_CLASS_XTHEADMEMIDX,
INSN_CLASS_XTHEADMEMPAIR,
INSN_CLASS_XTHEADSYNC,
+ INSN_CLASS_XTHEADVECTOR,
INSN_CLASS_XVENTANACONDOPS,
};