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authorJose E. Marchesi <jose.marchesi@oracle.com>2020-06-04 16:14:41 +0200
committerJose E. Marchesi <jose.marchesi@oracle.com>2020-06-04 16:17:42 +0200
commitb3db6d07be467fe86f5b4185a8fc7bec49380c1f (patch)
tree8486190d571c898ad12e24350e5e06a59a5bfac0 /include
parent0cfcd4f003ce0ed5467fd0ceeff4a191439c5923 (diff)
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opcodes: support insn endianness in cgen_cpu_open
This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument for @arch@_cgen_cpu_open. This is useful for architectures in which the endianness of the instruction words is not the same than the endianness used for data. An accompanying patch has been sent to the CGEN mailing list that adds support for this argument on the CGEN side [1]. Its been already pre-approved [2], and will be applied simultaneously with this binutils series. [1] https://sourceware.org/pipermail/cgen/2020q2/002733.html [2] https://sourceware.org/pipermail/cgen/2020q2/002737.html include/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * opcode/cgen.h (enum cgen_cpu_open_arg): New value CGEN_CPU_OPEN_INSN_ENDIAN. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * cgen-dis.in (cpu_desc_list): New field `insn_endian'. (print_insn_): Handle instruction endian. * bpf-dis.c: Regenerate. * bpf-desc.c: Regenerate. * epiphany-dis.c: Likewise. * epiphany-desc.c: Likewise. * fr30-dis.c: Likewise. * fr30-desc.c: Likewise. * frv-dis.c: Likewise. * frv-desc.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-desc.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-desc.c: Likewise. * lm32-dis.c: Likewise. * lm32-desc.c: Likewise. * m32c-dis.c: Likewise. * m32c-desc.c: Likewise. * m32r-dis.c: Likewise. * m32r-desc.c: Likewise. * mep-dis.c: Likewise. * mep-desc.c: Likewise. * mt-dis.c: Likewise. * mt-desc.c: Likewise. * or1k-dis.c: Likewise. * or1k-desc.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-desc.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-desc.c: Likewise. binutils/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * objdump.c (disassemble_data): Set disasm_info.endian_code to disasm_info.endian after the latter is initialized to the endianness reported by BFD.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog5
-rw-r--r--include/opcode/cgen.h9
2 files changed, 13 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 5c0a82b..df4208e 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
+
+ * opcode/cgen.h (enum cgen_cpu_open_arg): New value
+ CGEN_CPU_OPEN_INSN_ENDIAN.
+
2020-06-03 Nelson Chu <nelson.chu@sifive.com>
* opcode/riscv.h: Remove #include "bfd.h". And change the return
diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h
index 95bbdf4..3f32544 100644
--- a/include/opcode/cgen.h
+++ b/include/opcode/cgen.h
@@ -1392,7 +1392,9 @@ enum cgen_cpu_open_arg {
Multiple machines can be specified by repeated use. */
CGEN_CPU_OPEN_BFDMACH,
/* Select endian, arg is CGEN_ENDIAN_*. */
- CGEN_CPU_OPEN_ENDIAN
+ CGEN_CPU_OPEN_ENDIAN,
+ /* Select instruction endian, arg is CGEN_ENDIAN_*. */
+ CGEN_CPU_OPEN_INSN_ENDIAN,
};
/* Open a cpu descriptor table for use.
@@ -1465,6 +1467,11 @@ extern CGEN_INSN_INT cgen_get_insn_value
extern void cgen_put_insn_value
(CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT);
+extern CGEN_INSN_INT cgen_get_base_insn_value
+ (CGEN_CPU_DESC, unsigned char *, int);
+extern void cgen_put_base_insn_value
+ (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT);
+
/* Read in a cpu description file.
??? For future concerns, including adding instructions to the assembler/
disassembler at run-time. */