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authorLuis Machado <luis.machado@arm.com>2023-04-04 14:13:50 +0100
committerLuis Machado <luis.machado@arm.com>2023-08-21 12:43:43 +0100
commit11e3488d3f787d51196a115fd9c6085e57bd9626 (patch)
tree14513e9145f2d36f36b0cd7e99f5a15fa46686c3 /include
parent682267bfe4288c44ac725ba8abd7f2e790b45431 (diff)
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aarch64/sme2: Teach binutils/BFD about the NT_ARM_ZT register set
The Scalable Matrix Extension v2 (SME2) defines a new register, ZT0, that the Linux Kernel handles through a new NT_ARM_ZT register set. Teach binutils/BFD about it so that gdb can make use of it for reading and writing core files. This also enables readelf/objdump to show the correct identification for the NT_ARM_ZT register set. Validated under Fast Models.
Diffstat (limited to 'include')
-rw-r--r--include/elf/common.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/elf/common.h b/include/elf/common.h
index ffa6b60..932ea94 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -701,6 +701,8 @@
/* Note: name must be "LINUX". */
#define NT_ARM_ZA 0x40c /* AArch64 SME ZA register. */
/* Note: name must be "LINUX". */
+#define NT_ARM_ZT 0x40d /* AArch64 SME2 ZT registers. */
+ /* Note: name must be "LINUX". */
#define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */
/* note name must be "LINUX". */
#define NT_LARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */