MIPS: Change all E_MIPS_* to EF_MIPS_*

1 files changed, 84 insertions, 84 deletions

diff --git a/gold/mips.cc b/gold/mips.cc
index a6a41d7..121cecd 100644
--- a/gold/mips.cc
+++ b/gold/mips.cc
@@ -8807,13 +8807,13 @@ bool
 Target_mips<size, big_endian>::mips_32bit_flags(elfcpp::Elf_Word flags)
 {
   return ((flags & elfcpp::EF_MIPS_32BITMODE) != 0
-          || (flags & elfcpp::EF_MIPS_ABI) == elfcpp::E_MIPS_ABI_O32
-          || (flags & elfcpp::EF_MIPS_ABI) == elfcpp::E_MIPS_ABI_EABI32
-          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::E_MIPS_ARCH_1
-          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::E_MIPS_ARCH_2
-          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::E_MIPS_ARCH_32
-          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::E_MIPS_ARCH_32R2
-          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::E_MIPS_ARCH_32R6);
+          || (flags & elfcpp::EF_MIPS_ABI) == elfcpp::EF_MIPS_ABI_O32
+          || (flags & elfcpp::EF_MIPS_ABI) == elfcpp::EF_MIPS_ABI_EABI32
+          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::EF_MIPS_ARCH_1
+          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::EF_MIPS_ARCH_2
+          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::EF_MIPS_ARCH_32
+          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::EF_MIPS_ARCH_32R2
+          || (flags & elfcpp::EF_MIPS_ARCH) == elfcpp::EF_MIPS_ARCH_32R6);
 }
 
 // Return the MACH for a MIPS e_flags value.
@@ -8823,101 +8823,101 @@ Target_mips<size, big_endian>::elf_mips_mach(elfcpp::Elf_Word flags)
 {
   switch (flags & elfcpp::EF_MIPS_MACH)
     {
-    case elfcpp::E_MIPS_MACH_3900:
+    case elfcpp::EF_MIPS_MACH_3900:
       return mach_mips3900;
 
-    case elfcpp::E_MIPS_MACH_4010:
+    case elfcpp::EF_MIPS_MACH_4010:
       return mach_mips4010;
 
-    case elfcpp::E_MIPS_MACH_4100:
+    case elfcpp::EF_MIPS_MACH_4100:
       return mach_mips4100;
 
-    case elfcpp::E_MIPS_MACH_4111:
+    case elfcpp::EF_MIPS_MACH_4111:
       return mach_mips4111;
 
-    case elfcpp::E_MIPS_MACH_4120:
+    case elfcpp::EF_MIPS_MACH_4120:
       return mach_mips4120;
 
-    case elfcpp::E_MIPS_MACH_4650:
+    case elfcpp::EF_MIPS_MACH_4650:
       return mach_mips4650;
 
-    case elfcpp::E_MIPS_MACH_5400:
+    case elfcpp::EF_MIPS_MACH_5400:
       return mach_mips5400;
 
-    case elfcpp::E_MIPS_MACH_5500:
+    case elfcpp::EF_MIPS_MACH_5500:
       return mach_mips5500;
 
-    case elfcpp::E_MIPS_MACH_5900:
+    case elfcpp::EF_MIPS_MACH_5900:
       return mach_mips5900;
 
-    case elfcpp::E_MIPS_MACH_9000:
+    case elfcpp::EF_MIPS_MACH_9000:
       return mach_mips9000;
 
-    case elfcpp::E_MIPS_MACH_SB1:
+    case elfcpp::EF_MIPS_MACH_SB1:
       return mach_mips_sb1;
 
-    case elfcpp::E_MIPS_MACH_LS2E:
+    case elfcpp::EF_MIPS_MACH_LS2E:
       return mach_mips_loongson_2e;
 
-    case elfcpp::E_MIPS_MACH_LS2F:
+    case elfcpp::EF_MIPS_MACH_LS2F:
       return mach_mips_loongson_2f;
 
-    case elfcpp::E_MIPS_MACH_GS464:
+    case elfcpp::EF_MIPS_MACH_GS464:
       return mach_mips_gs464;
 
-    case elfcpp::E_MIPS_MACH_GS464E:
+    case elfcpp::EF_MIPS_MACH_GS464E:
       return mach_mips_gs464e;
 
-    case elfcpp::E_MIPS_MACH_GS264E:
+    case elfcpp::EF_MIPS_MACH_GS264E:
       return mach_mips_gs264e;
 
-    case elfcpp::E_MIPS_MACH_OCTEON3:
+    case elfcpp::EF_MIPS_MACH_OCTEON3:
       return mach_mips_octeon3;
 
-    case elfcpp::E_MIPS_MACH_OCTEON2:
+    case elfcpp::EF_MIPS_MACH_OCTEON2:
       return mach_mips_octeon2;
 
-    case elfcpp::E_MIPS_MACH_OCTEON:
+    case elfcpp::EF_MIPS_MACH_OCTEON:
       return mach_mips_octeon;
 
-    case elfcpp::E_MIPS_MACH_XLR:
+    case elfcpp::EF_MIPS_MACH_XLR:
       return mach_mips_xlr;
 
     default:
       switch (flags & elfcpp::EF_MIPS_ARCH)
         {
         default:
-        case elfcpp::E_MIPS_ARCH_1:
+        case elfcpp::EF_MIPS_ARCH_1:
           return mach_mips3000;
 
-        case elfcpp::E_MIPS_ARCH_2:
+        case elfcpp::EF_MIPS_ARCH_2:
           return mach_mips6000;
 
-        case elfcpp::E_MIPS_ARCH_3:
+        case elfcpp::EF_MIPS_ARCH_3:
           return mach_mips4000;
 
-        case elfcpp::E_MIPS_ARCH_4:
+        case elfcpp::EF_MIPS_ARCH_4:
           return mach_mips8000;
 
-        case elfcpp::E_MIPS_ARCH_5:
+        case elfcpp::EF_MIPS_ARCH_5:
           return mach_mips5;
 
-        case elfcpp::E_MIPS_ARCH_32:
+        case elfcpp::EF_MIPS_ARCH_32:
           return mach_mipsisa32;
 
-        case elfcpp::E_MIPS_ARCH_64:
+        case elfcpp::EF_MIPS_ARCH_64:
           return mach_mipsisa64;
 
-        case elfcpp::E_MIPS_ARCH_32R2:
+        case elfcpp::EF_MIPS_ARCH_32R2:
           return mach_mipsisa32r2;
 
-        case elfcpp::E_MIPS_ARCH_32R6:
+        case elfcpp::EF_MIPS_ARCH_32R6:
           return mach_mipsisa32r6;
 
-        case elfcpp::E_MIPS_ARCH_64R2:
+        case elfcpp::EF_MIPS_ARCH_64R2:
           return mach_mipsisa64r2;
 
-        case elfcpp::E_MIPS_ARCH_64R6:
+        case elfcpp::EF_MIPS_ARCH_64R6:
           return mach_mipsisa64r6;
         }
     }
@@ -9066,37 +9066,37 @@ Target_mips<size, big_endian>::update_abiflags_isa(const std::string& name,
   int new_isa = 0;
   switch (e_flags & elfcpp::EF_MIPS_ARCH)
     {
-    case elfcpp::E_MIPS_ARCH_1:
+    case elfcpp::EF_MIPS_ARCH_1:
       new_isa = this->level_rev(1, 0);
       break;
-    case elfcpp::E_MIPS_ARCH_2:
+    case elfcpp::EF_MIPS_ARCH_2:
       new_isa = this->level_rev(2, 0);
       break;
-    case elfcpp::E_MIPS_ARCH_3:
+    case elfcpp::EF_MIPS_ARCH_3:
       new_isa = this->level_rev(3, 0);
       break;
-    case elfcpp::E_MIPS_ARCH_4:
+    case elfcpp::EF_MIPS_ARCH_4:
       new_isa = this->level_rev(4, 0);
       break;
-    case elfcpp::E_MIPS_ARCH_5:
+    case elfcpp::EF_MIPS_ARCH_5:
       new_isa = this->level_rev(5, 0);
       break;
-    case elfcpp::E_MIPS_ARCH_32:
+    case elfcpp::EF_MIPS_ARCH_32:
       new_isa = this->level_rev(32, 1);
       break;
-    case elfcpp::E_MIPS_ARCH_32R2:
+    case elfcpp::EF_MIPS_ARCH_32R2:
       new_isa = this->level_rev(32, 2);
       break;
-    case elfcpp::E_MIPS_ARCH_32R6:
+    case elfcpp::EF_MIPS_ARCH_32R6:
       new_isa = this->level_rev(32, 6);
       break;
-    case elfcpp::E_MIPS_ARCH_64:
+    case elfcpp::EF_MIPS_ARCH_64:
       new_isa = this->level_rev(64, 1);
       break;
-    case elfcpp::E_MIPS_ARCH_64R2:
+    case elfcpp::EF_MIPS_ARCH_64R2:
       new_isa = this->level_rev(64, 2);
       break;
-    case elfcpp::E_MIPS_ARCH_64R6:
+    case elfcpp::EF_MIPS_ARCH_64R6:
       new_isa = this->level_rev(64, 6);
       break;
     default:
@@ -12489,13 +12489,13 @@ Target_mips<size, big_endian>::elf_mips_abi_name(elfcpp::Elf_Word e_flags)
         return "64";
       else
         return "none";
-    case elfcpp::E_MIPS_ABI_O32:
+    case elfcpp::EF_MIPS_ABI_O32:
       return "O32";
-    case elfcpp::E_MIPS_ABI_O64:
+    case elfcpp::EF_MIPS_ABI_O64:
       return "O64";
-    case elfcpp::E_MIPS_ABI_EABI32:
+    case elfcpp::EF_MIPS_ABI_EABI32:
       return "EABI32";
-    case elfcpp::E_MIPS_ABI_EABI64:
+    case elfcpp::EF_MIPS_ABI_EABI64:
       return "EABI64";
     default:
       return "unknown abi";
@@ -12508,81 +12508,81 @@ Target_mips<size, big_endian>::elf_mips_mach_name(elfcpp::Elf_Word e_flags)
 {
   switch (e_flags & elfcpp::EF_MIPS_MACH)
     {
-    case elfcpp::E_MIPS_MACH_3900:
+    case elfcpp::EF_MIPS_MACH_3900:
       return "mips:3900";
-    case elfcpp::E_MIPS_MACH_4010:
+    case elfcpp::EF_MIPS_MACH_4010:
       return "mips:4010";
-    case elfcpp::E_MIPS_MACH_4100:
+    case elfcpp::EF_MIPS_MACH_4100:
       return "mips:4100";
-    case elfcpp::E_MIPS_MACH_4111:
+    case elfcpp::EF_MIPS_MACH_4111:
       return "mips:4111";
-    case elfcpp::E_MIPS_MACH_4120:
+    case elfcpp::EF_MIPS_MACH_4120:
       return "mips:4120";
-    case elfcpp::E_MIPS_MACH_4650:
+    case elfcpp::EF_MIPS_MACH_4650:
       return "mips:4650";
-    case elfcpp::E_MIPS_MACH_5400:
+    case elfcpp::EF_MIPS_MACH_5400:
       return "mips:5400";
-    case elfcpp::E_MIPS_MACH_5500:
+    case elfcpp::EF_MIPS_MACH_5500:
       return "mips:5500";
-    case elfcpp::E_MIPS_MACH_5900:
+    case elfcpp::EF_MIPS_MACH_5900:
       return "mips:5900";
-    case elfcpp::E_MIPS_MACH_SB1:
+    case elfcpp::EF_MIPS_MACH_SB1:
       return "mips:sb1";
-    case elfcpp::E_MIPS_MACH_9000:
+    case elfcpp::EF_MIPS_MACH_9000:
       return "mips:9000";
-    case elfcpp::E_MIPS_MACH_LS2E:
+    case elfcpp::EF_MIPS_MACH_LS2E:
       return "mips:loongson_2e";
-    case elfcpp::E_MIPS_MACH_LS2F:
+    case elfcpp::EF_MIPS_MACH_LS2F:
       return "mips:loongson_2f";
-    case elfcpp::E_MIPS_MACH_GS464:
+    case elfcpp::EF_MIPS_MACH_GS464:
       return "mips:gs464";
-    case elfcpp::E_MIPS_MACH_GS464E:
+    case elfcpp::EF_MIPS_MACH_GS464E:
       return "mips:gs464e";
-    case elfcpp::E_MIPS_MACH_GS264E:
+    case elfcpp::EF_MIPS_MACH_GS264E:
       return "mips:gs264e";
-    case elfcpp::E_MIPS_MACH_OCTEON:
+    case elfcpp::EF_MIPS_MACH_OCTEON:
       return "mips:octeon";
-    case elfcpp::E_MIPS_MACH_OCTEON2:
+    case elfcpp::EF_MIPS_MACH_OCTEON2:
       return "mips:octeon2";
-    case elfcpp::E_MIPS_MACH_OCTEON3:
+    case elfcpp::EF_MIPS_MACH_OCTEON3:
       return "mips:octeon3";
-    case elfcpp::E_MIPS_MACH_XLR:
+    case elfcpp::EF_MIPS_MACH_XLR:
       return "mips:xlr";
     default:
       switch (e_flags & elfcpp::EF_MIPS_ARCH)
         {
         default:
-        case elfcpp::E_MIPS_ARCH_1:
+        case elfcpp::EF_MIPS_ARCH_1:
           return "mips:3000";
 
-        case elfcpp::E_MIPS_ARCH_2:
+        case elfcpp::EF_MIPS_ARCH_2:
           return "mips:6000";
 
-        case elfcpp::E_MIPS_ARCH_3:
+        case elfcpp::EF_MIPS_ARCH_3:
           return "mips:4000";
 
-        case elfcpp::E_MIPS_ARCH_4:
+        case elfcpp::EF_MIPS_ARCH_4:
           return "mips:8000";
 
-        case elfcpp::E_MIPS_ARCH_5:
+        case elfcpp::EF_MIPS_ARCH_5:
           return "mips:mips5";
 
-        case elfcpp::E_MIPS_ARCH_32:
+        case elfcpp::EF_MIPS_ARCH_32:
           return "mips:isa32";
 
-        case elfcpp::E_MIPS_ARCH_64:
+        case elfcpp::EF_MIPS_ARCH_64:
           return "mips:isa64";
 
-        case elfcpp::E_MIPS_ARCH_32R2:
+        case elfcpp::EF_MIPS_ARCH_32R2:
           return "mips:isa32r2";
 
-        case elfcpp::E_MIPS_ARCH_32R6:
+        case elfcpp::EF_MIPS_ARCH_32R6:
           return "mips:isa32r6";
 
-        case elfcpp::E_MIPS_ARCH_64R2:
+        case elfcpp::EF_MIPS_ARCH_64R2:
           return "mips:isa64r2";
 
-        case elfcpp::E_MIPS_ARCH_64R6:
+        case elfcpp::EF_MIPS_ARCH_64R6:
           return "mips:isa64r6";
         }
     }