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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-11-03 09:13:01 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-11-03 09:15:52 -0700 |
| commit | 8b89fe14b522cd6e5d160ff17defa8ecec243b11 (patch) | |
| tree | a9cd182a09e9fb3c0c8ecf3c269684633f98feed /gdb | |
| parent | 722bcb33bf0383487c1af0e7d401e30301e94e2b (diff) | |
| download | binutils-8b89fe14b522cd6e5d160ff17defa8ecec243b11.zip binutils-8b89fe14b522cd6e5d160ff17defa8ecec243b11.tar.gz binutils-8b89fe14b522cd6e5d160ff17defa8ecec243b11.tar.bz2 | |
X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80
in 32-bit mode.
gas/
PR binutils/20754
* testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
* testsuite/gas/i386/opcode-intel.d: Updated.
* testsuite/gas/i386/opcode.d: Likewise.
opcodes/
PR binutils/20754
* i386-dis.c (REG_82): New.
(X86_64_82_REG_0): Likewise.
(X86_64_82_REG_1): Likewise.
(X86_64_82_REG_2): Likewise.
(X86_64_82_REG_3): Likewise.
(X86_64_82_REG_4): Likewise.
(X86_64_82_REG_5): Likewise.
(X86_64_82_REG_6): Likewise.
(X86_64_82_REG_7): Likewise.
(dis386): Use REG_82.
(reg_table): Add REG_82.
(x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1,
X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4,
X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7.
Diffstat (limited to 'gdb')
0 files changed, 0 insertions, 0 deletions