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| author | H.J. Lu <hjl.tools@gmail.com> | 2016-10-20 15:07:42 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2016-10-20 15:26:23 -0700 |
| commit | 9889cbb14ebea4b281408afcfd94ad6646ab370a (patch) | |
| tree | ffad5e2435f482ae1392027828b13905776e5890 /gdb/python/python.c | |
| parent | f90fd8c2f17c7631915103ce5b760830a156ee93 (diff) | |
| download | binutils-9889cbb14ebea4b281408afcfd94ad6646ab370a.zip binutils-9889cbb14ebea4b281408afcfd94ad6646ab370a.tar.gz binutils-9889cbb14ebea4b281408afcfd94ad6646ab370a.tar.bz2 | |
Check invalid mask registers
In 32-bit, the REX_B bit in the 3-byte VEX prefix is ignored and the
the highest bit in VEX.vvvv is either 1 or ignored. In 64-bit, we
need to check invalid mask registers.
gas/
PR binutis/20705
* testsuite/gas/i386/i386.exp: Run x86-64-opcode-bad.
* testsuite/gas/i386/x86-64-opcode-bad.d: New file.
* testsuite/gas/i386/x86-64-opcode-bad.s: Likewise.
opcodes/
PR binutis/20705
* i386-dis.c (get_valid_dis386): Ignore the REX_B bit and
the highest bit in VEX.vvvv for the 3-byte VEX prefix in
32-bit mode. Don't check vex.register_specifier in 32-bit
mode.
(OP_E_register): Check invalid mask registers.
(OP_G): Likewise.
(OP_VEX): Likewise.
Diffstat (limited to 'gdb/python/python.c')
0 files changed, 0 insertions, 0 deletions