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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-06-24 11:59:04 +0900 |
|---|---|---|
| committer | Nelson Chu <nelson.chu@sifive.com> | 2022-07-07 12:05:56 +0800 |
| commit | 37cf60c6a6d36bbf5cf1523697906c4bdb4eb468 (patch) | |
| tree | d3a3651e6dfa3a6653dd85ef9099ebf428d88c09 /gdb/guile/guile.c | |
| parent | 9b5ebf652b36502ffe79fb196e312bf9ea93f72f (diff) | |
| download | binutils-37cf60c6a6d36bbf5cf1523697906c4bdb4eb468.zip binutils-37cf60c6a6d36bbf5cf1523697906c4bdb4eb468.tar.gz binutils-37cf60c6a6d36bbf5cf1523697906c4bdb4eb468.tar.bz2 | |
RISC-V: Fix requirement handling on Zhinx+{D,Q}
This commit fixes how instructions are masked on Zhinx+Z{d,q}inx.
fcvt.h.d and fcvt.d.h require ((D&&Zfh)||(Zdinx&&Zhinx)) and
fcvt.h.q and fcvt.q.h require ((Q&&Zfh)||(Zqinx&&Zhinx)).
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Fix feature gate
on INSN_CLASS_{D,Q}_AND_ZFH_INX.
(riscv_multi_subset_supports_ext): Fix feature gate diagnostics
on INSN_CLASS_{D,Q}_AND_ZFH_INX.
gas/ChangeLog:
* testsuite/gas/riscv/fp-zhinx-insns.d: Add Zqinx to -march
for proper testing.
Diffstat (limited to 'gdb/guile/guile.c')
0 files changed, 0 insertions, 0 deletions