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author | Richard Sandiford <richard.sandiford@arm.com> | 2017-02-15 16:54:21 +0000 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2017-02-15 16:54:21 +0000 |
commit | 773fb663445646ebe45298e255d263f9520b2e2e (patch) | |
tree | 5fe4c3e1d8f6f8ea65885da0fc6dd841b483e865 /gas | |
parent | 7a2114e7a4ee1fbb5a0611733c72a2a7acc733c7 (diff) | |
download | binutils-773fb663445646ebe45298e255d263f9520b2e2e.zip binutils-773fb663445646ebe45298e255d263f9520b2e2e.tar.gz binutils-773fb663445646ebe45298e255d263f9520b2e2e.tar.bz2 |
[AArch64] Add SVE system registers
This patch adds the SVE-specific system registers.
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add SVE registers.
(aarch64_sys_reg_supported_p): Handle them.
gas/
* testsuite/gas/aarch64/sve-sysreg.s,
testsuite/gas/aarch64/sve-sysreg.d,
testsuite/gas/aarch64/sve-sysreg-invalid.d,
testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve-sysreg-invalid.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve-sysreg-invalid.l | 21 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve-sysreg.d | 29 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/sve-sysreg.s | 25 |
5 files changed, 85 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 1a2949c..d494dc7 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2017-02-15 Richard Sandiford <richard.sandiford@arm.com> + * testsuite/gas/aarch64/sve-sysreg.s, + testsuite/gas/aarch64/sve-sysreg.d, + testsuite/gas/aarch64/sve-sysreg-invalid.d, + testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests. + +2017-02-15 Richard Sandiford <richard.sandiford@arm.com> + * doc/c-aarch64.texi: Fix sve entry. 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com> diff --git a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d new file mode 100644 index 0000000..bea0678 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+nosve +#source: sve-sysreg.s +#error-output: sve-sysreg-invalid.l diff --git a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l new file mode 100644 index 0000000..b68c41d --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l @@ -0,0 +1,21 @@ +.*: Assembler messages: +.*:1: Error: selected processor does not support system register name 'id_aa64zfr0_el1' +.*:2: Error: selected processor does not support system register name 'id_aa64zfr0_el1' +.*:4: Error: selected processor does not support system register name 'zcr_el1' +.*:5: Error: selected processor does not support system register name 'zcr_el1' +.*:6: Error: selected processor does not support system register name 'zcr_el1' +.*:7: Error: selected processor does not support system register name 'zcr_el1' +.*:9: Error: selected processor does not support system register name 'zcr_el12' +.*:10: Error: selected processor does not support system register name 'zcr_el12' +.*:11: Error: selected processor does not support system register name 'zcr_el12' +.*:12: Error: selected processor does not support system register name 'zcr_el12' +.*:14: Error: selected processor does not support system register name 'zcr_el2' +.*:15: Error: selected processor does not support system register name 'zcr_el2' +.*:16: Error: selected processor does not support system register name 'zcr_el2' +.*:17: Error: selected processor does not support system register name 'zcr_el2' +.*:19: Error: selected processor does not support system register name 'zcr_el3' +.*:20: Error: selected processor does not support system register name 'zcr_el3' +.*:21: Error: selected processor does not support system register name 'zcr_el3' +.*:22: Error: selected processor does not support system register name 'zcr_el3' +.*:24: Error: selected processor does not support system register name 'zidr_el1' +.*:25: Error: selected processor does not support system register name 'zidr_el1' diff --git a/gas/testsuite/gas/aarch64/sve-sysreg.d b/gas/testsuite/gas/aarch64/sve-sysreg.d new file mode 100644 index 0000000..24ab421 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-sysreg.d @@ -0,0 +1,29 @@ +#as: -march=armv8-a+sve +#objdump: -dr + + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +.*: d5380480 mrs x0, id_aa64zfr0_el1 +.*: d538049b mrs x27, id_aa64zfr0_el1 +.*: d5381200 mrs x0, zcr_el1 +.*: d538121b mrs x27, zcr_el1 +.*: d5181200 msr zcr_el1, x0 +.*: d518121a msr zcr_el1, x26 +.*: d53d1200 mrs x0, zcr_el12 +.*: d53d121b mrs x27, zcr_el12 +.*: d51d1200 msr zcr_el12, x0 +.*: d51d121a msr zcr_el12, x26 +.*: d53c1200 mrs x0, zcr_el2 +.*: d53c121b mrs x27, zcr_el2 +.*: d51c1200 msr zcr_el2, x0 +.*: d51c121a msr zcr_el2, x26 +.*: d53e1200 mrs x0, zcr_el3 +.*: d53e121b mrs x27, zcr_el3 +.*: d51e1200 msr zcr_el3, x0 +.*: d51e121a msr zcr_el3, x26 +.*: d53800e0 mrs x0, zidr_el1 +.*: d53800fb mrs x27, zidr_el1 diff --git a/gas/testsuite/gas/aarch64/sve-sysreg.s b/gas/testsuite/gas/aarch64/sve-sysreg.s new file mode 100644 index 0000000..a38ad7f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve-sysreg.s @@ -0,0 +1,25 @@ + mrs x0, ID_AA64ZFR0_EL1 + mrs X27, id_aa64zfr0_el1 + + mrs x0, ZCR_EL1 + mrs X27, zcr_el1 + msr ZCR_EL1, X0 + msr zcr_el1, x26 + + mrs x0, ZCR_EL12 + mrs X27, zcr_el12 + msr ZCR_EL12, X0 + msr zcr_el12, x26 + + mrs x0, ZCR_EL2 + mrs X27, zcr_el2 + msr ZCR_EL2, X0 + msr zcr_el2, x26 + + mrs x0, ZCR_EL3 + mrs X27, zcr_el3 + msr ZCR_EL3, X0 + msr zcr_el3, x26 + + mrs x0, ZIDR_EL1 + mrs X27, zidr_el1 |