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| author | Indu Bhagat <indu.bhagat@oracle.com> | 2024-05-28 17:56:13 -0700 |
|---|---|---|
| committer | Indu Bhagat <indu.bhagat@oracle.com> | 2024-05-31 17:07:47 -0700 |
| commit | ab1c38a73ed39e3a16dcfd54ce02898e75a84664 (patch) | |
| tree | 8bbdc73ed257df813532cd7bca5384fe45f76173 | |
| parent | 75cd8ef0a25db2a04f157251723b6a87eb64297d (diff) | |
| download | binutils-ab1c38a73ed39e3a16dcfd54ce02898e75a84664.zip binutils-ab1c38a73ed39e3a16dcfd54ce02898e75a84664.tar.gz binutils-ab1c38a73ed39e3a16dcfd54ce02898e75a84664.tar.bz2 | |
opcodes: aarch64: flags to denote subclasses of uncond branches
[New in V2]
Add three new mutually exclusive flags: F_BRANCH_CALL, F_BRANCH_RET,
to indicate call to and return from subroutine respectively.
include/
* opcode/aarch64.h (F_BRANCH_CALL): New flag.
(F_BRANCH_RET): Likewise.
opcodes/
* aarch64-tbl.h: Use the new F_BRANCH_* flags.
| -rw-r--r-- | include/opcode/aarch64.h | 3 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 24 |
2 files changed, 15 insertions, 12 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index dfb8a84..1df45ba 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -1324,6 +1324,9 @@ extern const aarch64_opcode aarch64_opcode_table[]; #define F_ARITH_ADD (1ULL << 36) #define F_ARITH_SUB (2ULL << 36) #define F_ARITH_MOV (4ULL << 36) +/* Subclasses to denote call and ret insns. */ +#define F_BRANCH_CALL (1ULL << 36) +#define F_BRANCH_RET (2ULL << 36) /* Next bit is 40. */ /* Instruction constraints. */ diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 2a0145d..f7ca88e 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -3743,25 +3743,25 @@ const struct aarch64_opcode aarch64_opcode_table[] = CORE_INSN ("lsr", 0x53000000, 0x7f800000, bitfield, OP_LSR_IMM, OP3 (Rd, Rn, IMM), QL_SHIFT, F_ALIAS | F_P2 | F_CONV), /* Unconditional branch (immediate). */ CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm, OP_B, OP1 (ADDR_PCREL26), QL_PCREL_26, 0), - CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, 0), + CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm, OP_BL, OP1 (ADDR_PCREL26), QL_PCREL_26, F_BRANCH_CALL), /* Unconditional branch (register). */ CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, 0), - CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, 0), - CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_OPD0_OPT | F_DEFAULT (30)), - CORE_INSN ("eret", 0xd69f03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0), + CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_CALL), + CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_BRANCH_RET | F_OPD0_OPT | F_DEFAULT (30)), + CORE_INSN ("eret", 0xd69f03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, F_BRANCH_RET), CORE_INSN ("drps", 0xd6bf03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0), PAUTH_INSN ("braa", 0xd71f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), PAUTH_INSN ("brab", 0xd71f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), - PAUTH_INSN ("blraa", 0xd73f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), - PAUTH_INSN ("blrab", 0xd73f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0), + PAUTH_INSN ("blraa", 0xd73f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, F_BRANCH_CALL), + PAUTH_INSN ("blrab", 0xd73f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, F_BRANCH_CALL), PAUTH_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), PAUTH_INSN ("brabz", 0xd61f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), - PAUTH_INSN ("blraaz", 0xd63f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), - PAUTH_INSN ("blrabz", 0xd63f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0), - PAUTH_INSN ("retaa", 0xd65f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0), - PAUTH_INSN ("retab", 0xd65f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0), - PAUTH_INSN ("eretaa", 0xd69f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0), - PAUTH_INSN ("eretab", 0xd69f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0), + PAUTH_INSN ("blraaz", 0xd63f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_BRANCH_CALL), + PAUTH_INSN ("blrabz", 0xd63f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, F_BRANCH_CALL), + PAUTH_INSN ("retaa", 0xd65f0bff, 0xffffffff, branch_reg, OP0 (), {}, F_BRANCH_RET), + PAUTH_INSN ("retab", 0xd65f0fff, 0xffffffff, branch_reg, OP0 (), {}, F_BRANCH_RET), + PAUTH_INSN ("eretaa", 0xd69f0bff, 0xffffffff, branch_reg, OP0 (), {}, F_BRANCH_RET), + PAUTH_INSN ("eretab", 0xd69f0fff, 0xffffffff, branch_reg, OP0 (), {}, F_BRANCH_RET), /* Compare & branch (immediate). */ CORE_INSN ("cbz", 0x34000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF), CORE_INSN ("cbnz", 0x35000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF), |