| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2017-09-13 | Allow tests to pass special QEMU arguments | Palmer Dabbelt | 1 | -1/+13 | |
| 2017-09-13 | Split the glibc and newlib multilib names in the Makefile | Palmer Dabbelt | 3 | -14/+29 | |
| 2017-09-11 | Bump gcc for block-move support (#277) | Andrew Waterman | 1 | -0/+0 | |
| 2017-09-06 | Merge pull request #276 from riscv/disable-gdb | Palmer Dabbelt | 3 | -2/+35 | |
| Add a "--disable-gdb" argument | |||||
| 2017-09-06 | Add a "--disable-gdb" argument | Palmer Dabbelt | 3 | -2/+35 | |
| 2017-09-06 | Merge pull request #275 from riscv/new-failures | Palmer Dabbelt | 7 | -2/+44 | |
| Whitelist new failures | |||||
| 2017-09-05 | Whitelist some failing gfortran tests | Palmer Dabbelt | 6 | -0/+42 | |
| These appear to be real test failures, but I don't have time to deal with them right now. | |||||
| 2017-09-05 | Allow multiple test whitelists to be used | Palmer Dabbelt | 1 | -2/+2 | |
| 2017-08-31 | Merge pull request #273 from riscv/gdb-testsuite | Palmer Dabbelt | 1 | -0/+6 | |
| Add gdb testsuite | |||||
| 2017-08-30 | Add gdb testsuite | Kito Cheng | 1 | -0/+6 | |
| 2017-08-28 | Add comments explaining why fortran tests fail (#272) | Andrew Waterman | 1 | -0/+6 | |
| 2017-08-22 | Merge pull request #269 from riscv/glibc-2.26 | Palmer Dabbelt | 391 | -1115/+21134 | |
| Move to glibc-2.26, and the latest Linux headers (riscv-for-submissio… | |||||
| 2017-08-22 | Merge pull request #270 from riscv/status-image | Palmer Dabbelt | 1 | -0/+2 | |
| Add travis-ci status image in README.md | |||||
| 2017-08-22 | Add travis-ci status image in README.md | Kito Cheng | 1 | -0/+2 | |
| 2017-08-21 | Move to glibc-2.26, and the latest Linux headers (riscv-for-submission-v7) | Palmer Dabbelt | 391 | -1115/+21134 | |
| I'm trying to get all our ports up to date with the latest stable versions, just for my own sanity. This handles glibc, but pushes Linux a bit past what's currently stable. | |||||
| 2017-08-21 | Merge pull request #268 from riscv/regression | Palmer Dabbelt | 24 | -17/+531 | |
| Run the GCC test suite on Travis | |||||
| 2017-08-20 | Run the GCC test suite on Travis | Palmer Dabbelt | 2 | -2/+21 | |
| I don't run any multilib tests here because they take too long for Travis. | |||||
| 2017-08-20 | Add a "make report" phony target | Palmer Dabbelt | 1 | -0/+18 | |
| This builds everything, runs the test suites, and then diffs against the whitelists to make sure there aren't any new failures. | |||||
| 2017-08-20 | Whitelist the current set of test failures | Palmer Dabbelt | 14 | -0/+444 | |
| I haven't actually done my due diligance here to ensure this is the minimal set of test failures. | |||||
| 2017-08-20 | Run the GCC test suite on all the multilibs | Palmer Dabbelt | 1 | -2/+5 | |
| 2017-08-20 | Always set the multilib list | Palmer Dabbelt | 3 | -6/+22 | |
| 2017-08-20 | Automate building QEMU | Palmer Dabbelt | 3 | -3/+15 | |
| We need QEMU to run the test suite. This patch automates the build so I don't need to keep remembering how to do it by hand. | |||||
| 2017-08-20 | Link all the QEMU wrapper scripts together | Palmer Dabbelt | 4 | -4/+6 | |
| 2017-08-16 | Merge pull request #265 from riscv/weak_undefv20170818 | Palmer Dabbelt | 1 | -0/+0 | |
| Bump binutils | |||||
| 2017-08-16 | Bump binutils | Palmer Dabbelt | 1 | -0/+0 | |
| 5852e73c72db RISC-V: Support PCREL_* relocations agaist weak undefined symbols | |||||
| 2017-08-08 | Move back to the stable binutils release | Palmer Dabbelt | 1 | -0/+0 | |
| 2017-08-06 | bump binutils | Andrew Waterman | 1 | -0/+0 | |
| 2017-08-06 | Merge pull request #262 from riscv/rvc-norvc | Yunsup Lee | 1 | -0/+0 | |
| bump binutils, to allow mixing RVC and no-RVC | |||||
| 2017-08-06 | bump binutils, to allow mixing RVC and no-RVC | Palmer Dabbelt | 1 | -0/+0 | |
| * 0419befe6f92 (WIP) RISC-V: Provide better disassembly of alignment sequences * 160ba91886e3 (WIP) objdump: Provide the found reloc to the disassembler * 779cd1f46451 (WIP) RISC-V: Avoid emitting invalid instructions in mixed RVC/no-RVC code * ceef952725fb (WIP) RISC-V: Print an error when unable to align a section | |||||
| 2017-07-27 | Merge pull request #258 from riscv/rtems | Palmer Dabbelt | 1 | -2/+2 | |
| Allow users to override the tuples | |||||
| 2017-07-27 | Merge pull request #256 from riscv/gc | Palmer Dabbelt | 1 | -3/+3 | |
| The default ISA is GC | |||||
| 2017-07-27 | Allow users to override the tuples | Palmer Dabbelt | 1 | -2/+2 | |
| A user just added RTEMS support to the GCC port (via newlib), which is very similar to the existing newlib port but has a different tuple. This patch allows users to override the tuples to build other targets if they want to. | |||||
| 2017-07-12 | The default ISA is GCv20170612 | Palmer Dabbelt | 1 | -3/+3 | |
| 2017-06-02 | Merge pull request #247 from kyrias/with-guile | Palmer Dabbelt | 3 | -13/+35 | |
| Add support for --with-guile configure flag | |||||
| 2017-06-02 | Merge pull request #246 from kito-cheng/master | Palmer Dabbelt | 1 | -0/+0 | |
| Bump newlib to 2.5 | |||||
| 2017-05-31 | Add support for --with-guile configure flag | Johannes Löthberg | 3 | -13/+35 | |
| And re-run autoreconf to generate the configure script. Signed-off-by: Johannes Löthberg <johannes@kyriasis.com> | |||||
| 2017-05-24 | Bump newlib to 2.5 | Kito Cheng | 1 | -0/+0 | |
| 2017-05-17 | Bump GCC, for an ICE fix | Palmer Dabbelt | 1 | -0/+0 | |
| 16210e6 RISC-V: Handle non-legitimate address in riscv_legitimize_move | |||||
| 2017-05-16 | Factor out tuples in Makefile | Andrew Waterman | 1 | -15/+19 | |
| This makes it easier to use this repo to build other toolchains, as I occasionally want to do. | |||||
| 2017-05-10 | Don't require sudo on Travis | Palmer Dabbelt | 1 | -0/+2 | |
| I'm hoping this will speed up our builds a bit, as we'll no longer be executing in a VM but instead in a container. | |||||
| 2017-05-10 | Download the GCC prereq libraries, even when using submodules | Palmer Dabbelt | 1 | -0/+2 | |
| 2017-05-10 | Bump gcc | Palmer Dabbelt | 1 | -0/+0 | |
| ff03ebe RISC-V: Add Sign/Zero extend patterns for PIC loads 2fe94d5 RISC-V: Add -mstrict-align option f9771ad RISC-V: Unify indention in riscv.md | |||||
| 2017-05-10 | Bump binutils | Palmer Dabbelt | 1 | -0/+0 | |
| RISC-V: Fix disassemble for c.li, c.andi and c.addiw | |||||
| 2017-05-04 | Merge pull request #237 from riscv/bumps | Palmer Dabbelt | 2 | -0/+0 | |
| Update binutils and glibc | |||||
| 2017-05-04 | Bump glibc, for a __global_pointer$ change | Palmer Dabbelt | 1 | -0/+0 | |
| * RISC-V: Prohibit relaxing the initial gp generation | |||||
| 2017-05-03 | Bump binutils, for a host of backports | Palmer Dabbelt | 1 | -0/+0 | |
| * RISC-V: Change CALL macro to use ra as the temporary address register * RISC-V: Allow 32-bit BFD to handle 64-bit objects * RISC-V: Resurrect GP-relative disassembly hints * RISC-V/bfd: Hook elf_backend_object_p to set the mach type. | |||||
| 2017-05-03 | Merge pull request #233 from riscv/zlib | Palmer Dabbelt | 3 | -1/+49 | |
| Allow users to flip "--with-system-zlib" | |||||
| 2017-05-03 | Allow the user to flip "--with-system-zlib" | Palmer Dabbelt | 3 | -5/+49 | |
| We need this to have different polarity for different platforms (Windows vs RedHat). I don't know how to autodetect this for now, so I'm just doing it manually. | |||||
| 2017-05-03 | Revert "Don't use the system zlib" | Palmer Dabbelt | 1 | -0/+4 | |
| This reverts commit 237c88163347039cfdbd8be5c2188a7e46585872. | |||||
| 2017-05-03 | Merge pull request #232 from riscv/windowsv20170503 | Palmer Dabbelt | 3 | -17/+44 | |
| Allow Windows builds | |||||
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