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-rw-r--r--Makefile.in6
-rwxr-xr-xconfigure12
-rw-r--r--configure.ac11
-rw-r--r--newlib/newlib/libc/machine/riscv/ieeefp.c10
-rw-r--r--newlib/newlib/libc/machine/riscv/setjmp.S66
m---------riscv-binutils-gdb0
m---------riscv-gcc0
m---------riscv-glibc0
8 files changed, 54 insertions, 51 deletions
diff --git a/Makefile.in b/Makefile.in
index ae3c71d..47fc05e 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -41,14 +41,12 @@ export PATH AWK SED
MULTILIB_FLAGS := @multilib_flags@
ATOMIC_CFLAGS := @atomic_cflags@
-FLOAT_CFLAGS := @float_cflags@
-FLOAT_ASFLAGS := @float_asflags@
BINUTILS_FLOAT_FLAGS := @binutils_float_flags@
GCC_FLOAT_FLAGS := @gcc_float_flags@
GLIBC_FLOAT_FLAGS := @glibc_float_flags@
-CFLAGS_FOR_TARGET := $(CFLAGS_FOR_TARGET_EXTRA) $(ATOMIC_CFLAGS) $(FLOAT_CFLAGS)
-ASFLAGS_FOR_TARGET := $(ASFLAGS_FOR_TARGET_EXTRA) $(FLOAT_ASFLAGS)
+CFLAGS_FOR_TARGET := $(CFLAGS_FOR_TARGET_EXTRA) $(ATOMIC_CFLAGS)
+ASFLAGS_FOR_TARGET := $(ASFLAGS_FOR_TARGET_EXTRA)
all: @default_target@
diff --git a/configure b/configure
index 792facd..2e6dea8 100755
--- a/configure
+++ b/configure
@@ -588,8 +588,6 @@ multilib_flags
glibc_float_flags
gcc_float_flags
binutils_float_flags
-float_asflags
-float_cflags
atomic_cflags
WITH_ARCH
XLEN
@@ -3279,15 +3277,11 @@ else
fi
if test "x$enable_float" != xno; then :
- float_cflags=-mhard-float
-float_asflags=-mhard-float
-binutils_float_flags=--disable-soft-float
-gcc_float_flags="--disable-soft-float --with-float=hard"
+ binutils_float_flags=--disable-soft-float
+gcc_float_flags="--disable-soft-float"
else
- float_cflags=-msoft-float
-float_asflags=-msoft-float
-binutils_float_flags=--enable-soft-float
+ binutils_float_flags=--enable-soft-float
gcc_float_flags="--enable-soft-float --with-float=soft"
glibc_float_flags=--without-fp
diff --git a/configure.ac b/configure.ac
index 71aee10..89b3f63 100644
--- a/configure.ac
+++ b/configure.ac
@@ -105,14 +105,9 @@ AS_IF([test "x$enable_atomic" != xno],
[AC_SUBST(atomic_cflags,-mno-atomic)])
AS_IF([test "x$enable_float" != xno],
- [AC_SUBST(float_cflags,-mhard-float)dnl
-AC_SUBST(float_asflags,-mhard-float)dnl
-AC_SUBST(binutils_float_flags,--disable-soft-float)dnl
-AC_SUBST(gcc_float_flags,"--disable-soft-float --with-float=hard")dnl
-AC_SUBST(glibc_float_flags,)],
- [AC_SUBST(float_cflags,-msoft-float)dnl
-AC_SUBST(float_asflags,-msoft-float)dnl
-AC_SUBST(binutils_float_flags,--enable-soft-float)dnl
+ [AC_SUBST(binutils_float_flags,--disable-soft-float)dnl
+AC_SUBST(gcc_float_flags,"--disable-soft-float")],
+ [AC_SUBST(binutils_float_flags,--enable-soft-float)dnl
AC_SUBST(gcc_float_flags,"--enable-soft-float --with-float=soft")dnl
AC_SUBST(glibc_float_flags,--without-fp)])
diff --git a/newlib/newlib/libc/machine/riscv/ieeefp.c b/newlib/newlib/libc/machine/riscv/ieeefp.c
index 5bd0712..1c764f7 100644
--- a/newlib/newlib/libc/machine/riscv/ieeefp.c
+++ b/newlib/newlib/libc/machine/riscv/ieeefp.c
@@ -1,6 +1,6 @@
#include <ieeefp.h>
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
static void fssr(int value)
{
asm volatile ("fssr %0" :: "r"(value));
@@ -21,7 +21,7 @@ fp_except fpgetmask(void)
fp_rnd fpgetround(void)
{
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
int rm = frsr() >> 5;
return rm == 0 ? FP_RN : rm == 1 ? FP_RZ : rm == 2 ? FP_RM : FP_RP;
#else
@@ -31,7 +31,7 @@ fp_rnd fpgetround(void)
fp_except fpgetsticky(void)
{
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
return frsr() & 0x1f;
#else
return 0;
@@ -45,7 +45,7 @@ fp_except fpsetmask(fp_except mask)
fp_rnd fpsetround(fp_rnd rnd_dir)
{
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
int fsr = frsr();
int rm = fsr >> 5;
int new_rm = rnd_dir == FP_RN ? 0 : rnd_dir == FP_RZ ? 1 : rnd_dir == FP_RM ? 2 : 3;
@@ -58,7 +58,7 @@ fp_rnd fpsetround(fp_rnd rnd_dir)
fp_except fpsetsticky(fp_except sticky)
{
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
int fsr = frsr();
fssr(sticky & 0x1f | fsr & ~0x1f);
return fsr & 0x1f;
diff --git a/newlib/newlib/libc/machine/riscv/setjmp.S b/newlib/newlib/libc/machine/riscv/setjmp.S
index 377435b..1ebab3b 100644
--- a/newlib/newlib/libc/machine/riscv/setjmp.S
+++ b/newlib/newlib/libc/machine/riscv/setjmp.S
@@ -8,6 +8,21 @@
# define SZREG 4
#endif
+#ifdef __riscv_flen
+/* For ABI uniformity, reserve 8 bytes for floats, even if double-precision
+ floating-point is not supported in hardware. */
+# define SZFREG 8
+# if __riscv_flen == 32
+# define FREG_L flw
+# define FREG_S fsw
+# elif __riscv_flen == 64
+# define FREG_L fld
+# define FREG_S fsd
+# else
+# error unsupported FLEN
+# endif
+#endif
+
/* int setjmp (jmp_buf); */
.globl setjmp
setjmp:
@@ -26,21 +41,21 @@ setjmp:
REG_S s11,12*SZREG(a0)
REG_S sp, 13*SZREG(a0)
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
frsr a3
- fsd fs0, 16*SZREG+ 0*8(a0)
- fsd fs1, 16*SZREG+ 1*8(a0)
- fsd fs2, 16*SZREG+ 2*8(a0)
- fsd fs3, 16*SZREG+ 3*8(a0)
- fsd fs4, 16*SZREG+ 4*8(a0)
- fsd fs5, 16*SZREG+ 5*8(a0)
- fsd fs6, 16*SZREG+ 6*8(a0)
- fsd fs7, 16*SZREG+ 7*8(a0)
- fsd fs8, 16*SZREG+ 8*8(a0)
- fsd fs9, 16*SZREG+ 9*8(a0)
- fsd fs10,16*SZREG+10*8(a0)
- fsd fs11,16*SZREG+11*8(a0)
+ FREG_S fs0, 16*SZREG+ 0*SZFREG(a0)
+ FREG_S fs1, 16*SZREG+ 1*SZFREG(a0)
+ FREG_S fs2, 16*SZREG+ 2*SZFREG(a0)
+ FREG_S fs3, 16*SZREG+ 3*SZFREG(a0)
+ FREG_S fs4, 16*SZREG+ 4*SZFREG(a0)
+ FREG_S fs5, 16*SZREG+ 5*SZFREG(a0)
+ FREG_S fs6, 16*SZREG+ 6*SZFREG(a0)
+ FREG_S fs7, 16*SZREG+ 7*SZFREG(a0)
+ FREG_S fs8, 16*SZREG+ 8*SZFREG(a0)
+ FREG_S fs9, 16*SZREG+ 9*SZFREG(a0)
+ FREG_S fs10,16*SZREG+10*SZFREG(a0)
+ FREG_S fs11,16*SZREG+11*SZFREG(a0)
REG_S a3, 15*SZREG(a0)
#endif
@@ -66,20 +81,21 @@ longjmp:
REG_L s11,12*SZREG(a0)
REG_L sp, 13*SZREG(a0)
-#ifdef __riscv_hard_float
+#ifdef __riscv_flen
REG_L a3, 15*SZREG(a0)
- fld fs0, 16*SZREG+ 0*8(a0)
- fld fs1, 16*SZREG+ 1*8(a0)
- fld fs2, 16*SZREG+ 2*8(a0)
- fld fs3, 16*SZREG+ 3*8(a0)
- fld fs4, 16*SZREG+ 4*8(a0)
- fld fs5, 16*SZREG+ 5*8(a0)
- fld fs6, 16*SZREG+ 6*8(a0)
- fld fs7, 16*SZREG+ 7*8(a0)
- fld fs8, 16*SZREG+ 8*8(a0)
- fld fs9, 16*SZREG+ 9*8(a0)
- fld fs10,16*SZREG+10*8(a0)
+ FREG_L fs0, 16*SZREG+ 0*SZFREG(a0)
+ FREG_L fs1, 16*SZREG+ 1*SZFREG(a0)
+ FREG_L fs2, 16*SZREG+ 2*SZFREG(a0)
+ FREG_L fs3, 16*SZREG+ 3*SZFREG(a0)
+ FREG_L fs4, 16*SZREG+ 4*SZFREG(a0)
+ FREG_L fs5, 16*SZREG+ 5*SZFREG(a0)
+ FREG_L fs6, 16*SZREG+ 6*SZFREG(a0)
+ FREG_L fs7, 16*SZREG+ 7*SZFREG(a0)
+ FREG_L fs8, 16*SZREG+ 8*SZFREG(a0)
+ FREG_L fs9, 16*SZREG+ 9*SZFREG(a0)
+ FREG_L fs10,16*SZREG+10*SZFREG(a0)
+ FREG_L fs11,16*SZREG+11*SZFREG(a0)
fssr a3
#endif
diff --git a/riscv-binutils-gdb b/riscv-binutils-gdb
-Subproject 528c16fa0aca9cf62d7efe568f6854ae0f425bd
+Subproject b0946801b50b74d7b383b85e71173626d72847d
diff --git a/riscv-gcc b/riscv-gcc
-Subproject e90d8dc6f429856510a51371d21dacd97ef68d4
+Subproject 657f5609d0f4128aa56f6f0f8145295ae5ab386
diff --git a/riscv-glibc b/riscv-glibc
-Subproject 33c897d6839afcdf54a3a38a55642287fd1fbda
+Subproject 8b53d22b5670a4780e1e2a5ee4198c1cef37204
generated by cgit v1.1 at 2024-10-13 00:53:56 +0000