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authorKito Cheng <kito.cheng@sifive.com>2019-07-21 05:48:41 -0700
committerKito Cheng <kito.cheng@sifive.com>2019-07-21 05:50:45 -0700
commit9274462017e90f6722b701b09c155e71d12e4226 (patch)
tree033b6ab4af3c034980da82ba012a648f20238d24 /riscv-binutils
parent07f5d751f84a18c549a74358967c7ed346a48524 (diff)
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Bump binutils
binutils 2.32 with following patches: - Kito's 5-part patch set to improve .insn support. - RISC-V: Make objdump disassembly work right for binary files. - RISC-V: Enable lui relaxation for CODE and MERGE sections. - RISC-V: Fix lui argument parsing. - RISC-V: Enable 32-bit linux gdb core file support. - RISC-V: Don't check ABI flags if no code section. - RISC-V: Relax tail/j to c.j for RV64. - RISC-V: Fix linker crash in section symbol check. - RISC-V: Compress 3-operand beq/bne against x0.
Diffstat (limited to 'riscv-binutils')
m---------riscv-binutils0
1 files changed, 0 insertions, 0 deletions
diff --git a/riscv-binutils b/riscv-binutils
-Subproject a9d9a104dde6a749f40ce5c4576a0042a7d52d1
+Subproject 574195661adccf7a375ff7cce14a1dd11d932a0