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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-09 00:28:43 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-02-09 00:28:43 -0800 |
| commit | a821f580fcd6ae4302aa339c5a1cb9d73fbfe1d7 (patch) | |
| tree | c215905bee9b7344d41fd5afba3c1053f0de55f0 /gcc | |
| parent | b42877fb69993c30c6252f4d22dceaf7f96e7c59 (diff) | |
| download | riscv-gnu-toolchain-a821f580fcd6ae4302aa339c5a1cb9d73fbfe1d7.zip riscv-gnu-toolchain-a821f580fcd6ae4302aa339c5a1cb9d73fbfe1d7.tar.gz riscv-gnu-toolchain-a821f580fcd6ae4302aa339c5a1cb9d73fbfe1d7.tar.bz2 | |
libgcc: add __multi3 routine
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/libgcc/config/riscv/muldi3.S (renamed from gcc/libgcc/config/riscv/mul.S) | 0 | ||||
| -rw-r--r-- | gcc/libgcc/config/riscv/multi3.S | 56 | ||||
| -rw-r--r-- | gcc/libgcc/config/riscv/t-elf | 3 | ||||
| -rw-r--r-- | gcc/libgcc/config/riscv/t-elf32 | 2 | ||||
| -rw-r--r-- | gcc/libgcc/config/riscv/t-elf64 | 2 |
5 files changed, 62 insertions, 1 deletions
diff --git a/gcc/libgcc/config/riscv/mul.S b/gcc/libgcc/config/riscv/muldi3.S index f5061b9..f5061b9 100644 --- a/gcc/libgcc/config/riscv/mul.S +++ b/gcc/libgcc/config/riscv/muldi3.S diff --git a/gcc/libgcc/config/riscv/multi3.S b/gcc/libgcc/config/riscv/multi3.S new file mode 100644 index 0000000..849951e --- /dev/null +++ b/gcc/libgcc/config/riscv/multi3.S @@ -0,0 +1,56 @@ + .text + .align 2 + +#ifndef __riscv64 +/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines. */ +# define __multi3 __muldi3 +#endif + + .globl __multi3 +__multi3: + +#ifndef __riscv64 +/* Our RV64 64-bit routines are equivalent to our RV32 32-bit routines. */ +# define __muldi3 __mulsi3 +#endif + +/* We rely on the fact that __muldi3 doesn't clobber the t-registers. */ + + mv t0, ra + mv t5, a0 + mv a0, a1 + mv t6, a3 + mv a1, t5 + mv a4, a2 + li a5, 0 + li t2, 0 + li t4, 0 +.L1: + add a6, t2, a1 + andi t3, a4, 1 + slli a7, a5, 1 + slti t1, a1, 0 + srli a4, a4, 1 + add a5, t4, a5 + beqz t3, .L2 + sltu t3, a6, t2 + mv t2, a6 + add t4, t3, a5 +.L2: + slli a1, a1, 1 + or a5, t1, a7 + bnez a4, .L1 + beqz a0, .L3 + mv a1, a2 + call __muldi3 + add t4, t4, a0 +.L3: + beqz t6, .L4 + mv a1, t6 + mv a0, t5 + call __muldi3 + add t4, t4, a0 +.L4: + mv a0, t2 + mv a1, t4 + jr t0 diff --git a/gcc/libgcc/config/riscv/t-elf b/gcc/libgcc/config/riscv/t-elf index 7b5800f..0b88cdf 100644 --- a/gcc/libgcc/config/riscv/t-elf +++ b/gcc/libgcc/config/riscv/t-elf @@ -1,4 +1,5 @@ LIB2ADD += $(srcdir)/config/riscv/riscv-fp.c \ $(srcdir)/config/riscv/save-restore.S \ - $(srcdir)/config/riscv/mul.S \ + $(srcdir)/config/riscv/muldi3.S \ + $(srcdir)/config/riscv/multi3.S \ $(srcdir)/config/riscv/div.S diff --git a/gcc/libgcc/config/riscv/t-elf32 b/gcc/libgcc/config/riscv/t-elf32 index 3eed9ac..83363ce 100644 --- a/gcc/libgcc/config/riscv/t-elf32 +++ b/gcc/libgcc/config/riscv/t-elf32 @@ -1,2 +1,4 @@ +LIB2FUNCS_EXCLUDE += _divsi3 _modsi3 _udivsi3 _umodsi3 _mulsi3 _muldi3 + HOST_LIBGCC2_CFLAGS += -m32 CRTSTUFF_CFLAGS += -m32 diff --git a/gcc/libgcc/config/riscv/t-elf64 b/gcc/libgcc/config/riscv/t-elf64 new file mode 100644 index 0000000..9ba5301 --- /dev/null +++ b/gcc/libgcc/config/riscv/t-elf64 @@ -0,0 +1,2 @@ +LIB2FUNCS_EXCLUDE += _divdi3 _moddi3 _udivdi3 _umoddi3 _muldi3 _multi3 \ + _divsi3 _modsi3 _udivsi3 _umodsi3 \ |