From 5c613fe43d1bc44e6ae408b5356c7d60d93a1ca0 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Wed, 6 Jul 2016 03:24:33 -0700
Subject: Update to new PTE format

---
 v/vm.c | 20 +++++++++-----------
 1 file changed, 9 insertions(+), 11 deletions(-)

(limited to 'v')

diff --git a/v/vm.c b/v/vm.c
index 2524363..545e85e 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -100,8 +100,8 @@ static void evict(unsigned long addr)
   freelist_t* node = &user_mapping[addr/PGSIZE];
   if (node->addr)
   {
-    // check referenced and dirty bits
-    assert(user_l3pt[addr/PGSIZE] & PTE_R);
+    // check accessed and dirty bits
+    assert(user_l3pt[addr/PGSIZE] & PTE_A);
     if (memcmp((void*)addr, uva2kva(addr), PGSIZE)) {
       assert(user_l3pt[addr/PGSIZE] & PTE_D);
       memcpy((void*)addr, uva2kva(addr), PGSIZE);
@@ -130,7 +130,7 @@ void handle_fault(unsigned long addr)
   if (freelist_head == freelist_tail)
     freelist_tail = 0;
 
-  user_l3pt[addr/PGSIZE] = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_URWX_SRW;
+  user_l3pt[addr/PGSIZE] = (node->addr >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_U | PTE_R | PTE_W | PTE_X;
   asm volatile ("sfence.vm");
 
   assert(user_mapping[addr/PGSIZE].addr == 0);
@@ -151,8 +151,6 @@ void handle_trap(trapframe_t* tf)
 
     terminate(n);
   }
-  else if (tf->cause == CAUSE_FAULT_FETCH)
-    handle_fault(tf->epc);
   else if (tf->cause == CAUSE_ILLEGAL_INSTRUCTION)
   {
     assert(tf->epc % 4 == 0);
@@ -166,7 +164,7 @@ void handle_trap(trapframe_t* tf)
       assert(!"illegal instruction");
     tf->epc += 4;
   }
-  else if (tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE)
+  else if (tf->cause == CAUSE_FAULT_FETCH || tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE)
     handle_fault(tf->badvaddr);
   else
     assert(!"unexpected exception");
@@ -202,12 +200,12 @@ void vm_boot(long test_addr, long seed)
 #endif
   write_csr(sptbr, (uintptr_t)l1pt >> PGSHIFT);
   // map kernel to uppermost megapage
-  l1pt[PTES_PER_PT-1] = ((pte_t)kernel_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
+  l1pt[PTES_PER_PT-1] = ((pte_t)kernel_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V;
   // map user to lowermost megapage
-  l1pt[0] = ((pte_t)user_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
+  l1pt[0] = ((pte_t)user_l2pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V;
 #ifdef __riscv64
-  kernel_l2pt[PTES_PER_PT-1] = ((pte_t)kernel_l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
-  user_l2pt[0] = ((pte_t)user_l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_TABLE;
+  kernel_l2pt[PTES_PER_PT-1] = ((pte_t)kernel_l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V;
+  user_l2pt[0] = ((pte_t)user_l3pt >> PGSHIFT << PTE_PPN_SHIFT) | PTE_V;
 #endif
 
   // set up supervisor trap handling
@@ -232,7 +230,7 @@ void vm_boot(long test_addr, long seed)
     freelist_nodes[i].next = pa2kva(&freelist_nodes[i+1]);
     seed = LFSR_NEXT(seed);
 
-    kernel_l3pt[i] = ((i + DRAM_BASE/RISCV_PGSIZE) << PTE_PPN_SHIFT) | PTE_V | PTE_TYPE_SRWX;
+    kernel_l3pt[i] = ((i + DRAM_BASE/RISCV_PGSIZE) << PTE_PPN_SHIFT) | PTE_V | PTE_R | PTE_W | PTE_X;
   }
   freelist_nodes[MAX_TEST_PAGES-1].next = 0;
 
-- 
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