From 0bf56e2156ad5393ec2997e4f3dfba98778e8f1f Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sun, 20 Sep 2015 23:31:23 -0700 Subject: Remove Hwacha v3 support --- encoding.h | 1101 +++++++++++++++++++++++++++---------------------------- hwacha_xcpt.h | 21 -- p/riscv_test.h | 27 -- pt/riscv_test.h | 82 ----- v/entry.S | 28 +- v/riscv_test.h | 84 +---- v/vm.c | 68 ---- 7 files changed, 533 insertions(+), 878 deletions(-) delete mode 100644 hwacha_xcpt.h diff --git a/encoding.h b/encoding.h index f9f4bfb..b9d4c72 100644 --- a/encoding.h +++ b/encoding.h @@ -159,388 +159,398 @@ /* Automatically generated by parse-opcodes */ #ifndef RISCV_ENCODING_H #define RISCV_ENCODING_H -#define MATCH_ADD 0x33 -#define MASK_ADD 0xfe00707f +#define MATCH_BEQ 0x63 +#define MASK_BEQ 0x707f +#define MATCH_BNE 0x1063 +#define MASK_BNE 0x707f +#define MATCH_BLT 0x4063 +#define MASK_BLT 0x707f +#define MATCH_BGE 0x5063 +#define MASK_BGE 0x707f +#define MATCH_BLTU 0x6063 +#define MASK_BLTU 0x707f +#define MATCH_BGEU 0x7063 +#define MASK_BGEU 0x707f +#define MATCH_JALR 0x67 +#define MASK_JALR 0x707f +#define MATCH_JAL 0x6f +#define MASK_JAL 0x7f +#define MATCH_LUI 0x37 +#define MASK_LUI 0x7f +#define MATCH_AUIPC 0x17 +#define MASK_AUIPC 0x7f #define MATCH_ADDI 0x13 #define MASK_ADDI 0x707f +#define MATCH_SLLI 0x1013 +#define MASK_SLLI 0xfc00707f +#define MATCH_SLTI 0x2013 +#define MASK_SLTI 0x707f +#define MATCH_SLTIU 0x3013 +#define MASK_SLTIU 0x707f +#define MATCH_XORI 0x4013 +#define MASK_XORI 0x707f +#define MATCH_SRLI 0x5013 +#define MASK_SRLI 0xfc00707f +#define MATCH_SRAI 0x40005013 +#define MASK_SRAI 0xfc00707f +#define MATCH_ORI 0x6013 +#define MASK_ORI 0x707f +#define MATCH_ANDI 0x7013 +#define MASK_ANDI 0x707f +#define MATCH_ADD 0x33 +#define MASK_ADD 0xfe00707f +#define MATCH_SUB 0x40000033 +#define MASK_SUB 0xfe00707f +#define MATCH_SLL 0x1033 +#define MASK_SLL 0xfe00707f +#define MATCH_SLT 0x2033 +#define MASK_SLT 0xfe00707f +#define MATCH_SLTU 0x3033 +#define MASK_SLTU 0xfe00707f +#define MATCH_XOR 0x4033 +#define MASK_XOR 0xfe00707f +#define MATCH_SRL 0x5033 +#define MASK_SRL 0xfe00707f +#define MATCH_SRA 0x40005033 +#define MASK_SRA 0xfe00707f +#define MATCH_OR 0x6033 +#define MASK_OR 0xfe00707f +#define MATCH_AND 0x7033 +#define MASK_AND 0xfe00707f #define MATCH_ADDIW 0x1b #define MASK_ADDIW 0x707f +#define MATCH_SLLIW 0x101b +#define MASK_SLLIW 0xfe00707f +#define MATCH_SRLIW 0x501b +#define MASK_SRLIW 0xfe00707f +#define MATCH_SRAIW 0x4000501b +#define MASK_SRAIW 0xfe00707f #define MATCH_ADDW 0x3b #define MASK_ADDW 0xfe00707f -#define MATCH_AMOADD_D 0x302f -#define MASK_AMOADD_D 0xf800707f +#define MATCH_SUBW 0x4000003b +#define MASK_SUBW 0xfe00707f +#define MATCH_SLLW 0x103b +#define MASK_SLLW 0xfe00707f +#define MATCH_SRLW 0x503b +#define MASK_SRLW 0xfe00707f +#define MATCH_SRAW 0x4000503b +#define MASK_SRAW 0xfe00707f +#define MATCH_LB 0x3 +#define MASK_LB 0x707f +#define MATCH_LH 0x1003 +#define MASK_LH 0x707f +#define MATCH_LW 0x2003 +#define MASK_LW 0x707f +#define MATCH_LD 0x3003 +#define MASK_LD 0x707f +#define MATCH_LBU 0x4003 +#define MASK_LBU 0x707f +#define MATCH_LHU 0x5003 +#define MASK_LHU 0x707f +#define MATCH_LWU 0x6003 +#define MASK_LWU 0x707f +#define MATCH_SB 0x23 +#define MASK_SB 0x707f +#define MATCH_SH 0x1023 +#define MASK_SH 0x707f +#define MATCH_SW 0x2023 +#define MASK_SW 0x707f +#define MATCH_SD 0x3023 +#define MASK_SD 0x707f +#define MATCH_FENCE 0xf +#define MASK_FENCE 0x707f +#define MATCH_FENCE_I 0x100f +#define MASK_FENCE_I 0x707f +#define MATCH_MUL 0x2000033 +#define MASK_MUL 0xfe00707f +#define MATCH_MULH 0x2001033 +#define MASK_MULH 0xfe00707f +#define MATCH_MULHSU 0x2002033 +#define MASK_MULHSU 0xfe00707f +#define MATCH_MULHU 0x2003033 +#define MASK_MULHU 0xfe00707f +#define MATCH_DIV 0x2004033 +#define MASK_DIV 0xfe00707f +#define MATCH_DIVU 0x2005033 +#define MASK_DIVU 0xfe00707f +#define MATCH_REM 0x2006033 +#define MASK_REM 0xfe00707f +#define MATCH_REMU 0x2007033 +#define MASK_REMU 0xfe00707f +#define MATCH_MULW 0x200003b +#define MASK_MULW 0xfe00707f +#define MATCH_DIVW 0x200403b +#define MASK_DIVW 0xfe00707f +#define MATCH_DIVUW 0x200503b +#define MASK_DIVUW 0xfe00707f +#define MATCH_REMW 0x200603b +#define MASK_REMW 0xfe00707f +#define MATCH_REMUW 0x200703b +#define MASK_REMUW 0xfe00707f #define MATCH_AMOADD_W 0x202f #define MASK_AMOADD_W 0xf800707f -#define MATCH_AMOAND_D 0x6000302f -#define MASK_AMOAND_D 0xf800707f +#define MATCH_AMOXOR_W 0x2000202f +#define MASK_AMOXOR_W 0xf800707f +#define MATCH_AMOOR_W 0x4000202f +#define MASK_AMOOR_W 0xf800707f #define MATCH_AMOAND_W 0x6000202f #define MASK_AMOAND_W 0xf800707f -#define MATCH_AMOMAX_D 0xa000302f -#define MASK_AMOMAX_D 0xf800707f +#define MATCH_AMOMIN_W 0x8000202f +#define MASK_AMOMIN_W 0xf800707f #define MATCH_AMOMAX_W 0xa000202f #define MASK_AMOMAX_W 0xf800707f -#define MATCH_AMOMAXU_D 0xe000302f -#define MASK_AMOMAXU_D 0xf800707f +#define MATCH_AMOMINU_W 0xc000202f +#define MASK_AMOMINU_W 0xf800707f #define MATCH_AMOMAXU_W 0xe000202f #define MASK_AMOMAXU_W 0xf800707f +#define MATCH_AMOSWAP_W 0x800202f +#define MASK_AMOSWAP_W 0xf800707f +#define MATCH_LR_W 0x1000202f +#define MASK_LR_W 0xf9f0707f +#define MATCH_SC_W 0x1800202f +#define MASK_SC_W 0xf800707f +#define MATCH_AMOADD_D 0x302f +#define MASK_AMOADD_D 0xf800707f +#define MATCH_AMOXOR_D 0x2000302f +#define MASK_AMOXOR_D 0xf800707f +#define MATCH_AMOOR_D 0x4000302f +#define MASK_AMOOR_D 0xf800707f +#define MATCH_AMOAND_D 0x6000302f +#define MASK_AMOAND_D 0xf800707f #define MATCH_AMOMIN_D 0x8000302f #define MASK_AMOMIN_D 0xf800707f -#define MATCH_AMOMIN_W 0x8000202f -#define MASK_AMOMIN_W 0xf800707f +#define MATCH_AMOMAX_D 0xa000302f +#define MASK_AMOMAX_D 0xf800707f #define MATCH_AMOMINU_D 0xc000302f #define MASK_AMOMINU_D 0xf800707f -#define MATCH_AMOMINU_W 0xc000202f -#define MASK_AMOMINU_W 0xf800707f -#define MATCH_AMOOR_D 0x4000302f -#define MASK_AMOOR_D 0xf800707f -#define MATCH_AMOOR_W 0x4000202f -#define MASK_AMOOR_W 0xf800707f +#define MATCH_AMOMAXU_D 0xe000302f +#define MASK_AMOMAXU_D 0xf800707f #define MATCH_AMOSWAP_D 0x800302f #define MASK_AMOSWAP_D 0xf800707f -#define MATCH_AMOSWAP_W 0x800202f -#define MASK_AMOSWAP_W 0xf800707f -#define MATCH_AMOXOR_D 0x2000302f -#define MASK_AMOXOR_D 0xf800707f -#define MATCH_AMOXOR_W 0x2000202f -#define MASK_AMOXOR_W 0xf800707f -#define MATCH_AND 0x7033 -#define MASK_AND 0xfe00707f -#define MATCH_ANDI 0x7013 -#define MASK_ANDI 0x707f -#define MATCH_AUIPC 0x17 -#define MASK_AUIPC 0x7f -#define MATCH_BEQ 0x63 -#define MASK_BEQ 0x707f -#define MATCH_BGE 0x5063 -#define MASK_BGE 0x707f -#define MATCH_BGEU 0x7063 -#define MASK_BGEU 0x707f -#define MATCH_BLT 0x4063 -#define MASK_BLT 0x707f -#define MATCH_BLTU 0x6063 -#define MASK_BLTU 0x707f -#define MATCH_BNE 0x1063 -#define MASK_BNE 0x707f -#define MATCH_C_ADD 0x1000 -#define MASK_C_ADD 0xf003 -#define MATCH_C_ADD3 0xa000 -#define MASK_C_ADD3 0xe063 -#define MATCH_C_ADDI 0xc002 -#define MASK_C_ADDI 0xe003 -#define MATCH_C_ADDI4SPN 0xa001 -#define MASK_C_ADDI4SPN 0xe003 -#define MATCH_C_ADDIW 0xe002 -#define MASK_C_ADDIW 0xe003 -#define MATCH_C_ADDW 0x9000 -#define MASK_C_ADDW 0xf003 -#define MATCH_C_AND3 0xa060 -#define MASK_C_AND3 0xe063 -#define MATCH_C_BEQZ 0x4002 -#define MASK_C_BEQZ 0xe003 -#define MATCH_C_BNEZ 0x6002 -#define MASK_C_BNEZ 0xe003 -#define MATCH_C_J 0x2 -#define MASK_C_J 0xe003 -#define MATCH_C_JAL 0x2002 -#define MASK_C_JAL 0xe003 -#define MATCH_C_LD 0xe000 -#define MASK_C_LD 0xe003 -#define MATCH_C_LDSP 0xe001 -#define MASK_C_LDSP 0xe003 -#define MATCH_C_LI 0x8002 -#define MASK_C_LI 0xe003 -#define MATCH_C_LUI 0xa002 -#define MASK_C_LUI 0xe003 -#define MATCH_C_LW 0xc000 -#define MASK_C_LW 0xe003 -#define MATCH_C_LWSP 0xc001 -#define MASK_C_LWSP 0xe003 -#define MATCH_C_MV 0x0 -#define MASK_C_MV 0xf003 -#define MATCH_C_OR3 0xa040 -#define MASK_C_OR3 0xe063 -#define MATCH_C_SD 0x6000 -#define MASK_C_SD 0xe003 -#define MATCH_C_SDSP 0x6001 -#define MASK_C_SDSP 0xe003 -#define MATCH_C_SLLI 0x1 -#define MASK_C_SLLI 0xe003 -#define MATCH_C_SLLIW 0x8001 -#define MASK_C_SLLIW 0xe003 -#define MATCH_C_SRAI 0x2000 -#define MASK_C_SRAI 0xe003 -#define MATCH_C_SRLI 0x2001 -#define MASK_C_SRLI 0xe003 -#define MATCH_C_SUB 0x8000 -#define MASK_C_SUB 0xf003 -#define MATCH_C_SUB3 0xa020 -#define MASK_C_SUB3 0xe063 -#define MATCH_C_SW 0x4000 -#define MASK_C_SW 0xe003 -#define MATCH_C_SWSP 0x4001 -#define MASK_C_SWSP 0xe003 -#define MATCH_CSRRC 0x3073 -#define MASK_CSRRC 0x707f -#define MATCH_CSRRCI 0x7073 -#define MASK_CSRRCI 0x707f +#define MATCH_LR_D 0x1000302f +#define MASK_LR_D 0xf9f0707f +#define MATCH_SC_D 0x1800302f +#define MASK_SC_D 0xf800707f +#define MATCH_SCALL 0x73 +#define MASK_SCALL 0xffffffff +#define MATCH_SBREAK 0x100073 +#define MASK_SBREAK 0xffffffff +#define MATCH_SRET 0x10000073 +#define MASK_SRET 0xffffffff +#define MATCH_SFENCE_VM 0x10100073 +#define MASK_SFENCE_VM 0xfff07fff +#define MATCH_WFI 0x10200073 +#define MASK_WFI 0xffffffff +#define MATCH_MRTH 0x30600073 +#define MASK_MRTH 0xffffffff +#define MATCH_MRTS 0x30500073 +#define MASK_MRTS 0xffffffff +#define MATCH_HRTS 0x20500073 +#define MASK_HRTS 0xffffffff +#define MATCH_CSRRW 0x1073 +#define MASK_CSRRW 0x707f #define MATCH_CSRRS 0x2073 #define MASK_CSRRS 0x707f -#define MATCH_CSRRSI 0x6073 -#define MASK_CSRRSI 0x707f -#define MATCH_CSRRW 0x1073 -#define MASK_CSRRW 0x707f +#define MATCH_CSRRC 0x3073 +#define MASK_CSRRC 0x707f #define MATCH_CSRRWI 0x5073 #define MASK_CSRRWI 0x707f -#define MATCH_DIV 0x2004033 -#define MASK_DIV 0xfe00707f -#define MATCH_DIVU 0x2005033 -#define MASK_DIVU 0xfe00707f -#define MATCH_DIVUW 0x200503b -#define MASK_DIVUW 0xfe00707f -#define MATCH_DIVW 0x200403b -#define MASK_DIVW 0xfe00707f -#define MATCH_FADD_D 0x2000053 -#define MASK_FADD_D 0xfe00007f +#define MATCH_CSRRSI 0x6073 +#define MASK_CSRRSI 0x707f +#define MATCH_CSRRCI 0x7073 +#define MASK_CSRRCI 0x707f #define MATCH_FADD_S 0x53 #define MASK_FADD_S 0xfe00007f -#define MATCH_FCLASS_D 0xe2001053 -#define MASK_FCLASS_D 0xfff0707f -#define MATCH_FCLASS_S 0xe0001053 -#define MASK_FCLASS_S 0xfff0707f -#define MATCH_FCVT_D_L 0xd2200053 -#define MASK_FCVT_D_L 0xfff0007f -#define MATCH_FCVT_D_LU 0xd2300053 -#define MASK_FCVT_D_LU 0xfff0007f +#define MATCH_FSUB_S 0x8000053 +#define MASK_FSUB_S 0xfe00007f +#define MATCH_FMUL_S 0x10000053 +#define MASK_FMUL_S 0xfe00007f +#define MATCH_FDIV_S 0x18000053 +#define MASK_FDIV_S 0xfe00007f +#define MATCH_FSGNJ_S 0x20000053 +#define MASK_FSGNJ_S 0xfe00707f +#define MATCH_FSGNJN_S 0x20001053 +#define MASK_FSGNJN_S 0xfe00707f +#define MATCH_FSGNJX_S 0x20002053 +#define MASK_FSGNJX_S 0xfe00707f +#define MATCH_FMIN_S 0x28000053 +#define MASK_FMIN_S 0xfe00707f +#define MATCH_FMAX_S 0x28001053 +#define MASK_FMAX_S 0xfe00707f +#define MATCH_FSQRT_S 0x58000053 +#define MASK_FSQRT_S 0xfff0007f +#define MATCH_FADD_D 0x2000053 +#define MASK_FADD_D 0xfe00007f +#define MATCH_FSUB_D 0xa000053 +#define MASK_FSUB_D 0xfe00007f +#define MATCH_FMUL_D 0x12000053 +#define MASK_FMUL_D 0xfe00007f +#define MATCH_FDIV_D 0x1a000053 +#define MASK_FDIV_D 0xfe00007f +#define MATCH_FSGNJ_D 0x22000053 +#define MASK_FSGNJ_D 0xfe00707f +#define MATCH_FSGNJN_D 0x22001053 +#define MASK_FSGNJN_D 0xfe00707f +#define MATCH_FSGNJX_D 0x22002053 +#define MASK_FSGNJX_D 0xfe00707f +#define MATCH_FMIN_D 0x2a000053 +#define MASK_FMIN_D 0xfe00707f +#define MATCH_FMAX_D 0x2a001053 +#define MASK_FMAX_D 0xfe00707f +#define MATCH_FCVT_S_D 0x40100053 +#define MASK_FCVT_S_D 0xfff0007f #define MATCH_FCVT_D_S 0x42000053 #define MASK_FCVT_D_S 0xfff0007f -#define MATCH_FCVT_D_W 0xd2000053 -#define MASK_FCVT_D_W 0xfff0007f -#define MATCH_FCVT_D_WU 0xd2100053 -#define MASK_FCVT_D_WU 0xfff0007f -#define MATCH_FCVT_L_D 0xc2200053 -#define MASK_FCVT_L_D 0xfff0007f +#define MATCH_FSQRT_D 0x5a000053 +#define MASK_FSQRT_D 0xfff0007f +#define MATCH_FLE_S 0xa0000053 +#define MASK_FLE_S 0xfe00707f +#define MATCH_FLT_S 0xa0001053 +#define MASK_FLT_S 0xfe00707f +#define MATCH_FEQ_S 0xa0002053 +#define MASK_FEQ_S 0xfe00707f +#define MATCH_FLE_D 0xa2000053 +#define MASK_FLE_D 0xfe00707f +#define MATCH_FLT_D 0xa2001053 +#define MASK_FLT_D 0xfe00707f +#define MATCH_FEQ_D 0xa2002053 +#define MASK_FEQ_D 0xfe00707f +#define MATCH_FCVT_W_S 0xc0000053 +#define MASK_FCVT_W_S 0xfff0007f +#define MATCH_FCVT_WU_S 0xc0100053 +#define MASK_FCVT_WU_S 0xfff0007f #define MATCH_FCVT_L_S 0xc0200053 #define MASK_FCVT_L_S 0xfff0007f -#define MATCH_FCVT_LU_D 0xc2300053 -#define MASK_FCVT_LU_D 0xfff0007f #define MATCH_FCVT_LU_S 0xc0300053 #define MASK_FCVT_LU_S 0xfff0007f -#define MATCH_FCVT_S_D 0x40100053 -#define MASK_FCVT_S_D 0xfff0007f -#define MATCH_FCVT_S_L 0xd0200053 -#define MASK_FCVT_S_L 0xfff0007f -#define MATCH_FCVT_S_LU 0xd0300053 -#define MASK_FCVT_S_LU 0xfff0007f -#define MATCH_FCVT_S_W 0xd0000053 -#define MASK_FCVT_S_W 0xfff0007f -#define MATCH_FCVT_S_WU 0xd0100053 -#define MASK_FCVT_S_WU 0xfff0007f +#define MATCH_FMV_X_S 0xe0000053 +#define MASK_FMV_X_S 0xfff0707f +#define MATCH_FCLASS_S 0xe0001053 +#define MASK_FCLASS_S 0xfff0707f #define MATCH_FCVT_W_D 0xc2000053 #define MASK_FCVT_W_D 0xfff0007f -#define MATCH_FCVT_W_S 0xc0000053 -#define MASK_FCVT_W_S 0xfff0007f #define MATCH_FCVT_WU_D 0xc2100053 #define MASK_FCVT_WU_D 0xfff0007f -#define MATCH_FCVT_WU_S 0xc0100053 -#define MASK_FCVT_WU_S 0xfff0007f -#define MATCH_FDIV_D 0x1a000053 -#define MASK_FDIV_D 0xfe00007f -#define MATCH_FDIV_S 0x18000053 -#define MASK_FDIV_S 0xfe00007f -#define MATCH_FENCE 0xf -#define MASK_FENCE 0x707f -#define MATCH_FENCE_I 0x100f -#define MASK_FENCE_I 0x707f -#define MATCH_FEQ_D 0xa2002053 -#define MASK_FEQ_D 0xfe00707f -#define MATCH_FEQ_S 0xa0002053 -#define MASK_FEQ_S 0xfe00707f -#define MATCH_FLD 0x3007 -#define MASK_FLD 0x707f -#define MATCH_FLE_D 0xa2000053 -#define MASK_FLE_D 0xfe00707f -#define MATCH_FLE_S 0xa0000053 -#define MASK_FLE_S 0xfe00707f -#define MATCH_FLT_D 0xa2001053 -#define MASK_FLT_D 0xfe00707f -#define MATCH_FLT_S 0xa0001053 -#define MASK_FLT_S 0xfe00707f +#define MATCH_FCVT_L_D 0xc2200053 +#define MASK_FCVT_L_D 0xfff0007f +#define MATCH_FCVT_LU_D 0xc2300053 +#define MASK_FCVT_LU_D 0xfff0007f +#define MATCH_FMV_X_D 0xe2000053 +#define MASK_FMV_X_D 0xfff0707f +#define MATCH_FCLASS_D 0xe2001053 +#define MASK_FCLASS_D 0xfff0707f +#define MATCH_FCVT_S_W 0xd0000053 +#define MASK_FCVT_S_W 0xfff0007f +#define MATCH_FCVT_S_WU 0xd0100053 +#define MASK_FCVT_S_WU 0xfff0007f +#define MATCH_FCVT_S_L 0xd0200053 +#define MASK_FCVT_S_L 0xfff0007f +#define MATCH_FCVT_S_LU 0xd0300053 +#define MASK_FCVT_S_LU 0xfff0007f +#define MATCH_FMV_S_X 0xf0000053 +#define MASK_FMV_S_X 0xfff0707f +#define MATCH_FCVT_D_W 0xd2000053 +#define MASK_FCVT_D_W 0xfff0007f +#define MATCH_FCVT_D_WU 0xd2100053 +#define MASK_FCVT_D_WU 0xfff0007f +#define MATCH_FCVT_D_L 0xd2200053 +#define MASK_FCVT_D_L 0xfff0007f +#define MATCH_FCVT_D_LU 0xd2300053 +#define MASK_FCVT_D_LU 0xfff0007f +#define MATCH_FMV_D_X 0xf2000053 +#define MASK_FMV_D_X 0xfff0707f #define MATCH_FLW 0x2007 #define MASK_FLW 0x707f -#define MATCH_FMADD_D 0x2000043 -#define MASK_FMADD_D 0x600007f +#define MATCH_FLD 0x3007 +#define MASK_FLD 0x707f +#define MATCH_FSW 0x2027 +#define MASK_FSW 0x707f +#define MATCH_FSD 0x3027 +#define MASK_FSD 0x707f #define MATCH_FMADD_S 0x43 #define MASK_FMADD_S 0x600007f -#define MATCH_FMAX_D 0x2a001053 -#define MASK_FMAX_D 0xfe00707f -#define MATCH_FMAX_S 0x28001053 -#define MASK_FMAX_S 0xfe00707f -#define MATCH_FMIN_D 0x2a000053 -#define MASK_FMIN_D 0xfe00707f -#define MATCH_FMIN_S 0x28000053 -#define MASK_FMIN_S 0xfe00707f -#define MATCH_FMSUB_D 0x2000047 -#define MASK_FMSUB_D 0x600007f #define MATCH_FMSUB_S 0x47 #define MASK_FMSUB_S 0x600007f -#define MATCH_FMUL_D 0x12000053 -#define MASK_FMUL_D 0xfe00007f -#define MATCH_FMUL_S 0x10000053 -#define MASK_FMUL_S 0xfe00007f -#define MATCH_FMV_D_X 0xf2000053 -#define MASK_FMV_D_X 0xfff0707f -#define MATCH_FMV_S_X 0xf0000053 -#define MASK_FMV_S_X 0xfff0707f -#define MATCH_FMV_X_D 0xe2000053 -#define MASK_FMV_X_D 0xfff0707f -#define MATCH_FMV_X_S 0xe0000053 -#define MASK_FMV_X_S 0xfff0707f -#define MATCH_FNMADD_D 0x200004f -#define MASK_FNMADD_D 0x600007f +#define MATCH_FNMSUB_S 0x4b +#define MASK_FNMSUB_S 0x600007f #define MATCH_FNMADD_S 0x4f #define MASK_FNMADD_S 0x600007f +#define MATCH_FMADD_D 0x2000043 +#define MASK_FMADD_D 0x600007f +#define MATCH_FMSUB_D 0x2000047 +#define MASK_FMSUB_D 0x600007f #define MATCH_FNMSUB_D 0x200004b #define MASK_FNMSUB_D 0x600007f -#define MATCH_FNMSUB_S 0x4b -#define MASK_FNMSUB_S 0x600007f -#define MATCH_FSD 0x3027 -#define MASK_FSD 0x707f -#define MATCH_FSGNJ_D 0x22000053 -#define MASK_FSGNJ_D 0xfe00707f -#define MATCH_FSGNJ_S 0x20000053 -#define MASK_FSGNJ_S 0xfe00707f -#define MATCH_FSGNJN_D 0x22001053 -#define MASK_FSGNJN_D 0xfe00707f -#define MATCH_FSGNJN_S 0x20001053 -#define MASK_FSGNJN_S 0xfe00707f -#define MATCH_FSGNJX_D 0x22002053 -#define MASK_FSGNJX_D 0xfe00707f -#define MATCH_FSGNJX_S 0x20002053 -#define MASK_FSGNJX_S 0xfe00707f -#define MATCH_FSQRT_D 0x5a000053 -#define MASK_FSQRT_D 0xfff0007f -#define MATCH_FSQRT_S 0x58000053 -#define MASK_FSQRT_S 0xfff0007f -#define MATCH_FSUB_D 0xa000053 -#define MASK_FSUB_D 0xfe00007f -#define MATCH_FSUB_S 0x8000053 -#define MASK_FSUB_S 0xfe00007f -#define MATCH_FSW 0x2027 -#define MASK_FSW 0x707f -#define MATCH_HRTS 0x20500073 -#define MASK_HRTS 0xffffffff -#define MATCH_JAL 0x6f -#define MASK_JAL 0x7f -#define MATCH_JALR 0x67 -#define MASK_JALR 0x707f -#define MATCH_LB 0x3 -#define MASK_LB 0x707f -#define MATCH_LBU 0x4003 -#define MASK_LBU 0x707f -#define MATCH_LD 0x3003 -#define MASK_LD 0x707f -#define MATCH_LH 0x1003 -#define MASK_LH 0x707f -#define MATCH_LHU 0x5003 -#define MASK_LHU 0x707f -#define MATCH_LR_D 0x1000302f -#define MASK_LR_D 0xf9f0707f -#define MATCH_LR_W 0x1000202f -#define MASK_LR_W 0xf9f0707f -#define MATCH_LUI 0x37 -#define MASK_LUI 0x7f -#define MATCH_LW 0x2003 -#define MASK_LW 0x707f -#define MATCH_LWU 0x6003 -#define MASK_LWU 0x707f -#define MATCH_MRTH 0x30600073 -#define MASK_MRTH 0xffffffff -#define MATCH_MRTS 0x30500073 -#define MASK_MRTS 0xffffffff -#define MATCH_MUL 0x2000033 -#define MASK_MUL 0xfe00707f -#define MATCH_MULH 0x2001033 -#define MASK_MULH 0xfe00707f -#define MATCH_MULHSU 0x2002033 -#define MASK_MULHSU 0xfe00707f -#define MATCH_MULHU 0x2003033 -#define MASK_MULHU 0xfe00707f -#define MATCH_MULW 0x200003b -#define MASK_MULW 0xfe00707f -#define MATCH_OR 0x6033 -#define MASK_OR 0xfe00707f -#define MATCH_ORI 0x6013 -#define MASK_ORI 0x707f -#define MATCH_REM 0x2006033 -#define MASK_REM 0xfe00707f -#define MATCH_REMU 0x2007033 -#define MASK_REMU 0xfe00707f -#define MATCH_REMUW 0x200703b -#define MASK_REMUW 0xfe00707f -#define MATCH_REMW 0x200603b -#define MASK_REMW 0xfe00707f -#define MATCH_SB 0x23 -#define MASK_SB 0x707f -#define MATCH_SBREAK 0x100073 -#define MASK_SBREAK 0xffffffff -#define MATCH_SC_D 0x1800302f -#define MASK_SC_D 0xf800707f -#define MATCH_SC_W 0x1800202f -#define MASK_SC_W 0xf800707f -#define MATCH_SCALL 0x73 -#define MASK_SCALL 0xffffffff -#define MATCH_SD 0x3023 -#define MASK_SD 0x707f -#define MATCH_SFENCE_VM 0x10100073 -#define MASK_SFENCE_VM 0xfff07fff -#define MATCH_SH 0x1023 -#define MASK_SH 0x707f -#define MATCH_SLL 0x1033 -#define MASK_SLL 0xfe00707f -#define MATCH_SLLI 0x1013 -#define MASK_SLLI 0xfc00707f -#define MATCH_SLLIW 0x101b -#define MASK_SLLIW 0xfe00707f -#define MATCH_SLLW 0x103b -#define MASK_SLLW 0xfe00707f -#define MATCH_SLT 0x2033 -#define MASK_SLT 0xfe00707f -#define MATCH_SLTI 0x2013 -#define MASK_SLTI 0x707f -#define MATCH_SLTIU 0x3013 -#define MASK_SLTIU 0x707f -#define MATCH_SLTU 0x3033 -#define MASK_SLTU 0xfe00707f -#define MATCH_SRA 0x40005033 -#define MASK_SRA 0xfe00707f -#define MATCH_SRAI 0x40005013 -#define MASK_SRAI 0xfc00707f -#define MATCH_SRAIW 0x4000501b -#define MASK_SRAIW 0xfe00707f -#define MATCH_SRAW 0x4000503b -#define MASK_SRAW 0xfe00707f -#define MATCH_SRET 0x10000073 -#define MASK_SRET 0xffffffff -#define MATCH_SRL 0x5033 -#define MASK_SRL 0xfe00707f -#define MATCH_SRLI 0x5013 -#define MASK_SRLI 0xfc00707f -#define MATCH_SRLIW 0x501b -#define MASK_SRLIW 0xfe00707f -#define MATCH_SRLW 0x503b -#define MASK_SRLW 0xfe00707f -#define MATCH_SUB 0x40000033 -#define MASK_SUB 0xfe00707f -#define MATCH_SUBW 0x4000003b -#define MASK_SUBW 0xfe00707f -#define MATCH_SW 0x2023 -#define MASK_SW 0x707f -#define MATCH_WFI 0x10200073 -#define MASK_WFI 0xffffffff -#define MATCH_XOR 0x4033 -#define MASK_XOR 0xfe00707f -#define MATCH_XORI 0x4013 -#define MASK_XORI 0x707f +#define MATCH_FNMADD_D 0x200004f +#define MASK_FNMADD_D 0x600007f +#define MATCH_C_JR 0x0 +#define MASK_C_JR 0xf07f +#define MATCH_C_JALR 0x1000 +#define MASK_C_JALR 0xf07f +#define MATCH_C_EBREAK 0x1000 +#define MASK_C_EBREAK 0xffff +#define MATCH_C_ADDI16SP 0xa002 +#define MASK_C_ADDI16SP 0xef83 +#define MATCH_C_NOP 0xc002 +#define MASK_C_NOP 0xffff +#define MATCH_C_SD 0x6000 +#define MASK_C_SD 0xe003 +#define MATCH_C_LD 0xe000 +#define MASK_C_LD 0xe003 +#define MATCH_C_SDSP 0x6001 +#define MASK_C_SDSP 0xe003 +#define MATCH_C_LDSP 0xe001 +#define MASK_C_LDSP 0xe003 +#define MATCH_C_MV 0x0 +#define MASK_C_MV 0xf003 +#define MATCH_C_ADD 0x1000 +#define MASK_C_ADD 0xf003 +#define MATCH_C_FSD 0x2000 +#define MASK_C_FSD 0xe003 +#define MATCH_C_SW 0x4000 +#define MASK_C_SW 0xe003 +#define MATCH_C_FSW 0x6000 +#define MASK_C_FSW 0xe003 +#define MATCH_C_ADDI4SPN 0x8000 +#define MASK_C_ADDI4SPN 0xe003 +#define MATCH_C_FLD 0xa000 +#define MASK_C_FLD 0xe003 +#define MATCH_C_LW 0xc000 +#define MASK_C_LW 0xe003 +#define MATCH_C_FLW 0xe000 +#define MASK_C_FLW 0xe003 +#define MATCH_C_SLLI 0x1 +#define MASK_C_SLLI 0xe003 +#define MATCH_C_FSDSP 0x2001 +#define MASK_C_FSDSP 0xe003 +#define MATCH_C_SWSP 0x4001 +#define MASK_C_SWSP 0xe003 +#define MATCH_C_FSWSP 0x6001 +#define MASK_C_FSWSP 0xe003 +#define MATCH_C_ADDW 0x8001 +#define MASK_C_ADDW 0xf003 +#define MATCH_C_FLDSP 0xa001 +#define MASK_C_FLDSP 0xe003 +#define MATCH_C_LWSP 0xc001 +#define MASK_C_LWSP 0xe003 +#define MATCH_C_FLWSP 0xe001 +#define MASK_C_FLWSP 0xe003 +#define MATCH_C_J 0x2 +#define MASK_C_J 0xe003 +#define MATCH_C_JAL 0x2002 +#define MASK_C_JAL 0xe003 +#define MATCH_C_BEQZ 0x4002 +#define MASK_C_BEQZ 0xe003 +#define MATCH_C_BNEZ 0x6002 +#define MASK_C_BNEZ 0xe003 +#define MATCH_C_LI 0x8002 +#define MASK_C_LI 0xe003 +#define MATCH_C_LUI 0xa002 +#define MASK_C_LUI 0xe003 +#define MATCH_C_ADDI 0xc002 +#define MASK_C_ADDI 0xe003 +#define MATCH_C_ADDIW 0xe002 +#define MASK_C_ADDIW 0xe003 #define CSR_FFLAGS 0x1 #define CSR_FRM 0x2 #define CSR_FCSR 0x3 @@ -621,197 +631,202 @@ #define CAUSE_MACHINE_ECALL 0xb #endif #ifdef DECLARE_INSN -DECLARE_INSN(add, MATCH_ADD, MASK_ADD) +DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ) +DECLARE_INSN(bne, MATCH_BNE, MASK_BNE) +DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) +DECLARE_INSN(bge, MATCH_BGE, MASK_BGE) +DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) +DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU) +DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR) +DECLARE_INSN(jal, MATCH_JAL, MASK_JAL) +DECLARE_INSN(lui, MATCH_LUI, MASK_LUI) +DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC) DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI) +DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI) +DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) +DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) +DECLARE_INSN(xori, MATCH_XORI, MASK_XORI) +DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) +DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) +DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) +DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI) +DECLARE_INSN(add, MATCH_ADD, MASK_ADD) +DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) +DECLARE_INSN(sll, MATCH_SLL, MASK_SLL) +DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) +DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU) +DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) +DECLARE_INSN(srl, MATCH_SRL, MASK_SRL) +DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) +DECLARE_INSN(or, MATCH_OR, MASK_OR) +DECLARE_INSN(and, MATCH_AND, MASK_AND) DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW) +DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) +DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) +DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW) DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW) -DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D) +DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) +DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW) +DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) +DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW) +DECLARE_INSN(lb, MATCH_LB, MASK_LB) +DECLARE_INSN(lh, MATCH_LH, MASK_LH) +DECLARE_INSN(lw, MATCH_LW, MASK_LW) +DECLARE_INSN(ld, MATCH_LD, MASK_LD) +DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU) +DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU) +DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU) +DECLARE_INSN(sb, MATCH_SB, MASK_SB) +DECLARE_INSN(sh, MATCH_SH, MASK_SH) +DECLARE_INSN(sw, MATCH_SW, MASK_SW) +DECLARE_INSN(sd, MATCH_SD, MASK_SD) +DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE) +DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I) +DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) +DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) +DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) +DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) +DECLARE_INSN(div, MATCH_DIV, MASK_DIV) +DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU) +DECLARE_INSN(rem, MATCH_REM, MASK_REM) +DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) +DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) +DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW) +DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW) +DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) +DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W) -DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D) +DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) +DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W) -DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) +DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W) DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W) -DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D) +DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W) DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W) +DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W) +DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W) +DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) +DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D) +DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D) +DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D) +DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D) DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D) -DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W) +DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D) DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D) -DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W) -DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D) -DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W) +DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D) DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D) -DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W) -DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D) -DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W) -DECLARE_INSN(and, MATCH_AND, MASK_AND) -DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI) -DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC) -DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ) -DECLARE_INSN(bge, MATCH_BGE, MASK_BGE) -DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU) -DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) -DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU) -DECLARE_INSN(bne, MATCH_BNE, MASK_BNE) -DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD) -DECLARE_INSN(c_add3, MATCH_C_ADD3, MASK_C_ADD3) -DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI) -DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN) -DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) -DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW) -DECLARE_INSN(c_and3, MATCH_C_AND3, MASK_C_AND3) -DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) -DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) -DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J) -DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL) -DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD) -DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) -DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI) -DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI) -DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW) -DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP) -DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV) -DECLARE_INSN(c_or3, MATCH_C_OR3, MASK_C_OR3) -DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD) -DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) -DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI) -DECLARE_INSN(c_slliw, MATCH_C_SLLIW, MASK_C_SLLIW) -DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI) -DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI) -DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB) -DECLARE_INSN(c_sub3, MATCH_C_SUB3, MASK_C_SUB3) -DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW) -DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP) -DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) -DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) -DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) -DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) +DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D) +DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) +DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) +DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK) +DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) +DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) +DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) +DECLARE_INSN(mrth, MATCH_MRTH, MASK_MRTH) +DECLARE_INSN(mrts, MATCH_MRTS, MASK_MRTS) +DECLARE_INSN(hrts, MATCH_HRTS, MASK_HRTS) DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) +DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) +DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI) -DECLARE_INSN(div, MATCH_DIV, MASK_DIV) -DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU) -DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW) -DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW) -DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D) +DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI) +DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI) DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S) -DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D) -DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) -DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) -DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU) +DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S) +DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S) +DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S) +DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S) +DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S) +DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S) +DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) +DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S) +DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S) +DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D) +DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D) +DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D) +DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D) +DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D) +DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) +DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D) +DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) +DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D) +DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D) DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S) -DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) -DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) -DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D) +DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D) +DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S) +DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S) +DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S) +DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D) +DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D) +DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D) +DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) +DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S) -DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D) DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S) -DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D) -DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) -DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) -DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) -DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) +DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) +DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D) -DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D) -DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) -DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D) -DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S) -DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE) -DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I) -DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D) -DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S) -DECLARE_INSN(fld, MATCH_FLD, MASK_FLD) -DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D) -DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S) -DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D) -DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S) +DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D) +DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D) +DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D) +DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D) +DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) +DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) +DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) +DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) +DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) +DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) +DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) +DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) +DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU) +DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X) DECLARE_INSN(flw, MATCH_FLW, MASK_FLW) -DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D) +DECLARE_INSN(fld, MATCH_FLD, MASK_FLD) +DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW) +DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD) DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S) -DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D) -DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S) -DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D) -DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S) -DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D) DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S) -DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D) -DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S) -DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X) -DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) -DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D) -DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) -DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D) +DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S) DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S) +DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D) +DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D) DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D) -DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S) -DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD) -DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D) -DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S) -DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D) -DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S) -DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D) -DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S) -DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D) -DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S) -DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D) -DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S) -DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW) -DECLARE_INSN(hrts, MATCH_HRTS, MASK_HRTS) -DECLARE_INSN(jal, MATCH_JAL, MASK_JAL) -DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR) -DECLARE_INSN(lb, MATCH_LB, MASK_LB) -DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU) -DECLARE_INSN(ld, MATCH_LD, MASK_LD) -DECLARE_INSN(lh, MATCH_LH, MASK_LH) -DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU) -DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D) -DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W) -DECLARE_INSN(lui, MATCH_LUI, MASK_LUI) -DECLARE_INSN(lw, MATCH_LW, MASK_LW) -DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU) -DECLARE_INSN(mrth, MATCH_MRTH, MASK_MRTH) -DECLARE_INSN(mrts, MATCH_MRTS, MASK_MRTS) -DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) -DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) -DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) -DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) -DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) -DECLARE_INSN(or, MATCH_OR, MASK_OR) -DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) -DECLARE_INSN(rem, MATCH_REM, MASK_REM) -DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) -DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) -DECLARE_INSN(remw, MATCH_REMW, MASK_REMW) -DECLARE_INSN(sb, MATCH_SB, MASK_SB) -DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK) -DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) -DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) -DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) -DECLARE_INSN(sd, MATCH_SD, MASK_SD) -DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) -DECLARE_INSN(sh, MATCH_SH, MASK_SH) -DECLARE_INSN(sll, MATCH_SLL, MASK_SLL) -DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI) -DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) -DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW) -DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) -DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) -DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) -DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU) -DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) -DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) -DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW) -DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW) -DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) -DECLARE_INSN(srl, MATCH_SRL, MASK_SRL) -DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) -DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) -DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) -DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) -DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) -DECLARE_INSN(sw, MATCH_SW, MASK_SW) -DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) -DECLARE_INSN(xor, MATCH_XOR, MASK_XOR) -DECLARE_INSN(xori, MATCH_XORI, MASK_XORI) +DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D) +DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR) +DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR) +DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK) +DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP) +DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP) +DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD) +DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD) +DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) +DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) +DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV) +DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD) +DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD) +DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW) +DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW) +DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN) +DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD) +DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW) +DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW) +DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI) +DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP) +DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP) +DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP) +DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW) +DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP) +DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP) +DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP) +DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J) +DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL) +DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) +DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) +DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI) +DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI) +DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI) +DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) #endif #ifdef DECLARE_CSR DECLARE_CSR(fflags, CSR_FFLAGS) @@ -882,70 +897,16 @@ DECLARE_CSR(mtimecmph, CSR_MTIMECMPH) DECLARE_CSR(mtimeh, CSR_MTIMEH) #endif #ifdef DECLARE_CAUSE -DECLARE_CAUSE("fflags", CAUSE_FFLAGS) -DECLARE_CAUSE("frm", CAUSE_FRM) -DECLARE_CAUSE("fcsr", CAUSE_FCSR) -DECLARE_CAUSE("cycle", CAUSE_CYCLE) -DECLARE_CAUSE("time", CAUSE_TIME) -DECLARE_CAUSE("instret", CAUSE_INSTRET) -DECLARE_CAUSE("stats", CAUSE_STATS) -DECLARE_CAUSE("uarch0", CAUSE_UARCH0) -DECLARE_CAUSE("uarch1", CAUSE_UARCH1) -DECLARE_CAUSE("uarch2", CAUSE_UARCH2) -DECLARE_CAUSE("uarch3", CAUSE_UARCH3) -DECLARE_CAUSE("uarch4", CAUSE_UARCH4) -DECLARE_CAUSE("uarch5", CAUSE_UARCH5) -DECLARE_CAUSE("uarch6", CAUSE_UARCH6) -DECLARE_CAUSE("uarch7", CAUSE_UARCH7) -DECLARE_CAUSE("uarch8", CAUSE_UARCH8) -DECLARE_CAUSE("uarch9", CAUSE_UARCH9) -DECLARE_CAUSE("uarch10", CAUSE_UARCH10) -DECLARE_CAUSE("uarch11", CAUSE_UARCH11) -DECLARE_CAUSE("uarch12", CAUSE_UARCH12) -DECLARE_CAUSE("uarch13", CAUSE_UARCH13) -DECLARE_CAUSE("uarch14", CAUSE_UARCH14) -DECLARE_CAUSE("uarch15", CAUSE_UARCH15) -DECLARE_CAUSE("sstatus", CAUSE_SSTATUS) -DECLARE_CAUSE("stvec", CAUSE_STVEC) -DECLARE_CAUSE("sie", CAUSE_SIE) -DECLARE_CAUSE("sscratch", CAUSE_SSCRATCH) -DECLARE_CAUSE("sepc", CAUSE_SEPC) -DECLARE_CAUSE("sip", CAUSE_SIP) -DECLARE_CAUSE("sptbr", CAUSE_SPTBR) -DECLARE_CAUSE("sasid", CAUSE_SASID) -DECLARE_CAUSE("cyclew", CAUSE_CYCLEW) -DECLARE_CAUSE("timew", CAUSE_TIMEW) -DECLARE_CAUSE("instretw", CAUSE_INSTRETW) -DECLARE_CAUSE("stime", CAUSE_STIME) -DECLARE_CAUSE("scause", CAUSE_SCAUSE) -DECLARE_CAUSE("sbadaddr", CAUSE_SBADADDR) -DECLARE_CAUSE("stimew", CAUSE_STIMEW) -DECLARE_CAUSE("mstatus", CAUSE_MSTATUS) -DECLARE_CAUSE("mtvec", CAUSE_MTVEC) -DECLARE_CAUSE("mtdeleg", CAUSE_MTDELEG) -DECLARE_CAUSE("mie", CAUSE_MIE) -DECLARE_CAUSE("mtimecmp", CAUSE_MTIMECMP) -DECLARE_CAUSE("mscratch", CAUSE_MSCRATCH) -DECLARE_CAUSE("mepc", CAUSE_MEPC) -DECLARE_CAUSE("mcause", CAUSE_MCAUSE) -DECLARE_CAUSE("mbadaddr", CAUSE_MBADADDR) -DECLARE_CAUSE("mip", CAUSE_MIP) -DECLARE_CAUSE("mtime", CAUSE_MTIME) -DECLARE_CAUSE("mcpuid", CAUSE_MCPUID) -DECLARE_CAUSE("mimpid", CAUSE_MIMPID) -DECLARE_CAUSE("mhartid", CAUSE_MHARTID) -DECLARE_CAUSE("mtohost", CAUSE_MTOHOST) -DECLARE_CAUSE("mfromhost", CAUSE_MFROMHOST) -DECLARE_CAUSE("mreset", CAUSE_MRESET) -DECLARE_CAUSE("send_ipi", CAUSE_SEND_IPI) -DECLARE_CAUSE("cycleh", CAUSE_CYCLEH) -DECLARE_CAUSE("timeh", CAUSE_TIMEH) -DECLARE_CAUSE("instreth", CAUSE_INSTRETH) -DECLARE_CAUSE("cyclehw", CAUSE_CYCLEHW) -DECLARE_CAUSE("timehw", CAUSE_TIMEHW) -DECLARE_CAUSE("instrethw", CAUSE_INSTRETHW) -DECLARE_CAUSE("stimeh", CAUSE_STIMEH) -DECLARE_CAUSE("stimehw", CAUSE_STIMEHW) -DECLARE_CAUSE("mtimecmph", CAUSE_MTIMECMPH) -DECLARE_CAUSE("mtimeh", CAUSE_MTIMEH) +DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH) +DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH) +DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION) +DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT) +DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD) +DECLARE_CAUSE("fault load", CAUSE_FAULT_LOAD) +DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE) +DECLARE_CAUSE("fault store", CAUSE_FAULT_STORE) +DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL) +DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL) +DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL) +DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL) #endif diff --git a/hwacha_xcpt.h b/hwacha_xcpt.h deleted file mode 100644 index 010a23f..0000000 --- a/hwacha_xcpt.h +++ /dev/null @@ -1,21 +0,0 @@ -// See LICENSE for license details. - -#ifndef _HWACHA_XCPT_H -#define _HWACHA_XCPT_H - -#include "encoding.h" - -#define HWACHA_CAUSE_ILLEGAL_CFG CAUSE_ILLEGAL_INSTRUCTION // AUX: 0=illegal nxpr, 1=illegal nfpr -#define HWACHA_CAUSE_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction -#define HWACHA_CAUSE_PRIVILEGED_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction -#define HWACHA_CAUSE_TVEC_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction -#define HWACHA_CAUSE_VF_MISALIGNED_FETCH CAUSE_MISALIGNED_FETCH // AUX: pc -#define HWACHA_CAUSE_VF_FAULT_FETCH CAUSE_FAULT_FETCH // AUX: pc -#define HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: pc -#define HWACHA_CAUSE_VF_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: pc -#define HWACHA_CAUSE_MISALIGNED_LOAD CAUSE_MISALIGNED_LOAD // AUX: badvaddr -#define HWACHA_CAUSE_MISALIGNED_STORE CAUSE_MISALIGNED_STORE // AUX: badvaddr -#define HWACHA_CAUSE_FAULT_LOAD CAUSE_FAULT_LOAD // AUX: badvaddr -#define HWACHA_CAUSE_FAULT_STORE CAUSE_FAULT_STORE // AUX: badvaddr - -#endif diff --git a/p/riscv_test.h b/p/riscv_test.h index 23d33b7..6e35b18 100644 --- a/p/riscv_test.h +++ b/p/riscv_test.h @@ -4,7 +4,6 @@ #define _ENV_PHYSICAL_SINGLE_CORE_H #include "../encoding.h" -#include "../hwacha_xcpt.h" //----------------------------------------------------------------------- // Begin Macro @@ -19,12 +18,6 @@ RVTEST_FP_ENABLE; \ .endm -#define RVTEST_RV64UV \ - .macro init; \ - RVTEST_FP_ENABLE; \ - RVTEST_VEC_ENABLE; \ - .endm - #define RVTEST_RV32U \ .macro init; \ .endm @@ -34,12 +27,6 @@ RVTEST_FP_ENABLE; \ .endm -#define RVTEST_RV32UV \ - .macro init; \ - RVTEST_FP_ENABLE; \ - RVTEST_VEC_ENABLE; \ - .endm - #define RVTEST_RV64M \ .macro init; \ RVTEST_ENABLE_MACHINE; \ @@ -53,7 +40,6 @@ #define RVTEST_RV64SV \ .macro init; \ RVTEST_ENABLE_SUPERVISOR; \ - RVTEST_VEC_ENABLE; \ .endm #define RVTEST_RV32M \ @@ -85,10 +71,6 @@ csrs mstatus, a0; \ csrwi fcsr, 0 -#define RVTEST_VEC_ENABLE \ - li a0, SSTATUS_XS & (SSTATUS_XS >> 1); \ - csrs sstatus, a0; \ - #define RISCV_MULTICORE_DISABLE \ csrr a0, mhartid; \ 1: bnez a0, 1b @@ -125,15 +107,6 @@ tvec_supervisor: \ csrr t5, mcause; \ bgez t5, tvec_user; \ mrts_routine: \ - li t5, MSTATUS_XS; \ - csrr t6, mstatus; \ - and t5, t5, t6; \ - beqz t5, skip_vector_cause_aux; \ - vxcptcause t5; \ - csrw mcause, t5; \ - vxcptaux t5; \ - csrw mbadaddr, t5; \ - skip_vector_cause_aux: \ mrts; \ .align 6; \ tvec_hypervisor: \ diff --git a/pt/riscv_test.h b/pt/riscv_test.h index 67d5ead..8137782 100644 --- a/pt/riscv_test.h +++ b/pt/riscv_test.h @@ -39,94 +39,12 @@ _interrupt_handler: \ srli a0, a0, 1; \ add a0, a0, -IRQ_TIMER; \ bnez a0, _skip; \ - srl a0, a0, XS_SHIFT; \ - andi a0, a0, 3; \ - beqz a0, _skip_vector_restore; \ - VECTOR_RESTORE; \ -_skip_vector_restore: \ csrr a0, mtime; \ addi a0, a0, TIMER_INTERVAL; \ csrw mtimecmp, a0; \ csrr a0, mscratch; \ eret; \ -#ifdef __riscv64 - -#define VECTOR_RESTORE \ -_vector_restore: \ - la a0,regspill; \ - sd a1,0(a0); \ - sd a2,8(a0); \ - sd a3,16(a0); \ - sd a4,24(a0); \ - sd a5,32(a0); \ - sd a6,40(a0); \ - sd a7,48(a0); \ - vgetcfg a6; \ - vgetvl a7; \ - la a0,evac; \ - vxcptevac a0; \ - vsetcfg a6; \ - vsetvl a7,a7; \ - vxcpthold a0; \ - li a5,0; \ -_handler_loop: \ - ld a1,0(a0); \ - addi a0,a0,8; \ - blt a1,x0,_done; \ - srli a2,a1,32; \ - andi a2,a2,0x1; \ - beq a2,x0,_vcnt; \ -_vcmd: \ - beq a5,x0,_vcmd_skip; \ - venqcmd a4,a3; \ -_vcmd_skip: \ - li a5,1; \ - move a4,a1; \ - srli a3,a4,36; \ - andi a3,a3,0x1; \ -_vimm1: \ - srli a2,a4,35; \ - andi a2,a2,0x1; \ - beq a2,x0,_vimm2; \ - ld a1,0(a0); \ - addi a0,a0,8; \ - venqimm1 a1,a3; \ -_vimm2: \ - srli a2,a4,34; \ - andi a2,a2,0x1; \ - beq a2,x0,_end; \ - ld a1,0(a0); \ - addi a0,a0,8; \ - venqimm2 a1,a3; \ - j _end; \ -_vcnt: \ - ld a2,0(a0); \ - srli a2,a2,31; \ - andi a2,a2,0x2; \ - or a3,a3,a2; \ - venqcnt a1,a3; \ -_end: \ - j _handler_loop; \ -_done: \ - beq a5,x0,_done_skip; \ - venqcmd a4,a3; \ -_done_skip: \ - la a0,regspill; \ - ld a1,0(a0); \ - ld a2,8(a0); \ - ld a3,16(a0); \ - ld a4,24(a0); \ - ld a5,32(a0); \ - ld a6,40(a0); \ - ld a7,48(a0); \ - -#else - -#define VECTOR_RESTORE - -#endif - //----------------------------------------------------------------------- // Data Section Macro //----------------------------------------------------------------------- diff --git a/v/entry.S b/v/entry.S index 8fa19f7..ea05e73 100644 --- a/v/entry.S +++ b/v/entry.S @@ -130,34 +130,8 @@ trap_entry: csrr t0,scause STORE t0,35*REGBYTES(sp) - # get hwacha cause if IRQ_COP - # vxcptcause clears hwacha interrupt bit - - bgez t0,1f - slli t0,t0,1 # clearing MSB of cause - srli t0,t0,1 # clearing MSB of cause - li t1,IRQ_COP - bne t0,t1,1f - vxcptcause t0 - STORE t0,36*REGBYTES(sp) -1: - move a0, sp - csrr t0, sstatus - li t1, SSTATUS_XS - and t0, t0, t1 - beqz t0, 2f - - # disable saving vector state for now - addi t0,sp,SIZEOF_TRAPFRAME_T_SCALAR - - vgetcfg x4 - STORE x4,0*REGBYTES(t0) - vgetvl x4 - STORE x4,1*REGBYTES(t0) - addi t0,t0,2*REGBYTES - vxcptevac t0 -2:j handle_trap + j handle_trap .global do_tohost do_tohost: diff --git a/v/riscv_test.h b/v/riscv_test.h index 1b38b5a..6734713 100644 --- a/v/riscv_test.h +++ b/v/riscv_test.h @@ -12,10 +12,6 @@ #undef RVTEST_FP_ENABLE #define RVTEST_FP_ENABLE fssr x0 -#undef RVTEST_RV64UV -#define RVTEST_RV64UV \ - RVTEST_RV64UF - #undef RVTEST_CODE_BEGIN #define RVTEST_CODE_BEGIN \ .text; \ @@ -48,92 +44,16 @@ userstart: \ // Supervisor mode definitions and macros //----------------------------------------------------------------------- -#define dword_bit_cmd(dw) ((dw >> 32) & 0x1) -#define dword_bit_cnt(dw) (!dword_bit_cmd(dw)) -#define dword_bit_imm1(dw) ((dw >> 35) & 0x1) -#define dword_bit_imm2(dw) ((dw >> 34) & 0x1) -#define dword_bit_pf(dw) ((dw >> 36) & 0x1) - -#define fence() ({ \ - asm volatile ("fence" ::: "memory"); }) - -#define vxcptkill() ({ \ - asm volatile ("vxcptkill"); }) - -#define vxcpthold(addr) ({ \ - asm volatile ("vxcpthold %0" : : "r"(addr)); }) - -#define venqcmd(bits, pf) ({ \ - asm volatile ("venqcmd %0,%1" : : "r"(bits), "r"(pf)); }) - -#define venqimm1(bits, pf) ({ \ - asm volatile ("venqimm1 %0,%1" : : "r"(bits), "r"(pf)); }) - -#define venqimm2(bits, pf) ({ \ - asm volatile ("venqimm2 %0,%1" : : "r"(bits), "r"(pf)); }) - -#define venqcnt(bits, pf) ({ \ - asm volatile ("venqcnt %0,%1" :: "r"(bits), "r"(pf)); }) - #define MAX_TEST_PAGES 63 // this must be the period of the LFSR below #define LFSR_NEXT(x) (((((x)^((x)>>1)) & 1) << 5) | ((x) >> 1)) #define PGSHIFT 12 #define PGSIZE (1UL << PGSHIFT) -#define SIZEOF_TRAPFRAME_T 20776 -#define SIZEOF_TRAPFRAME_T_SCALAR 296 +#define SIZEOF_TRAPFRAME_T 288 #ifndef __ASSEMBLER__ -static inline void vsetcfg(long cfg) -{ - asm volatile ("vsetcfg %0" : : "r"(cfg)); -} - -static inline void vsetvl(long vl) -{ - long __tmp; - asm volatile ("vsetvl %0,%1" : "=r"(__tmp) : "r"(vl)); -} - -static inline long vgetcfg() -{ - int cfg; - asm volatile ("vgetcfg %0" : "=r"(cfg) :); - return cfg; -} - -static inline long vgetvl() -{ - int vl; - asm volatile ("vgetvl %0" : "=r"(vl) :); -} - -static inline long vxcptaux() -{ - long aux; - asm volatile ("vxcptaux %0" : "=r"(aux) :); - return aux; -} - -static inline long vxcptcause() -{ - long cause; - asm volatile ("vxcptcause %0" : "=r"(cause) :); - return cause; -} - -static inline void vxcptrestore(long* mem) -{ - asm volatile("vxcptrestore %0" : : "r"(mem) : "memory"); -} - -static inline void vxcptevac(long* mem) -{ - asm volatile ("vxcptevac %0" : : "r"(mem)); -} - typedef unsigned long pte_t; #define LEVELS (sizeof(pte_t) == sizeof(uint64_t) ? 3 : 2) #define PTIDXBITS (PGSHIFT - (sizeof(pte_t) == 8 ? 3 : 2)) @@ -149,8 +69,6 @@ typedef struct long epc; long badvaddr; long cause; - long hwacha_cause; - long hwacha_opaque[2560]; } trapframe_t; #endif diff --git a/v/vm.c b/v/vm.c index 74abadd..7b5ba6c 100644 --- a/v/vm.c +++ b/v/vm.c @@ -115,59 +115,6 @@ void handle_fault(unsigned long addr) __builtin___clear_cache(0,0); } -static void do_vxcptrestore(long* where) -{ - vsetcfg(where[0]); - vsetvl(where[1]); - - vxcpthold(&where[2]); - - int idx = 2; - long dword, cmd, pf; - int first = 1; - - while (1) - { - dword = where[idx++]; - - if (dword < 0) break; - - if (dword_bit_cnt(dword)) - { - venqcnt(dword, pf | (dword_bit_cmd(where[idx]) << 1)); - } - else - { - if (!first) - { - venqcmd(cmd, pf); - } - - first = 0; - cmd = dword; - pf = dword_bit_pf(cmd); - - if (dword_bit_imm1(cmd)) - { - venqimm1(where[idx++], pf); - } - if (dword_bit_imm2(cmd)) - { - venqimm2(where[idx++], pf); - } - } - } - if (!first) - { - venqcmd(cmd, pf); - } -} - -static void restore_vector(trapframe_t* tf) -{ - do_vxcptrestore(tf->hwacha_opaque); -} - void handle_trap(trapframe_t* tf) { if (tf->cause == CAUSE_USER_ECALL) @@ -196,24 +143,9 @@ void handle_trap(trapframe_t* tf) } else if (tf->cause == CAUSE_FAULT_LOAD || tf->cause == CAUSE_FAULT_STORE) handle_fault(tf->badvaddr); - else if ((long)tf->cause < 0 && (uint8_t)tf->cause == IRQ_COP) - { - if (tf->hwacha_cause == HWACHA_CAUSE_VF_FAULT_FETCH || - tf->hwacha_cause == HWACHA_CAUSE_FAULT_LOAD || - tf->hwacha_cause == HWACHA_CAUSE_FAULT_STORE) - { - long badvaddr = vxcptaux(); - handle_fault(badvaddr); - } - else - assert(!"unexpected interrupt"); - } else assert(!"unexpected exception"); -out: - if (!(tf->sr & SSTATUS_PS) && (tf->sr & SSTATUS_XS)) - restore_vector(tf); pop_tf(tf); } -- cgit v1.1