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author | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:25:57 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2017-03-27 14:25:57 -0700 |
commit | 47fef2b463a484f3dafe979ec4e646990460dece (patch) | |
tree | 46970854a543edee82310eb0e2d55dab07edade3 /p/riscv_test.h | |
parent | 3dc64058de56fbac3b793e20707739f0b985303c (diff) | |
download | env-47fef2b463a484f3dafe979ec4e646990460dece.zip env-47fef2b463a484f3dafe979ec4e646990460dece.tar.gz env-47fef2b463a484f3dafe979ec4e646990460dece.tar.bz2 |
Separate page faults from physical memory access exceptions
Diffstat (limited to 'p/riscv_test.h')
-rw-r--r-- | p/riscv_test.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/p/riscv_test.h b/p/riscv_test.h index 9ed6ebc..708bc4d 100644 --- a/p/riscv_test.h +++ b/p/riscv_test.h @@ -153,9 +153,9 @@ reset_vector: \ la t0, stvec_handler; \ beqz t0, 1f; \ csrw stvec, t0; \ - li t0, (1 << CAUSE_FAULT_LOAD) | \ - (1 << CAUSE_FAULT_STORE) | \ - (1 << CAUSE_FAULT_FETCH) | \ + li t0, (1 << CAUSE_LOAD_PAGE_FAULT) | \ + (1 << CAUSE_STORE_PAGE_FAULT) | \ + (1 << CAUSE_FETCH_PAGE_FAULT) | \ (1 << CAUSE_MISALIGNED_FETCH) | \ (1 << CAUSE_USER_ECALL) | \ (1 << CAUSE_BREAKPOINT); \ |