Fix multicore VM tests

- give harts distinct stacks
- correct the address range used by coherence_torture

3 files changed, 5 insertions, 8 deletions

diff --git a/encoding.h b/encoding.h
index 5cb7ff5..5405148 100644
--- a/encoding.h
+++ b/encoding.h
@@ -661,7 +661,6 @@
 #define CSR_MCAUSE 0x342
 #define CSR_MBADADDR 0x343
 #define CSR_MIP 0x344
-#define CSR_MIPI 0x345
 #define CSR_MUCOUNTEREN 0x310
 #define CSR_MSCOUNTEREN 0x311
 #define CSR_MUCYCLE_DELTA 0x700
@@ -678,8 +677,6 @@
 #define CSR_MARCHID 0xf12
 #define CSR_MIMPID 0xf13
 #define CSR_MHARTID 0xf14
-#define CSR_MTOHOST 0x7c0
-#define CSR_MFROMHOST 0x7c1
 #define CSR_MRESET 0x7c2
 #define CSR_CYCLEH 0xc80
 #define CSR_TIMEH 0xc81
@@ -966,7 +963,6 @@ DECLARE_CSR(mepc, CSR_MEPC)
 DECLARE_CSR(mcause, CSR_MCAUSE)
 DECLARE_CSR(mbadaddr, CSR_MBADADDR)
 DECLARE_CSR(mip, CSR_MIP)
-DECLARE_CSR(mipi, CSR_MIPI)
 DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN)
 DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN)
 DECLARE_CSR(mucycle_delta, CSR_MUCYCLE_DELTA)
@@ -983,8 +979,6 @@ DECLARE_CSR(mvendorid, CSR_MVENDORID)
 DECLARE_CSR(marchid, CSR_MARCHID)
 DECLARE_CSR(mimpid, CSR_MIMPID)
 DECLARE_CSR(mhartid, CSR_MHARTID)
-DECLARE_CSR(mtohost, CSR_MTOHOST)
-DECLARE_CSR(mfromhost, CSR_MFROMHOST)
 DECLARE_CSR(mreset, CSR_MRESET)
 DECLARE_CSR(cycleh, CSR_CYCLEH)
 DECLARE_CSR(timeh, CSR_TIMEH)
diff --git a/v/entry.S b/v/entry.S
index 460428a..e4f1ca4 100644
--- a/v/entry.S
+++ b/v/entry.S
@@ -10,7 +10,7 @@
 # define REGBYTES 4
 #endif
 
-#define STACK_TOP (_end + 131072)
+#define STACK_TOP (_end + 4096)
 
   .section ".text.init","ax",@progbits
 
@@ -28,6 +28,9 @@ handle_reset:
   la t0, trap_vector
   csrw mtvec, t0
   la sp, STACK_TOP - SIZEOF_TRAPFRAME_T
+  csrr t0, mhartid
+  slli t0, t0, 12
+  add sp, sp, t0
   csrw mscratch, sp
   li a1, 1337
   la a0, userstart
diff --git a/v/vm.c b/v/vm.c
index 5fd1b11..9fc2ea4 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -175,7 +175,7 @@ static void coherence_torture()
   // cause coherence misses without affecting program semantics
   uint64_t random = ENTROPY;
   while (1) {
-    uintptr_t paddr = (random % (2 * (MAX_TEST_PAGES + 1) * PGSIZE)) & -4;
+    uintptr_t paddr = DRAM_BASE + ((random % (2 * (MAX_TEST_PAGES + 1) * PGSIZE)) & -4);
 #ifdef __riscv_atomic
     if (random & 1) // perform a no-op write
       asm volatile ("amoadd.w zero, zero, (%0)" :: "r"(paddr));