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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-07 15:27:12 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-07 15:27:12 -0700 |
| commit | 92fb0bd7d7d2723f90896bb351f5cdb0eb36b73b (patch) | |
| tree | 21be2a6327159cc08ab3742cbfc12014f7e5dca0 | |
| parent | 5c613fe43d1bc44e6ae408b5356c7d60d93a1ca0 (diff) | |
| download | env-92fb0bd7d7d2723f90896bb351f5cdb0eb36b73b.zip env-92fb0bd7d7d2723f90896bb351f5cdb0eb36b73b.tar.gz env-92fb0bd7d7d2723f90896bb351f5cdb0eb36b73b.tar.bz2 | |
Delegate interrupts to supervisor for supervisor tests
| -rw-r--r-- | p/riscv_test.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/p/riscv_test.h b/p/riscv_test.h index d15b4fe..4a43885 100644 --- a/p/riscv_test.h +++ b/p/riscv_test.h @@ -61,6 +61,8 @@ #define RVTEST_ENABLE_SUPERVISOR \ li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \ csrs mstatus, a0; \ + li a0, SIP_SSIP | SIP_STIP; \ + csrs mideleg, a0; \ #define RVTEST_ENABLE_MACHINE \ li a0, MSTATUS_MPP; \ @@ -122,6 +124,9 @@ reset_vector: \ li TESTNUM, 0; \ la t0, trap_vector; \ csrw mtvec, t0; \ + csrwi medeleg, 0; \ + csrwi mideleg, 0; \ + csrwi mie, 0; \ /* if an stvec_handler is defined, delegate exceptions to it */ \ la t0, stvec_handler; \ beqz t0, 1f; \ |