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authorAndrew Waterman <andrew@sifive.com>2017-03-30 00:19:11 -0700
committerAndrew Waterman <andrew@sifive.com>2017-03-30 00:19:11 -0700
commit3f1d04a2e8f849c306bdca7c7115462c3a60a6e0 (patch)
tree41d32c2cb2d3bfbe9cc23504302471d92310ab12
parentf17553f93d126eda4f543739d26d754e5867e7a2 (diff)
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New PMP encoding
-rw-r--r--encoding.h11
-rw-r--r--p/riscv_test.h2
-rw-r--r--v/vm.c2
3 files changed, 8 insertions, 7 deletions
diff --git a/encoding.h b/encoding.h
index b07d976..55f8461 100644
--- a/encoding.h
+++ b/encoding.h
@@ -127,13 +127,14 @@
#define PMP_R 0x01
#define PMP_W 0x02
#define PMP_X 0x04
-#define PMP_M 0x08
-#define PMP_NAPOT 0x10
-#define PMP_TOR 0x20
-#define PMP_EN 0x40
-#define PMP_LOCK 0x80
+#define PMP_A 0x18
+#define PMP_L 0x80
#define PMP_SHIFT 2
+#define PMP_TOR 0x08
+#define PMP_NA4 0x10
+#define PMP_NAPOT 0x18
+
#define IRQ_S_SOFT 1
#define IRQ_H_SOFT 2
#define IRQ_M_SOFT 3
diff --git a/p/riscv_test.h b/p/riscv_test.h
index 708bc4d..baad787 100644
--- a/p/riscv_test.h
+++ b/p/riscv_test.h
@@ -58,7 +58,7 @@
csrw mtvec, t0; \
li t0, -1; /* Set up a PMP to permit all accesses */ \
csrw pmpaddr0, t0; \
- li t0, PMP_EN | PMP_NAPOT | PMP_M | PMP_R | PMP_W | PMP_X; \
+ li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \
csrw pmpcfg0, t0; \
.align 2; \
1:
diff --git a/v/vm.c b/v/vm.c
index 012a4fa..ae2e9e9 100644
--- a/v/vm.c
+++ b/v/vm.c
@@ -234,7 +234,7 @@ void vm_boot(uintptr_t test_addr)
(vm_choice * (SPTBR_MODE & ~(SPTBR_MODE<<1))));
// Set up PMPs if present, ignoring illegal instruction trap if not.
- uintptr_t pmpc = PMP_EN | PMP_NAPOT | PMP_M | PMP_R | PMP_W | PMP_X;
+ uintptr_t pmpc = PMP_NAPOT | PMP_R | PMP_W | PMP_X;
asm volatile ("la t0, 1f\n\t"
"csrrw t0, mtvec, t0\n\t"
"csrw pmpaddr0, %1\n\t"