From cbeadfda33ba8bc04b620a49bda8873fd52b9f1c Mon Sep 17 00:00:00 2001
From: Takahiro <hogehoge@gachapin.jp>
Date: Tue, 8 Dec 2020 00:08:46 -0800
Subject: Add rd=x0 test case to csr test (#308)

---
 isa/rv64si/csr.S | 1 +
 1 file changed, 1 insertion(+)

(limited to 'isa')

diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index 09494ef..daaee6a 100644
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -48,6 +48,7 @@ RVTEST_CODE_BEGIN
 
   TEST_CASE(20, a0,         0, csrw sscratch, zero; csrr a0, sscratch);
   TEST_CASE(21, a0,         0, csrrwi a0, sscratch, 0; csrrwi a0, sscratch, 0xF);
+  TEST_CASE(22, a0,      0x1f, csrrsi x0, sscratch, 0x10; csrr a0, sscratch);
 
   csrwi sscratch, 3
   TEST_CASE( 2, a0,         3, csrr a0, sscratch);
-- 
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