From 3dc79832d072ccbb6ebd1b7115c887fb621be5d3 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sun, 29 May 2022 05:15:52 +0100
Subject: Permit mtval to be zero in misaligned address test, fixes #389 (#390)

---
 isa/rv64mi/ma_addr.S | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'isa')

diff --git a/isa/rv64mi/ma_addr.S b/isa/rv64mi/ma_addr.S
index 721ac6a..f02a1af 100644
--- a/isa/rv64mi/ma_addr.S
+++ b/isa/rv64mi/ma_addr.S
@@ -99,10 +99,12 @@ mtvec_handler:
   bne t0, s1, fail
 
   csrr t0, mbadaddr
+  beqz t0, 1f
   bne t0, t1, fail
 
   lb t0, (t0)
   beqz t0, fail
+1:
 
   csrw mepc, t2
   mret
-- 
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