From 08698050b84886b0b52458f46bd801267eb9c0ce Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Thu, 16 Mar 2023 21:56:55 +0000
Subject: Fix breakpoint.S failing when tcontrol is implemented (#463)

---
 isa/rv64mi/breakpoint.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

(limited to 'isa')

diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S
index 252a696..1223f71 100644
--- a/isa/rv64mi/breakpoint.S
+++ b/isa/rv64mi/breakpoint.S
@@ -16,6 +16,16 @@ RVTEST_CODE_BEGIN
   # Set up breakpoint to trap on M-mode fetches.
   li TESTNUM, 2
 
+  # Set tcontrol.mte, otherwise breakpoints are disabled. This may trap,
+  # because tcontrol is an optional register.
+  la a0, 1f
+  csrrw a0, mtvec, a0
+  li a1, 0x8
+  csrs tcontrol, a1
+.p2align 2
+1:
+  csrw mtvec, a0
+
   # Skip tselect if hard-wired.
   csrw tselect, x0
   csrr a1, tselect
-- 
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