From 57a2595e46680771d8341e68679592c291ea024c Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Mon, 8 Aug 2016 11:34:32 -0700
Subject: Add U500 Target

---
 debug/targets/freedom-u500-sim/link.lds    | 34 ++++++++++++++++++++++++++++++
 debug/targets/freedom-u500-sim/openocd.cfg | 19 +++++++++++++++++
 2 files changed, 53 insertions(+)
 create mode 100755 debug/targets/freedom-u500-sim/link.lds
 create mode 100644 debug/targets/freedom-u500-sim/openocd.cfg

(limited to 'debug/targets')

diff --git a/debug/targets/freedom-u500-sim/link.lds b/debug/targets/freedom-u500-sim/link.lds
new file mode 100755
index 0000000..1dbb99c
--- /dev/null
+++ b/debug/targets/freedom-u500-sim/link.lds
@@ -0,0 +1,34 @@
+OUTPUT_ARCH( "riscv" )
+
+SECTIONS
+{
+  . = 0x80000000;
+  .text : 
+  {
+    *(.text.entry)
+    *(.text)
+  }
+
+  /* data segment */
+  .data : { *(.data) }
+
+  .sdata : {
+    _gp = . + 0x800;
+    *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)
+    *(.srodata*)
+    *(.sdata .sdata.* .gnu.linkonce.s.*)
+  }
+
+  /* bss segment */
+  .sbss : {
+    *(.sbss .sbss.* .gnu.linkonce.sb.*)
+    *(.scommon)
+  }
+  .bss : { *(.bss) }
+
+  __malloc_start = .;
+  . = . + 512;
+
+  /* End of uninitalized data segement */
+  _end = .;
+}
diff --git a/debug/targets/freedom-u500-sim/openocd.cfg b/debug/targets/freedom-u500-sim/openocd.cfg
new file mode 100644
index 0000000..767d229
--- /dev/null
+++ b/debug/targets/freedom-u500-sim/openocd.cfg
@@ -0,0 +1,19 @@
+adapter_khz     10000
+
+source [find interface/jtag_vpi.cfg]
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+#reset_config trst_and_srst separate
+# Stupid long so I can see the LEDs
+#adapter_nsrst_delay 2000
+#jtag_ntrst_delay 1000
+#
+init
+#reset
+
+halt
-- 
cgit v1.1