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Diffstat (limited to 'debug/targets/RISC-V/spike-rtos.cfg')
| -rw-r--r-- | debug/targets/RISC-V/spike-rtos.cfg | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/debug/targets/RISC-V/spike-rtos.cfg b/debug/targets/RISC-V/spike-rtos.cfg index d8bd27e..e26ca8a 100644 --- a/debug/targets/RISC-V/spike-rtos.cfg +++ b/debug/targets/RISC-V/spike-rtos.cfg @@ -17,6 +17,7 @@ gdb_report_register_access_error enable # Expose an unimplemented CSR so we can test non-existent register access # behavior. riscv expose_csrs 2288 +riscv expose_custom 1,12345-12348 init |