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-rw-r--r--isa/rv64mi/breakpoint.S18
1 files changed, 8 insertions, 10 deletions
diff --git a/isa/rv64mi/breakpoint.S b/isa/rv64mi/breakpoint.S
index 3e5e453..c7fbdd4 100644
--- a/isa/rv64mi/breakpoint.S
+++ b/isa/rv64mi/breakpoint.S
@@ -22,19 +22,17 @@ RVTEST_CODE_BEGIN
bne x0, a1, pass
# Make sure there's a breakpoint there.
- csrr a0, tdata1
- srli a0, a0, __riscv_xlen - 4
- li a1, 2
- bne a0, a1, pass
+# csrr a0, tdata1
+# srli a0, a0, __riscv_xlen - 4
+# li a1, 2
+# bne a0, a1, pass
la a2, 1f
csrw tdata2, a2
li a0, (2 << (__riscv_xlen - 4)) | MCONTROL_M | MCONTROL_EXECUTE
csrw tdata1, a0
- andi a0, a0, 0x7ff
# Skip if breakpoint type is unsupported.
csrr a1, tdata1
- andi a1, a1, 0x7ff
bne a0, a1, 2f
.align 2
1:
@@ -92,10 +90,10 @@ RVTEST_CODE_BEGIN
bne a0, a1, pass
# Make sure there's a breakpoint there.
- csrr a0, tdata1
- srli a0, a0, __riscv_xlen - 4
- li a1, 2
- bne a0, a1, pass
+# csrr a0, tdata1
+# srli a0, a0, __riscv_xlen - 4
+# li a1, 2
+# bne a0, a1, pass
li a0, (2 << (__riscv_xlen - 4)) | MCONTROL_M | MCONTROL_LOAD
csrw tdata1, a0