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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-14 16:57:50 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-14 16:57:50 -0700 |
| commit | 7626b7f616803be5105f497aa5732a5d5cb001c6 (patch) | |
| tree | 654d4c0ff26697077130a6c0bc91b9ab61ba9630 /isa/rv32ui | |
| parent | 057b1432679ded5dce4149797fa624205baee62e (diff) | |
| download | riscv-tests-7626b7f616803be5105f497aa5732a5d5cb001c6.zip riscv-tests-7626b7f616803be5105f497aa5732a5d5cb001c6.tar.gz riscv-tests-7626b7f616803be5105f497aa5732a5d5cb001c6.tar.bz2 | |
More RV32 tests
Diffstat (limited to 'isa/rv32ui')
| -rw-r--r-- | isa/rv32ui/Makefrag | 5 | ||||
| -rw-r--r-- | isa/rv32ui/amoxor_w.S | 65 |
2 files changed, 68 insertions, 2 deletions
diff --git a/isa/rv32ui/Makefrag b/isa/rv32ui/Makefrag index 9d90b92..95943b7 100644 --- a/isa/rv32ui/Makefrag +++ b/isa/rv32ui/Makefrag @@ -5,7 +5,7 @@ rv32ui_sc_tests = \ simple \ add addi \ - amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoswap_w \ + amoadd_w amoand_w amomax_w amomaxu_w amomin_w amominu_w amoor_w amoxor_w amoswap_w \ and andi \ auipc \ beq bge bgeu blt bltu bne \ @@ -31,5 +31,6 @@ rv32ui_mc_tests = \ rv32ui_p_tests = $(addprefix rv32ui-p-, $(rv32ui_sc_tests)) rv32ui_pt_tests = $(addprefix rv32ui-pt-, $(rv32ui_sc_tests)) rv32ui_pm_tests = $(addprefix rv32ui-pm-, $(rv32ui_mc_tests)) +rv32ui_v_tests = $(addprefix rv32ui-v-, $(rv32ui_sc_tests)) -spike_tests += $(rv32ui_p_tests) $(rv32ui_pt_tests) $(rv32ui_pm_tests) +spike32_tests += $(rv32ui_p_tests) $(rv32ui_pt_tests) $(rv32ui_pm_tests) $(rv32ui_v_tests) diff --git a/isa/rv32ui/amoxor_w.S b/isa/rv32ui/amoxor_w.S new file mode 100644 index 0000000..d4b775f --- /dev/null +++ b/isa/rv32ui/amoxor_w.S @@ -0,0 +1,65 @@ +# See LICENSE for license details. + +#***************************************************************************** +# amoxor_w.S +#----------------------------------------------------------------------------- +# +# Test amoxor.w instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + TEST_CASE(2, a4, 0x80000000, \ + li a0, 0x80000000; \ + li a1, 0xfffff800; \ + la a3, amo_operand; \ + sw a0, 0(a3); \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + nop; nop; nop; nop; \ + amoxor.w a4, a1, 0(a3); \ + ) + + TEST_CASE(3, a5, 0x7ffff800, lw a5, 0(a3)) + + # try again after a cache miss + TEST_CASE(4, a4, 0x7ffff800, \ + li a1, 0xc0000001; \ + li a4, 16384; \ + add a5, a3, a4; \ + lw x0, 0(a5); \ + add a5, a5, a4; \ + lw x0, 0(a5); \ + add a5, a5, a4; \ + lw x0, 0(a5); \ + add a5, a5, a4; \ + lw x0, 0(a5); \ + amoxor.w a4, a1, 0(a3); \ + ) + + TEST_CASE(5, a5, 0xbffff801, lw a5, 0(a3)) + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END + + .bss + .align 3 +amo_operand: + .dword 0 + .skip 65536 |