aboutsummaryrefslogtreecommitdiff
path: root/debug
diff options
context:
space:
mode:
authorcgsfv <cgsfv@users.noreply.github.com>2018-11-14 10:55:36 +0100
committercgsfv <cgsfv@users.noreply.github.com>2018-11-14 10:55:36 +0100
commit8a46e6b0064239805855ea9519b327fdb61c4203 (patch)
tree1ced7457d28e04c8d83f4814d9e286d1a78135ff /debug
parent94a29da063eecda0f37f9f6a97ffb39a47825b35 (diff)
downloadriscv-tests-8a46e6b0064239805855ea9519b327fdb61c4203.zip
riscv-tests-8a46e6b0064239805855ea9519b327fdb61c4203.tar.gz
riscv-tests-8a46e6b0064239805855ea9519b327fdb61c4203.tar.bz2
Cleanup and renamed test flag to invalid_memory_returns_zero
Diffstat (limited to 'debug')
-rwxr-xr-xdebug/gdbserver.py4
-rw-r--r--debug/targets.py4
-rw-r--r--debug/targets/SiFive/Freedom/E300.py2
-rw-r--r--debug/targets/SiFive/Freedom/U500.py2
4 files changed, 6 insertions, 6 deletions
diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 05a57cb..0dc87a0 100755
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -237,7 +237,7 @@ class MemTestBlockReadInvalid(GdbTest):
real_values = "EF BE AD DE 78 56 34 12"
def early_applicable(self):
- return self.target.uses_dtm_version_013
+ return self.target.invalid_memory_returns_zero
def test(self):
self.gdb.p("*((int*)0x%x) = 0xdeadbeef" % (self.hart.ram + 0))
@@ -282,7 +282,7 @@ class MemTestBlockReadInvalid(GdbTest):
self.gdb.command("shell cat %s" % dump.name)
line = dump.readline()
line = dump.readline()
- assertEqual(line.strip(' \t\n\r'), expected_values)
+ assertEqual(line.strip(), expected_values)
class MemTestBlock(GdbTest):
length = 1024
diff --git a/debug/targets.py b/debug/targets.py
index b5b7f7b..5d7976b 100644
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -79,8 +79,8 @@ class Target(object):
# hardware will every do that.
implements_custom_test = False
- # Target uses the DTM Version 0.13 for memory accesses
- uses_dtm_version_013 = False
+ # When true it indicates that reading invalid memory doesn't return an error
+ invalid_memory_returns_zero = False
# Internal variables:
directory = None
diff --git a/debug/targets/SiFive/Freedom/E300.py b/debug/targets/SiFive/Freedom/E300.py
index 4062e3d..5f1c418 100644
--- a/debug/targets/SiFive/Freedom/E300.py
+++ b/debug/targets/SiFive/Freedom/E300.py
@@ -10,4 +10,4 @@ class E300Hart(targets.Hart):
class E300(targets.Target):
openocd_config_path = "Freedom.cfg"
harts = [E300Hart()]
- uses_dtm_version_013 = True
+ invalid_memory_returns_zero = True
diff --git a/debug/targets/SiFive/Freedom/U500.py b/debug/targets/SiFive/Freedom/U500.py
index 83a1343..4442af7 100644
--- a/debug/targets/SiFive/Freedom/U500.py
+++ b/debug/targets/SiFive/Freedom/U500.py
@@ -10,4 +10,4 @@ class U500Hart(targets.Hart):
class U500(targets.Target):
openocd_config_path = "Freedom.cfg"
harts = [U500Hart()]
- uses_dtm_version_013 = True
+ invalid_memory_returns_zero = True