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| author | Tim Newsome <tim@sifive.com> | 2018-02-27 14:28:26 -0800 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2018-03-27 13:00:05 -0700 |
| commit | 45380af7d42ee3302fc229030694f8ea4506d79f (patch) | |
| tree | 6752bd417f742d771bbf8ad7dd1cbdbc0f6f2bfa /debug | |
| parent | efb44a9a906e2281be7a199ca799d0256e921f1f (diff) | |
| download | riscv-tests-45380af7d42ee3302fc229030694f8ea4506d79f.zip riscv-tests-45380af7d42ee3302fc229030694f8ea4506d79f.tar.gz riscv-tests-45380af7d42ee3302fc229030694f8ea4506d79f.tar.bz2 | |
Test debug authentication.
Also halt instead of reset spike targets, which tests a more complicated
code path.
Diffstat (limited to 'debug')
| -rw-r--r-- | debug/targets/RISC-V/spike-1.cfg | 6 | ||||
| -rw-r--r-- | debug/targets/RISC-V/spike-2.cfg | 9 | ||||
| -rw-r--r-- | debug/targets/RISC-V/spike-rtos.cfg | 6 | ||||
| -rw-r--r-- | debug/testlib.py | 1 |
4 files changed, 19 insertions, 3 deletions
diff --git a/debug/targets/RISC-V/spike-1.cfg b/debug/targets/RISC-V/spike-1.cfg index 7607b46..f420417 100644 --- a/debug/targets/RISC-V/spike-1.cfg +++ b/debug/targets/RISC-V/spike-1.cfg @@ -17,4 +17,8 @@ gdb_report_data_abort enable riscv expose_csrs 2288 init -reset halt + +set challenge [ocd_riscv authdata_read] +riscv authdata_write [expr $challenge + 1] + +halt diff --git a/debug/targets/RISC-V/spike-2.cfg b/debug/targets/RISC-V/spike-2.cfg index c78cf8f..114d5b8 100644 --- a/debug/targets/RISC-V/spike-2.cfg +++ b/debug/targets/RISC-V/spike-2.cfg @@ -20,4 +20,11 @@ gdb_report_data_abort enable riscv expose_csrs 2288 init -reset halt + +set challenge [ocd_riscv authdata_read] +riscv authdata_write [expr $challenge + 1] + +targets $_TARGETNAME_0 +halt +targets $_TARGETNAME_1 +halt diff --git a/debug/targets/RISC-V/spike-rtos.cfg b/debug/targets/RISC-V/spike-rtos.cfg index 5a70f52..159a70f 100644 --- a/debug/targets/RISC-V/spike-rtos.cfg +++ b/debug/targets/RISC-V/spike-rtos.cfg @@ -18,4 +18,8 @@ gdb_report_data_abort enable riscv expose_csrs 2288 init -reset halt + +set challenge [ocd_riscv authdata_read] +riscv authdata_write [expr $challenge + 1] + +halt diff --git a/debug/testlib.py b/debug/testlib.py index fd587bd..2fa70df 100644 --- a/debug/testlib.py +++ b/debug/testlib.py @@ -118,6 +118,7 @@ class Spike(object): isa = "RV%dG" % harts[0].xlen cmd += ["--isa", isa] + cmd += ["--debug-auth"] if not self.progbufsize is None: cmd += ["--progsize", str(self.progbufsize)] |